Lines Matching +full:jh7110 +full:- +full:dphy +full:- +full:tx
1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 2022-2023 StarFive Technology Co., Ltd.
15 #include <dt-bindings/power/starfive,jh7110-pmu.h>
87 struct jh71xx_pmu *pmu = pmd->pmu; in jh71xx_pmu_get_state()
90 return -EINVAL; in jh71xx_pmu_get_state()
92 *is_on = readl(pmu->base + pmu->match_data->pmu_status) & mask; in jh71xx_pmu_get_state()
99 struct jh71xx_pmu *pmu = pmd->pmu; in jh7110_pmu_set_state()
107 spin_lock_irqsave(&pmu->lock, flags); in jh7110_pmu_set_state()
129 writel(mask, pmu->base + mode); in jh7110_pmu_set_state()
139 writel(JH71XX_PMU_SW_ENCOURAGE_ON, pmu->base + JH71XX_PMU_SW_ENCOURAGE); in jh7110_pmu_set_state()
140 writel(encourage_lo, pmu->base + JH71XX_PMU_SW_ENCOURAGE); in jh7110_pmu_set_state()
141 writel(encourage_hi, pmu->base + JH71XX_PMU_SW_ENCOURAGE); in jh7110_pmu_set_state()
143 spin_unlock_irqrestore(&pmu->lock, flags); in jh7110_pmu_set_state()
147 ret = readl_poll_timeout_atomic(pmu->base + JH71XX_PMU_CURR_POWER_MODE, in jh7110_pmu_set_state()
151 ret = readl_poll_timeout_atomic(pmu->base + JH71XX_PMU_CURR_POWER_MODE, in jh7110_pmu_set_state()
157 dev_err(pmu->dev, "%s: failed to power %s\n", in jh7110_pmu_set_state()
158 pmd->genpd.name, on ? "on" : "off"); in jh7110_pmu_set_state()
159 return -ETIMEDOUT; in jh7110_pmu_set_state()
167 struct jh71xx_pmu *pmu = pmd->pmu; in jh7110_aon_pmu_set_state()
171 spin_lock_irqsave(&pmu->lock, flags); in jh7110_aon_pmu_set_state()
172 val = readl(pmu->base + JH71XX_AON_PMU_SWITCH); in jh7110_aon_pmu_set_state()
179 writel(val, pmu->base + JH71XX_AON_PMU_SWITCH); in jh7110_aon_pmu_set_state()
180 spin_unlock_irqrestore(&pmu->lock, flags); in jh7110_aon_pmu_set_state()
187 struct jh71xx_pmu *pmu = pmd->pmu; in jh71xx_pmu_set_state()
188 const struct jh71xx_pmu_match_data *match_data = pmu->match_data; in jh71xx_pmu_set_state()
194 dev_dbg(pmu->dev, "unable to get current state for %s\n", in jh71xx_pmu_set_state()
195 pmd->genpd.name); in jh71xx_pmu_set_state()
200 dev_dbg(pmu->dev, "pm domain [%s] is already %sable status.\n", in jh71xx_pmu_set_state()
201 pmd->genpd.name, on ? "en" : "dis"); in jh71xx_pmu_set_state()
205 return match_data->pmu_set_state(pmd, mask, on); in jh71xx_pmu_set_state()
212 u32 pwr_mask = BIT(pmd->domain_info->bit); in jh71xx_pmu_on()
221 u32 pwr_mask = BIT(pmd->domain_info->bit); in jh71xx_pmu_off()
231 spin_lock_irqsave(&pmu->lock, flags); in jh71xx_pmu_int_enable()
232 val = readl(pmu->base + JH71XX_PMU_TIMER_INT_MASK); in jh71xx_pmu_int_enable()
239 writel(val, pmu->base + JH71XX_PMU_TIMER_INT_MASK); in jh71xx_pmu_int_enable()
240 spin_unlock_irqrestore(&pmu->lock, flags); in jh71xx_pmu_int_enable()
248 val = readl(pmu->base + JH71XX_PMU_INT_STATUS); in jh71xx_pmu_interrupt()
251 dev_dbg(pmu->dev, "sequence done.\n"); in jh71xx_pmu_interrupt()
253 dev_dbg(pmu->dev, "hardware encourage requestion.\n"); in jh71xx_pmu_interrupt()
255 dev_err(pmu->dev, "software encourage fail.\n"); in jh71xx_pmu_interrupt()
257 dev_err(pmu->dev, "hardware encourage fail.\n"); in jh71xx_pmu_interrupt()
259 dev_err(pmu->dev, "p-channel fail event.\n"); in jh71xx_pmu_interrupt()
262 writel(val, pmu->base + JH71XX_PMU_INT_STATUS); in jh71xx_pmu_interrupt()
263 writel(val, pmu->base + JH71XX_PMU_EVENT_STATUS); in jh71xx_pmu_interrupt()
270 struct device *dev = &pdev->dev; in jh7110_pmu_parse_irq()
273 pmu->irq = platform_get_irq(pdev, 0); in jh7110_pmu_parse_irq()
274 if (pmu->irq < 0) in jh7110_pmu_parse_irq()
275 return pmu->irq; in jh7110_pmu_parse_irq()
277 ret = devm_request_irq(dev, pmu->irq, jh71xx_pmu_interrupt, in jh7110_pmu_parse_irq()
278 0, pdev->name, pmu); in jh7110_pmu_parse_irq()
294 pmd = devm_kzalloc(pmu->dev, sizeof(*pmd), GFP_KERNEL); in jh71xx_pmu_init_domain()
296 return -ENOMEM; in jh71xx_pmu_init_domain()
298 pmd->domain_info = &pmu->match_data->domain_info[index]; in jh71xx_pmu_init_domain()
299 pmd->pmu = pmu; in jh71xx_pmu_init_domain()
300 pwr_mask = BIT(pmd->domain_info->bit); in jh71xx_pmu_init_domain()
302 pmd->genpd.name = pmd->domain_info->name; in jh71xx_pmu_init_domain()
303 pmd->genpd.flags = pmd->domain_info->flags; in jh71xx_pmu_init_domain()
307 dev_warn(pmu->dev, "unable to get current state for %s\n", in jh71xx_pmu_init_domain()
308 pmd->genpd.name); in jh71xx_pmu_init_domain()
310 pmd->genpd.power_on = jh71xx_pmu_on; in jh71xx_pmu_init_domain()
311 pmd->genpd.power_off = jh71xx_pmu_off; in jh71xx_pmu_init_domain()
312 pm_genpd_init(&pmd->genpd, NULL, !is_on); in jh71xx_pmu_init_domain()
314 pmu->genpd_data.domains[index] = &pmd->genpd; in jh71xx_pmu_init_domain()
321 struct device *dev = &pdev->dev; in jh71xx_pmu_probe()
322 struct device_node *np = dev->of_node; in jh71xx_pmu_probe()
330 return -ENOMEM; in jh71xx_pmu_probe()
332 pmu->base = devm_platform_ioremap_resource(pdev, 0); in jh71xx_pmu_probe()
333 if (IS_ERR(pmu->base)) in jh71xx_pmu_probe()
334 return PTR_ERR(pmu->base); in jh71xx_pmu_probe()
336 spin_lock_init(&pmu->lock); in jh71xx_pmu_probe()
340 return -EINVAL; in jh71xx_pmu_probe()
342 if (match_data->pmu_parse_irq) { in jh71xx_pmu_probe()
343 ret = match_data->pmu_parse_irq(pdev, pmu); in jh71xx_pmu_probe()
350 pmu->genpd = devm_kcalloc(dev, match_data->num_domains, in jh71xx_pmu_probe()
353 if (!pmu->genpd) in jh71xx_pmu_probe()
354 return -ENOMEM; in jh71xx_pmu_probe()
356 pmu->dev = dev; in jh71xx_pmu_probe()
357 pmu->match_data = match_data; in jh71xx_pmu_probe()
358 pmu->genpd_data.domains = pmu->genpd; in jh71xx_pmu_probe()
359 pmu->genpd_data.num_domains = match_data->num_domains; in jh71xx_pmu_probe()
361 for (i = 0; i < match_data->num_domains; i++) { in jh71xx_pmu_probe()
369 ret = of_genpd_add_provider_onecell(np, &pmu->genpd_data); in jh71xx_pmu_probe()
423 .name = "DPHY-TX",
427 .name = "DPHY-RX",
441 .compatible = "starfive,jh7110-pmu",
444 .compatible = "starfive,jh7110-aon-syscon",
454 .name = "jh71xx-pmu",