Lines Matching refs:bc

45 	void (*power_off) (struct imx8mp_blk_ctrl *bc, struct imx8mp_blk_ctrl_domain *domain);
46 void (*power_on) (struct imx8mp_blk_ctrl *bc, struct imx8mp_blk_ctrl_domain *domain);
67 struct imx8mp_blk_ctrl *bc; member
74 int (*probe) (struct imx8mp_blk_ctrl *bc);
76 void (*power_off) (struct imx8mp_blk_ctrl *bc, struct imx8mp_blk_ctrl_domain *domain);
77 void (*power_on) (struct imx8mp_blk_ctrl *bc, struct imx8mp_blk_ctrl_domain *domain);
147 static int imx8mp_hsio_blk_ctrl_probe(struct imx8mp_blk_ctrl *bc) in imx8mp_hsio_blk_ctrl_probe() argument
154 clk_hsio_pll = devm_kzalloc(bc->dev, sizeof(*clk_hsio_pll), GFP_KERNEL); in imx8mp_hsio_blk_ctrl_probe()
163 clk_hsio_pll->regmap = bc->regmap; in imx8mp_hsio_blk_ctrl_probe()
167 ret = devm_clk_hw_register(bc->bus_power_dev, hw); in imx8mp_hsio_blk_ctrl_probe()
171 return devm_of_clk_add_hw_provider(bc->dev, of_clk_hw_simple_get, hw); in imx8mp_hsio_blk_ctrl_probe()
174 static void imx8mp_hsio_blk_ctrl_power_on(struct imx8mp_blk_ctrl *bc, in imx8mp_hsio_blk_ctrl_power_on() argument
179 regmap_set_bits(bc->regmap, GPR_REG0, USB_CLOCK_MODULE_EN); in imx8mp_hsio_blk_ctrl_power_on()
182 regmap_set_bits(bc->regmap, GPR_REG0, PCIE_CLOCK_MODULE_EN); in imx8mp_hsio_blk_ctrl_power_on()
185 regmap_set_bits(bc->regmap, GPR_REG0, in imx8mp_hsio_blk_ctrl_power_on()
193 static void imx8mp_hsio_blk_ctrl_power_off(struct imx8mp_blk_ctrl *bc, in imx8mp_hsio_blk_ctrl_power_off() argument
198 regmap_clear_bits(bc->regmap, GPR_REG0, USB_CLOCK_MODULE_EN); in imx8mp_hsio_blk_ctrl_power_off()
201 regmap_clear_bits(bc->regmap, GPR_REG0, PCIE_CLOCK_MODULE_EN); in imx8mp_hsio_blk_ctrl_power_off()
204 regmap_clear_bits(bc->regmap, GPR_REG0, in imx8mp_hsio_blk_ctrl_power_off()
215 struct imx8mp_blk_ctrl *bc = container_of(nb, struct imx8mp_blk_ctrl, in imx8mp_hsio_power_notifier() local
217 struct clk_bulk_data *usb_clk = bc->domains[IMX8MP_HSIOBLK_PD_USB].clks; in imx8mp_hsio_power_notifier()
218 int num_clks = bc->domains[IMX8MP_HSIOBLK_PD_USB].data->num_clks; in imx8mp_hsio_power_notifier()
230 regmap_set_bits(bc->regmap, GPR_REG0, USB_CLOCK_MODULE_EN); in imx8mp_hsio_power_notifier()
234 regmap_clear_bits(bc->regmap, GPR_REG0, USB_CLOCK_MODULE_EN); in imx8mp_hsio_power_notifier()
243 regmap_set_bits(bc->regmap, GPR_REG0, USB_CLOCK_MODULE_EN); in imx8mp_hsio_power_notifier()
305 static void imx8mp_hdmi_blk_ctrl_power_on(struct imx8mp_blk_ctrl *bc, in imx8mp_hdmi_blk_ctrl_power_on() argument
310 regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL0, BIT(9)); in imx8mp_hdmi_blk_ctrl_power_on()
311 regmap_set_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(16)); in imx8mp_hdmi_blk_ctrl_power_on()
314 regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL0, in imx8mp_hdmi_blk_ctrl_power_on()
317 regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(11)); in imx8mp_hdmi_blk_ctrl_power_on()
318 regmap_set_bits(bc->regmap, HDMI_RTX_RESET_CTL0, in imx8mp_hdmi_blk_ctrl_power_on()
320 regmap_set_bits(bc->regmap, HDMI_TX_CONTROL0, in imx8mp_hdmi_blk_ctrl_power_on()
324 regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(17)); in imx8mp_hdmi_blk_ctrl_power_on()
325 regmap_set_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(18)); in imx8mp_hdmi_blk_ctrl_power_on()
328 regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(28)); in imx8mp_hdmi_blk_ctrl_power_on()
329 regmap_set_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(22)); in imx8mp_hdmi_blk_ctrl_power_on()
332 regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(27) | BIT(30)); in imx8mp_hdmi_blk_ctrl_power_on()
333 regmap_set_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(20)); in imx8mp_hdmi_blk_ctrl_power_on()
336 regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL0, in imx8mp_hdmi_blk_ctrl_power_on()
338 regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL1, in imx8mp_hdmi_blk_ctrl_power_on()
341 regmap_set_bits(bc->regmap, HDMI_RTX_RESET_CTL0, in imx8mp_hdmi_blk_ctrl_power_on()
343 regmap_set_bits(bc->regmap, HDMI_TX_CONTROL0, BIT(1)); in imx8mp_hdmi_blk_ctrl_power_on()
346 regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL0, BIT(7)); in imx8mp_hdmi_blk_ctrl_power_on()
347 regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(22) | BIT(24)); in imx8mp_hdmi_blk_ctrl_power_on()
348 regmap_set_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(12)); in imx8mp_hdmi_blk_ctrl_power_on()
349 regmap_clear_bits(bc->regmap, HDMI_TX_CONTROL0, BIT(3)); in imx8mp_hdmi_blk_ctrl_power_on()
352 regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL0, BIT(11)); in imx8mp_hdmi_blk_ctrl_power_on()
355 regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(3) | BIT(4) | BIT(5)); in imx8mp_hdmi_blk_ctrl_power_on()
356 regmap_set_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(15)); in imx8mp_hdmi_blk_ctrl_power_on()
363 static void imx8mp_hdmi_blk_ctrl_power_off(struct imx8mp_blk_ctrl *bc, in imx8mp_hdmi_blk_ctrl_power_off() argument
368 regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL0, BIT(9)); in imx8mp_hdmi_blk_ctrl_power_off()
369 regmap_clear_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(16)); in imx8mp_hdmi_blk_ctrl_power_off()
372 regmap_clear_bits(bc->regmap, HDMI_RTX_RESET_CTL0, in imx8mp_hdmi_blk_ctrl_power_off()
374 regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(11)); in imx8mp_hdmi_blk_ctrl_power_off()
375 regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL0, in imx8mp_hdmi_blk_ctrl_power_off()
380 regmap_clear_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(18)); in imx8mp_hdmi_blk_ctrl_power_off()
381 regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(17)); in imx8mp_hdmi_blk_ctrl_power_off()
384 regmap_clear_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(22)); in imx8mp_hdmi_blk_ctrl_power_off()
385 regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(28)); in imx8mp_hdmi_blk_ctrl_power_off()
388 regmap_clear_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(20)); in imx8mp_hdmi_blk_ctrl_power_off()
389 regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(27) | BIT(30)); in imx8mp_hdmi_blk_ctrl_power_off()
392 regmap_clear_bits(bc->regmap, HDMI_TX_CONTROL0, BIT(1)); in imx8mp_hdmi_blk_ctrl_power_off()
393 regmap_clear_bits(bc->regmap, HDMI_RTX_RESET_CTL0, in imx8mp_hdmi_blk_ctrl_power_off()
395 regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1, in imx8mp_hdmi_blk_ctrl_power_off()
398 regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL0, in imx8mp_hdmi_blk_ctrl_power_off()
402 regmap_set_bits(bc->regmap, HDMI_TX_CONTROL0, BIT(3)); in imx8mp_hdmi_blk_ctrl_power_off()
403 regmap_clear_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(12)); in imx8mp_hdmi_blk_ctrl_power_off()
404 regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL0, BIT(7)); in imx8mp_hdmi_blk_ctrl_power_off()
405 regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(22) | BIT(24)); in imx8mp_hdmi_blk_ctrl_power_off()
408 regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL0, BIT(11)); in imx8mp_hdmi_blk_ctrl_power_off()
411 regmap_clear_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(15)); in imx8mp_hdmi_blk_ctrl_power_off()
412 regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(3) | BIT(4) | BIT(5)); in imx8mp_hdmi_blk_ctrl_power_off()
422 struct imx8mp_blk_ctrl *bc = container_of(nb, struct imx8mp_blk_ctrl, in imx8mp_hdmi_power_notifier() local
434 regmap_write(bc->regmap, HDMI_RTX_RESET_CTL0, 0x0); in imx8mp_hdmi_power_notifier()
435 regmap_write(bc->regmap, HDMI_RTX_CLK_CTL0, 0x0); in imx8mp_hdmi_power_notifier()
436 regmap_write(bc->regmap, HDMI_RTX_CLK_CTL1, 0x0); in imx8mp_hdmi_power_notifier()
437 regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL0, in imx8mp_hdmi_power_notifier()
439 regmap_set_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(0)); in imx8mp_hdmi_power_notifier()
527 struct imx8mp_blk_ctrl *bc = domain->bc; in imx8mp_blk_ctrl_power_on() local
531 ret = pm_runtime_resume_and_get(bc->bus_power_dev); in imx8mp_blk_ctrl_power_on()
533 dev_err(bc->dev, "failed to power up bus domain\n"); in imx8mp_blk_ctrl_power_on()
540 dev_err(bc->dev, "failed to enable clocks\n"); in imx8mp_blk_ctrl_power_on()
545 bc->power_on(bc, domain); in imx8mp_blk_ctrl_power_on()
550 dev_err(bc->dev, "failed to power up peripheral domain\n"); in imx8mp_blk_ctrl_power_on()
556 dev_err(bc->dev, "failed to set icc bw\n"); in imx8mp_blk_ctrl_power_on()
565 pm_runtime_put(bc->bus_power_dev); in imx8mp_blk_ctrl_power_on()
574 struct imx8mp_blk_ctrl *bc = domain->bc; in imx8mp_blk_ctrl_power_off() local
579 dev_err(bc->dev, "failed to enable clocks\n"); in imx8mp_blk_ctrl_power_off()
584 bc->power_off(bc, domain); in imx8mp_blk_ctrl_power_off()
592 pm_runtime_put(bc->bus_power_dev); in imx8mp_blk_ctrl_power_off()
603 struct imx8mp_blk_ctrl *bc; in imx8mp_blk_ctrl_probe() local
613 bc = devm_kzalloc(dev, sizeof(*bc), GFP_KERNEL); in imx8mp_blk_ctrl_probe()
614 if (!bc) in imx8mp_blk_ctrl_probe()
617 bc->dev = dev; in imx8mp_blk_ctrl_probe()
627 bc->regmap = devm_regmap_init_mmio(dev, base, &regmap_config); in imx8mp_blk_ctrl_probe()
628 if (IS_ERR(bc->regmap)) in imx8mp_blk_ctrl_probe()
629 return dev_err_probe(dev, PTR_ERR(bc->regmap), in imx8mp_blk_ctrl_probe()
632 bc->domains = devm_kcalloc(dev, num_domains, in imx8mp_blk_ctrl_probe()
635 if (!bc->domains) in imx8mp_blk_ctrl_probe()
638 bc->onecell_data.num_domains = num_domains; in imx8mp_blk_ctrl_probe()
639 bc->onecell_data.domains = in imx8mp_blk_ctrl_probe()
642 if (!bc->onecell_data.domains) in imx8mp_blk_ctrl_probe()
645 bc->bus_power_dev = dev_pm_domain_attach_by_name(dev, "bus"); in imx8mp_blk_ctrl_probe()
646 if (IS_ERR(bc->bus_power_dev)) in imx8mp_blk_ctrl_probe()
647 return dev_err_probe(dev, PTR_ERR(bc->bus_power_dev), in imx8mp_blk_ctrl_probe()
650 bc->power_off = bc_data->power_off; in imx8mp_blk_ctrl_probe()
651 bc->power_on = bc_data->power_on; in imx8mp_blk_ctrl_probe()
655 struct imx8mp_blk_ctrl_domain *domain = &bc->domains[i]; in imx8mp_blk_ctrl_probe()
704 domain->bc = bc; in imx8mp_blk_ctrl_probe()
727 bc->onecell_data.domains[i] = &domain->genpd; in imx8mp_blk_ctrl_probe()
730 ret = of_genpd_add_provider_onecell(dev->of_node, &bc->onecell_data); in imx8mp_blk_ctrl_probe()
736 bc->power_nb.notifier_call = bc_data->power_notifier_fn; in imx8mp_blk_ctrl_probe()
737 ret = dev_pm_genpd_add_notifier(bc->bus_power_dev, &bc->power_nb); in imx8mp_blk_ctrl_probe()
744 ret = bc_data->probe(bc); in imx8mp_blk_ctrl_probe()
749 dev_set_drvdata(dev, bc); in imx8mp_blk_ctrl_probe()
757 pm_genpd_remove(&bc->domains[i].genpd); in imx8mp_blk_ctrl_probe()
758 dev_pm_domain_detach(bc->domains[i].power_dev, true); in imx8mp_blk_ctrl_probe()
761 dev_pm_domain_detach(bc->bus_power_dev, true); in imx8mp_blk_ctrl_probe()
768 struct imx8mp_blk_ctrl *bc = dev_get_drvdata(&pdev->dev); in imx8mp_blk_ctrl_remove() local
773 for (i = 0; bc->onecell_data.num_domains; i++) { in imx8mp_blk_ctrl_remove()
774 struct imx8mp_blk_ctrl_domain *domain = &bc->domains[i]; in imx8mp_blk_ctrl_remove()
780 dev_pm_genpd_remove_notifier(bc->bus_power_dev); in imx8mp_blk_ctrl_remove()
782 dev_pm_domain_detach(bc->bus_power_dev, true); in imx8mp_blk_ctrl_remove()
788 struct imx8mp_blk_ctrl *bc = dev_get_drvdata(dev); in imx8mp_blk_ctrl_suspend() local
799 ret = pm_runtime_get_sync(bc->bus_power_dev); in imx8mp_blk_ctrl_suspend()
801 pm_runtime_put_noidle(bc->bus_power_dev); in imx8mp_blk_ctrl_suspend()
805 for (i = 0; i < bc->onecell_data.num_domains; i++) { in imx8mp_blk_ctrl_suspend()
806 struct imx8mp_blk_ctrl_domain *domain = &bc->domains[i]; in imx8mp_blk_ctrl_suspend()
819 pm_runtime_put(bc->domains[i].power_dev); in imx8mp_blk_ctrl_suspend()
821 pm_runtime_put(bc->bus_power_dev); in imx8mp_blk_ctrl_suspend()
828 struct imx8mp_blk_ctrl *bc = dev_get_drvdata(dev); in imx8mp_blk_ctrl_resume() local
831 for (i = 0; i < bc->onecell_data.num_domains; i++) in imx8mp_blk_ctrl_resume()
832 pm_runtime_put(bc->domains[i].power_dev); in imx8mp_blk_ctrl_resume()
834 pm_runtime_put(bc->bus_power_dev); in imx8mp_blk_ctrl_resume()