Lines Matching +full:apb +full:- +full:base
1 // SPDX-License-Identifier: GPL-2.0+
9 #include <linux/clk-provider.h>
19 #include <dt-bindings/power/imx8mp-power.h>
104 regmap_update_bits(clk->regmap, GPR_REG2, in clk_hsio_pll_prepare()
110 /* de-assert PLL reset */ in clk_hsio_pll_prepare()
111 regmap_update_bits(clk->regmap, GPR_REG3, PLL_RST, PLL_RST); in clk_hsio_pll_prepare()
114 regmap_update_bits(clk->regmap, GPR_REG3, PLL_CKE, PLL_CKE); in clk_hsio_pll_prepare()
116 return regmap_read_poll_timeout(clk->regmap, GPR_REG1, val, in clk_hsio_pll_prepare()
124 regmap_update_bits(clk->regmap, GPR_REG3, PLL_RST | PLL_CKE, 0); in clk_hsio_pll_unprepare()
131 return regmap_test_bits(clk->regmap, GPR_REG1, PLL_LOCK); in clk_hsio_pll_is_prepared()
154 clk_hsio_pll = devm_kzalloc(bc->dev, sizeof(*clk_hsio_pll), GFP_KERNEL); in imx8mp_hsio_blk_ctrl_probe()
156 return -ENOMEM; in imx8mp_hsio_blk_ctrl_probe()
163 clk_hsio_pll->regmap = bc->regmap; in imx8mp_hsio_blk_ctrl_probe()
164 clk_hsio_pll->hw.init = &init; in imx8mp_hsio_blk_ctrl_probe()
166 hw = &clk_hsio_pll->hw; in imx8mp_hsio_blk_ctrl_probe()
167 ret = devm_clk_hw_register(bc->bus_power_dev, hw); in imx8mp_hsio_blk_ctrl_probe()
171 return devm_of_clk_add_hw_provider(bc->dev, of_clk_hw_simple_get, hw); in imx8mp_hsio_blk_ctrl_probe()
177 switch (domain->id) { in imx8mp_hsio_blk_ctrl_power_on()
179 regmap_set_bits(bc->regmap, GPR_REG0, USB_CLOCK_MODULE_EN); in imx8mp_hsio_blk_ctrl_power_on()
182 regmap_set_bits(bc->regmap, GPR_REG0, PCIE_CLOCK_MODULE_EN); in imx8mp_hsio_blk_ctrl_power_on()
185 regmap_set_bits(bc->regmap, GPR_REG0, in imx8mp_hsio_blk_ctrl_power_on()
196 switch (domain->id) { in imx8mp_hsio_blk_ctrl_power_off()
198 regmap_clear_bits(bc->regmap, GPR_REG0, USB_CLOCK_MODULE_EN); in imx8mp_hsio_blk_ctrl_power_off()
201 regmap_clear_bits(bc->regmap, GPR_REG0, PCIE_CLOCK_MODULE_EN); in imx8mp_hsio_blk_ctrl_power_off()
204 regmap_clear_bits(bc->regmap, GPR_REG0, in imx8mp_hsio_blk_ctrl_power_off()
217 struct clk_bulk_data *usb_clk = bc->domains[IMX8MP_HSIOBLK_PD_USB].clks; in imx8mp_hsio_power_notifier()
218 int num_clks = bc->domains[IMX8MP_HSIOBLK_PD_USB].data->num_clks; in imx8mp_hsio_power_notifier()
224 * enable USB clock for a moment for the power-on ADB handshake in imx8mp_hsio_power_notifier()
230 regmap_set_bits(bc->regmap, GPR_REG0, USB_CLOCK_MODULE_EN); in imx8mp_hsio_power_notifier()
234 regmap_clear_bits(bc->regmap, GPR_REG0, USB_CLOCK_MODULE_EN); in imx8mp_hsio_power_notifier()
238 /* enable USB clock for the power-down ADB handshake to work */ in imx8mp_hsio_power_notifier()
243 regmap_set_bits(bc->regmap, GPR_REG0, USB_CLOCK_MODULE_EN); in imx8mp_hsio_power_notifier()
257 .name = "hsioblk-usb",
265 .name = "hsioblk-usb-phy1",
266 .gpc_name = "usb-phy1",
269 .name = "hsioblk-usb-phy2",
270 .gpc_name = "usb-phy2",
273 .name = "hsioblk-pcie",
277 .path_names = (const char *[]){"noc-pcie", "pcie"},
281 .name = "hsioblk-pcie-phy",
282 .gpc_name = "pcie-phy",
308 switch (domain->id) { in imx8mp_hdmi_blk_ctrl_power_on()
310 regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL0, BIT(9)); in imx8mp_hdmi_blk_ctrl_power_on()
311 regmap_set_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(16)); in imx8mp_hdmi_blk_ctrl_power_on()
314 regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL0, in imx8mp_hdmi_blk_ctrl_power_on()
317 regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(11)); in imx8mp_hdmi_blk_ctrl_power_on()
318 regmap_set_bits(bc->regmap, HDMI_RTX_RESET_CTL0, in imx8mp_hdmi_blk_ctrl_power_on()
320 regmap_set_bits(bc->regmap, HDMI_TX_CONTROL0, in imx8mp_hdmi_blk_ctrl_power_on()
324 regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(17)); in imx8mp_hdmi_blk_ctrl_power_on()
325 regmap_set_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(18)); in imx8mp_hdmi_blk_ctrl_power_on()
328 regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(28)); in imx8mp_hdmi_blk_ctrl_power_on()
329 regmap_set_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(22)); in imx8mp_hdmi_blk_ctrl_power_on()
332 regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(27) | BIT(30)); in imx8mp_hdmi_blk_ctrl_power_on()
333 regmap_set_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(20)); in imx8mp_hdmi_blk_ctrl_power_on()
336 regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL0, in imx8mp_hdmi_blk_ctrl_power_on()
338 regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL1, in imx8mp_hdmi_blk_ctrl_power_on()
341 regmap_set_bits(bc->regmap, HDMI_RTX_RESET_CTL0, in imx8mp_hdmi_blk_ctrl_power_on()
343 regmap_set_bits(bc->regmap, HDMI_TX_CONTROL0, BIT(1)); in imx8mp_hdmi_blk_ctrl_power_on()
346 regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL0, BIT(7)); in imx8mp_hdmi_blk_ctrl_power_on()
347 regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(22) | BIT(24)); in imx8mp_hdmi_blk_ctrl_power_on()
348 regmap_set_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(12)); in imx8mp_hdmi_blk_ctrl_power_on()
349 regmap_clear_bits(bc->regmap, HDMI_TX_CONTROL0, BIT(3)); in imx8mp_hdmi_blk_ctrl_power_on()
352 regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL0, BIT(11)); in imx8mp_hdmi_blk_ctrl_power_on()
355 regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(3) | BIT(4) | BIT(5)); in imx8mp_hdmi_blk_ctrl_power_on()
356 regmap_set_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(15)); in imx8mp_hdmi_blk_ctrl_power_on()
366 switch (domain->id) { in imx8mp_hdmi_blk_ctrl_power_off()
368 regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL0, BIT(9)); in imx8mp_hdmi_blk_ctrl_power_off()
369 regmap_clear_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(16)); in imx8mp_hdmi_blk_ctrl_power_off()
372 regmap_clear_bits(bc->regmap, HDMI_RTX_RESET_CTL0, in imx8mp_hdmi_blk_ctrl_power_off()
374 regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(11)); in imx8mp_hdmi_blk_ctrl_power_off()
375 regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL0, in imx8mp_hdmi_blk_ctrl_power_off()
380 regmap_clear_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(18)); in imx8mp_hdmi_blk_ctrl_power_off()
381 regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(17)); in imx8mp_hdmi_blk_ctrl_power_off()
384 regmap_clear_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(22)); in imx8mp_hdmi_blk_ctrl_power_off()
385 regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(28)); in imx8mp_hdmi_blk_ctrl_power_off()
388 regmap_clear_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(20)); in imx8mp_hdmi_blk_ctrl_power_off()
389 regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(27) | BIT(30)); in imx8mp_hdmi_blk_ctrl_power_off()
392 regmap_clear_bits(bc->regmap, HDMI_TX_CONTROL0, BIT(1)); in imx8mp_hdmi_blk_ctrl_power_off()
393 regmap_clear_bits(bc->regmap, HDMI_RTX_RESET_CTL0, in imx8mp_hdmi_blk_ctrl_power_off()
395 regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1, in imx8mp_hdmi_blk_ctrl_power_off()
398 regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL0, in imx8mp_hdmi_blk_ctrl_power_off()
402 regmap_set_bits(bc->regmap, HDMI_TX_CONTROL0, BIT(3)); in imx8mp_hdmi_blk_ctrl_power_off()
403 regmap_clear_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(12)); in imx8mp_hdmi_blk_ctrl_power_off()
404 regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL0, BIT(7)); in imx8mp_hdmi_blk_ctrl_power_off()
405 regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(22) | BIT(24)); in imx8mp_hdmi_blk_ctrl_power_off()
408 regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL0, BIT(11)); in imx8mp_hdmi_blk_ctrl_power_off()
411 regmap_clear_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(15)); in imx8mp_hdmi_blk_ctrl_power_off()
412 regmap_clear_bits(bc->regmap, HDMI_RTX_CLK_CTL1, BIT(3) | BIT(4) | BIT(5)); in imx8mp_hdmi_blk_ctrl_power_off()
429 * Contrary to other blk-ctrls the reset and clock don't clear when the in imx8mp_hdmi_power_notifier()
434 regmap_write(bc->regmap, HDMI_RTX_RESET_CTL0, 0x0); in imx8mp_hdmi_power_notifier()
435 regmap_write(bc->regmap, HDMI_RTX_CLK_CTL0, 0x0); in imx8mp_hdmi_power_notifier()
436 regmap_write(bc->regmap, HDMI_RTX_CLK_CTL1, 0x0); in imx8mp_hdmi_power_notifier()
437 regmap_set_bits(bc->regmap, HDMI_RTX_CLK_CTL0, in imx8mp_hdmi_power_notifier()
439 regmap_set_bits(bc->regmap, HDMI_RTX_RESET_CTL0, BIT(0)); in imx8mp_hdmi_power_notifier()
453 .name = "hdmiblk-irqsteer",
454 .clk_names = (const char *[]){ "apb" },
459 .name = "hdmiblk-lcdif",
460 .clk_names = (const char *[]){ "axi", "apb", "fdcc" },
463 .path_names = (const char *[]){"lcdif-hdmi"},
467 .name = "hdmiblk-pai",
468 .clk_names = (const char *[]){ "apb" },
473 .name = "hdmiblk-pvi",
474 .clk_names = (const char *[]){ "apb" },
479 .name = "hdmiblk-trng",
480 .clk_names = (const char *[]){ "apb" },
485 .name = "hdmiblk-hdmi-tx",
486 .clk_names = (const char *[]){ "apb", "ref_266m", "fdcc" },
488 .gpc_name = "hdmi-tx",
491 .name = "hdmiblk-hdmi-tx-phy",
492 .clk_names = (const char *[]){ "apb", "ref_24m" },
494 .gpc_name = "hdmi-tx-phy",
497 .name = "hdmiblk-hrv",
498 .clk_names = (const char *[]){ "axi", "apb" },
505 .name = "hdmiblk-hdcp",
506 .clk_names = (const char *[]){ "axi", "apb" },
526 const struct imx8mp_blk_ctrl_domain_data *data = domain->data; in imx8mp_blk_ctrl_power_on()
527 struct imx8mp_blk_ctrl *bc = domain->bc; in imx8mp_blk_ctrl_power_on()
531 ret = pm_runtime_resume_and_get(bc->bus_power_dev); in imx8mp_blk_ctrl_power_on()
533 dev_err(bc->dev, "failed to power up bus domain\n"); in imx8mp_blk_ctrl_power_on()
538 ret = clk_bulk_prepare_enable(data->num_clks, domain->clks); in imx8mp_blk_ctrl_power_on()
540 dev_err(bc->dev, "failed to enable clocks\n"); in imx8mp_blk_ctrl_power_on()
544 /* domain specific blk-ctrl manipulation */ in imx8mp_blk_ctrl_power_on()
545 bc->power_on(bc, domain); in imx8mp_blk_ctrl_power_on()
548 ret = pm_runtime_resume_and_get(domain->power_dev); in imx8mp_blk_ctrl_power_on()
550 dev_err(bc->dev, "failed to power up peripheral domain\n"); in imx8mp_blk_ctrl_power_on()
554 ret = icc_bulk_set_bw(domain->num_paths, domain->paths); in imx8mp_blk_ctrl_power_on()
556 dev_err(bc->dev, "failed to set icc bw\n"); in imx8mp_blk_ctrl_power_on()
558 clk_bulk_disable_unprepare(data->num_clks, domain->clks); in imx8mp_blk_ctrl_power_on()
563 clk_bulk_disable_unprepare(data->num_clks, domain->clks); in imx8mp_blk_ctrl_power_on()
565 pm_runtime_put(bc->bus_power_dev); in imx8mp_blk_ctrl_power_on()
573 const struct imx8mp_blk_ctrl_domain_data *data = domain->data; in imx8mp_blk_ctrl_power_off()
574 struct imx8mp_blk_ctrl *bc = domain->bc; in imx8mp_blk_ctrl_power_off()
577 ret = clk_bulk_prepare_enable(data->num_clks, domain->clks); in imx8mp_blk_ctrl_power_off()
579 dev_err(bc->dev, "failed to enable clocks\n"); in imx8mp_blk_ctrl_power_off()
583 /* domain specific blk-ctrl manipulation */ in imx8mp_blk_ctrl_power_off()
584 bc->power_off(bc, domain); in imx8mp_blk_ctrl_power_off()
586 clk_bulk_disable_unprepare(data->num_clks, domain->clks); in imx8mp_blk_ctrl_power_off()
589 pm_runtime_put(domain->power_dev); in imx8mp_blk_ctrl_power_off()
592 pm_runtime_put(bc->bus_power_dev); in imx8mp_blk_ctrl_power_off()
602 struct device *dev = &pdev->dev; in imx8mp_blk_ctrl_probe()
604 void __iomem *base; in imx8mp_blk_ctrl_probe() local
615 return -ENOMEM; in imx8mp_blk_ctrl_probe()
617 bc->dev = dev; in imx8mp_blk_ctrl_probe()
620 num_domains = bc_data->num_domains; in imx8mp_blk_ctrl_probe()
622 base = devm_platform_ioremap_resource(pdev, 0); in imx8mp_blk_ctrl_probe()
623 if (IS_ERR(base)) in imx8mp_blk_ctrl_probe()
624 return PTR_ERR(base); in imx8mp_blk_ctrl_probe()
626 regmap_config.max_register = bc_data->max_reg; in imx8mp_blk_ctrl_probe()
627 bc->regmap = devm_regmap_init_mmio(dev, base, ®map_config); in imx8mp_blk_ctrl_probe()
628 if (IS_ERR(bc->regmap)) in imx8mp_blk_ctrl_probe()
629 return dev_err_probe(dev, PTR_ERR(bc->regmap), in imx8mp_blk_ctrl_probe()
632 bc->domains = devm_kcalloc(dev, num_domains, in imx8mp_blk_ctrl_probe()
635 if (!bc->domains) in imx8mp_blk_ctrl_probe()
636 return -ENOMEM; in imx8mp_blk_ctrl_probe()
638 bc->onecell_data.num_domains = num_domains; in imx8mp_blk_ctrl_probe()
639 bc->onecell_data.domains = in imx8mp_blk_ctrl_probe()
642 if (!bc->onecell_data.domains) in imx8mp_blk_ctrl_probe()
643 return -ENOMEM; in imx8mp_blk_ctrl_probe()
645 bc->bus_power_dev = dev_pm_domain_attach_by_name(dev, "bus"); in imx8mp_blk_ctrl_probe()
646 if (IS_ERR(bc->bus_power_dev)) in imx8mp_blk_ctrl_probe()
647 return dev_err_probe(dev, PTR_ERR(bc->bus_power_dev), in imx8mp_blk_ctrl_probe()
650 bc->power_off = bc_data->power_off; in imx8mp_blk_ctrl_probe()
651 bc->power_on = bc_data->power_on; in imx8mp_blk_ctrl_probe()
654 const struct imx8mp_blk_ctrl_domain_data *data = &bc_data->domains[i]; in imx8mp_blk_ctrl_probe()
655 struct imx8mp_blk_ctrl_domain *domain = &bc->domains[i]; in imx8mp_blk_ctrl_probe()
658 domain->data = data; in imx8mp_blk_ctrl_probe()
659 domain->num_paths = data->num_paths; in imx8mp_blk_ctrl_probe()
661 for (j = 0; j < data->num_clks; j++) in imx8mp_blk_ctrl_probe()
662 domain->clks[j].id = data->clk_names[j]; in imx8mp_blk_ctrl_probe()
664 for (j = 0; j < data->num_paths; j++) { in imx8mp_blk_ctrl_probe()
665 domain->paths[j].name = data->path_names[j]; in imx8mp_blk_ctrl_probe()
667 domain->paths[j].avg_bw = 1; in imx8mp_blk_ctrl_probe()
668 domain->paths[j].peak_bw = 1; in imx8mp_blk_ctrl_probe()
671 ret = devm_of_icc_bulk_get(dev, data->num_paths, domain->paths); in imx8mp_blk_ctrl_probe()
673 if (ret != -EPROBE_DEFER) { in imx8mp_blk_ctrl_probe()
675 domain->num_paths = 0; in imx8mp_blk_ctrl_probe()
682 ret = devm_clk_bulk_get(dev, data->num_clks, domain->clks); in imx8mp_blk_ctrl_probe()
688 domain->power_dev = in imx8mp_blk_ctrl_probe()
689 dev_pm_domain_attach_by_name(dev, data->gpc_name); in imx8mp_blk_ctrl_probe()
690 if (IS_ERR_OR_NULL(domain->power_dev)) { in imx8mp_blk_ctrl_probe()
691 if (!domain->power_dev) in imx8mp_blk_ctrl_probe()
692 ret = -ENODEV; in imx8mp_blk_ctrl_probe()
694 ret = PTR_ERR(domain->power_dev); in imx8mp_blk_ctrl_probe()
697 data->gpc_name); in imx8mp_blk_ctrl_probe()
701 domain->genpd.name = data->name; in imx8mp_blk_ctrl_probe()
702 domain->genpd.power_on = imx8mp_blk_ctrl_power_on; in imx8mp_blk_ctrl_probe()
703 domain->genpd.power_off = imx8mp_blk_ctrl_power_off; in imx8mp_blk_ctrl_probe()
704 domain->bc = bc; in imx8mp_blk_ctrl_probe()
705 domain->id = i; in imx8mp_blk_ctrl_probe()
707 ret = pm_genpd_init(&domain->genpd, NULL, true); in imx8mp_blk_ctrl_probe()
710 dev_pm_domain_detach(domain->power_dev, true); in imx8mp_blk_ctrl_probe()
722 * self-deadlock. in imx8mp_blk_ctrl_probe()
724 lockdep_set_class(&domain->genpd.mlock, in imx8mp_blk_ctrl_probe()
727 bc->onecell_data.domains[i] = &domain->genpd; in imx8mp_blk_ctrl_probe()
730 ret = of_genpd_add_provider_onecell(dev->of_node, &bc->onecell_data); in imx8mp_blk_ctrl_probe()
736 bc->power_nb.notifier_call = bc_data->power_notifier_fn; in imx8mp_blk_ctrl_probe()
737 ret = dev_pm_genpd_add_notifier(bc->bus_power_dev, &bc->power_nb); in imx8mp_blk_ctrl_probe()
743 if (bc_data->probe) { in imx8mp_blk_ctrl_probe()
744 ret = bc_data->probe(bc); in imx8mp_blk_ctrl_probe()
754 of_genpd_del_provider(dev->of_node); in imx8mp_blk_ctrl_probe()
756 for (i--; i >= 0; i--) { in imx8mp_blk_ctrl_probe()
757 pm_genpd_remove(&bc->domains[i].genpd); in imx8mp_blk_ctrl_probe()
758 dev_pm_domain_detach(bc->domains[i].power_dev, true); in imx8mp_blk_ctrl_probe()
761 dev_pm_domain_detach(bc->bus_power_dev, true); in imx8mp_blk_ctrl_probe()
768 struct imx8mp_blk_ctrl *bc = dev_get_drvdata(&pdev->dev); in imx8mp_blk_ctrl_remove()
771 of_genpd_del_provider(pdev->dev.of_node); in imx8mp_blk_ctrl_remove()
773 for (i = 0; bc->onecell_data.num_domains; i++) { in imx8mp_blk_ctrl_remove()
774 struct imx8mp_blk_ctrl_domain *domain = &bc->domains[i]; in imx8mp_blk_ctrl_remove()
776 pm_genpd_remove(&domain->genpd); in imx8mp_blk_ctrl_remove()
777 dev_pm_domain_detach(domain->power_dev, true); in imx8mp_blk_ctrl_remove()
780 dev_pm_genpd_remove_notifier(bc->bus_power_dev); in imx8mp_blk_ctrl_remove()
782 dev_pm_domain_detach(bc->bus_power_dev, true); in imx8mp_blk_ctrl_remove()
799 ret = pm_runtime_get_sync(bc->bus_power_dev); in imx8mp_blk_ctrl_suspend()
801 pm_runtime_put_noidle(bc->bus_power_dev); in imx8mp_blk_ctrl_suspend()
805 for (i = 0; i < bc->onecell_data.num_domains; i++) { in imx8mp_blk_ctrl_suspend()
806 struct imx8mp_blk_ctrl_domain *domain = &bc->domains[i]; in imx8mp_blk_ctrl_suspend()
808 ret = pm_runtime_get_sync(domain->power_dev); in imx8mp_blk_ctrl_suspend()
810 pm_runtime_put_noidle(domain->power_dev); in imx8mp_blk_ctrl_suspend()
818 for (i--; i >= 0; i--) in imx8mp_blk_ctrl_suspend()
819 pm_runtime_put(bc->domains[i].power_dev); in imx8mp_blk_ctrl_suspend()
821 pm_runtime_put(bc->bus_power_dev); in imx8mp_blk_ctrl_suspend()
831 for (i = 0; i < bc->onecell_data.num_domains; i++) in imx8mp_blk_ctrl_resume()
832 pm_runtime_put(bc->domains[i].power_dev); in imx8mp_blk_ctrl_resume()
834 pm_runtime_put(bc->bus_power_dev); in imx8mp_blk_ctrl_resume()
847 .compatible = "fsl,imx8mp-hsio-blk-ctrl",
850 .compatible = "fsl,imx8mp-hdmi-blk-ctrl",
862 .name = "imx8mp-blk-ctrl",