Lines Matching +full:6 +full:- +full:bit
1 // SPDX-License-Identifier: GPL-2.0
15 {"PMC", BIT(0)},
16 {"OPI-DMI", BIT(1)},
17 {"SPI/eSPI", BIT(2)},
18 {"XHCI", BIT(3)},
19 {"SPA", BIT(4)},
20 {"SPB", BIT(5)},
21 {"SPC", BIT(6)},
22 {"GBE", BIT(7)},
24 {"SATA", BIT(0)},
25 {"HDA_PGD0", BIT(1)},
26 {"HDA_PGD1", BIT(2)},
27 {"HDA_PGD2", BIT(3)},
28 {"HDA_PGD3", BIT(4)},
29 {"SPD", BIT(5)},
30 {"LPSS", BIT(6)},
31 {"LPC", BIT(7)},
33 {"SMB", BIT(0)},
34 {"ISH", BIT(1)},
35 {"P2SB", BIT(2)},
36 {"NPK_VNN", BIT(3)},
37 {"SDX", BIT(4)},
38 {"SPE", BIT(5)},
39 {"Fuse", BIT(6)},
40 {"SBR8", BIT(7)},
42 {"CSME_FSC", BIT(0)},
43 {"USB3_OTG", BIT(1)},
44 {"EXI", BIT(2)},
45 {"CSE", BIT(3)},
46 {"CSME_KVM", BIT(4)},
47 {"CSME_PMT", BIT(5)},
48 {"CSME_CLINK", BIT(6)},
49 {"CSME_PTIO", BIT(7)},
51 {"CSME_USBR", BIT(0)},
52 {"CSME_SUSRAM", BIT(1)},
53 {"CSME_SMT1", BIT(2)},
54 {"CSME_SMT4", BIT(3)},
55 {"CSME_SMS2", BIT(4)},
56 {"CSME_SMS1", BIT(5)},
57 {"CSME_RTC", BIT(6)},
58 {"CSME_PSF", BIT(7)},
60 {"SBR0", BIT(0)},
61 {"SBR1", BIT(1)},
62 {"SBR2", BIT(2)},
63 {"SBR3", BIT(3)},
64 {"SBR4", BIT(4)},
65 {"SBR5", BIT(5)},
66 {"CSME_PECI", BIT(6)},
67 {"PSF1", BIT(7)},
69 {"PSF2", BIT(0)},
70 {"PSF3", BIT(1)},
71 {"PSF4", BIT(2)},
72 {"CNVI", BIT(3)},
73 {"UFS0", BIT(4)},
74 {"EMMC", BIT(5)},
75 {"SPF", BIT(6)},
76 {"SBR6", BIT(7)},
78 {"SBR7", BIT(0)},
79 {"NPK_AON", BIT(1)},
80 {"HDA_PGD4", BIT(2)},
81 {"HDA_PGD5", BIT(3)},
82 {"HDA_PGD6", BIT(4)},
83 {"PSF6", BIT(5)},
84 {"PSF7", BIT(6)},
85 {"PSF8", BIT(7)},
99 {"AUDIO_D3", BIT(0)},
100 {"OTG_D3", BIT(1)},
101 {"XHCI_D3", BIT(2)},
102 {"LPIO_D3", BIT(3)},
103 {"SDX_D3", BIT(4)},
104 {"SATA_D3", BIT(5)},
105 {"UFS0_D3", BIT(6)},
106 {"UFS1_D3", BIT(7)},
107 {"EMMC_D3", BIT(8)},
112 {"SDIO_PLL_OFF", BIT(0)},
113 {"USB2_PLL_OFF", BIT(1)},
114 {"AUDIO_PLL_OFF", BIT(2)},
115 {"OC_PLL_OFF", BIT(3)},
116 {"MAIN_PLL_OFF", BIT(4)},
117 {"XOSC_OFF", BIT(5)},
118 {"LPC_CLKS_GATED", BIT(6)},
119 {"PCIE_CLKREQS_IDLE", BIT(7)},
120 {"AUDIO_ROSC_OFF", BIT(8)},
121 {"HPET_XOSC_CLK_REQ", BIT(9)},
122 {"PMC_ROSC_SLOW_CLK", BIT(10)},
123 {"AON2_ROSC_GATED", BIT(11)},
124 {"CLKACKS_DEASSERTED", BIT(12)},
129 {"MPHY_CORE_GATED", BIT(0)},
130 {"CSME_GATED", BIT(1)},
131 {"USB2_SUS_GATED", BIT(2)},
132 {"DYN_FLEX_IO_IDLE", BIT(3)},
133 {"GBE_NO_LINK", BIT(4)},
134 {"THERM_SEN_DISABLED", BIT(5)},
135 {"PCIE_LOW_POWER", BIT(6)},
136 {"ISH_VNNAON_REQ_ACT", BIT(7)},
137 {"ISH_VNN_REQ_ACT", BIT(8)},
138 {"CNV_VNNAON_REQ_ACT", BIT(9)},
139 {"CNV_VNN_REQ_ACT", BIT(10)},
140 {"NPK_VNNON_REQ_ACT", BIT(11)},
141 {"PMSYNC_STATE_IDLE", BIT(12)},
142 {"ALST_GT_THRES", BIT(13)},
143 {"PMC_ARC_PG_READY", BIT(14)},
226 struct pmc *pmc = pmcdev->pmcs[PMC_IDX_MAIN]; in cnp_core_init()
229 pmcdev->suspend = cnl_suspend; in cnp_core_init()
230 pmcdev->resume = cnl_resume; in cnp_core_init()
232 pmc->map = &cnp_reg_map; in cnp_core_init()