40 	pr_debug("flags: 0x%x\n", data->flags);  in amd_pmf_cnqf_dump_defaults()
43 	pr_debug("t_perf_to_turbo: %u ms\n", data->t_perf_to_turbo);  in amd_pmf_cnqf_dump_defaults()
44 	pr_debug("t_balanced_to_perf: %u ms\n", data->t_balanced_to_perf);  in amd_pmf_cnqf_dump_defaults()
45 	pr_debug("t_quiet_to_balanced: %u ms\n", data->t_quiet_to_balanced);  in amd_pmf_cnqf_dump_defaults()
46 	pr_debug("t_balanced_to_quiet: %u ms\n", data->t_balanced_to_quiet);  in amd_pmf_cnqf_dump_defaults()
47 	pr_debug("t_perf_to_balanced: %u ms\n", data->t_perf_to_balanced);  in amd_pmf_cnqf_dump_defaults()
48 	pr_debug("t_turbo_to_perf: %u ms\n", data->t_turbo_to_perf);  in amd_pmf_cnqf_dump_defaults()
50 	for (i = 0 ; i < CNQF_MODE_MAX ; i++) {  in amd_pmf_cnqf_dump_defaults()
94 	return 0;  in amd_pmf_set_cnqf()
158 	u32 avg_power = 0;  in amd_pmf_trans_cnqf()
173 	for (i = 0; i < CNQF_TRANSITION_MAX; i++) {  in amd_pmf_trans_cnqf()
181 		dev_dbg(dev->dev, "avg_power: %u mW total_power: %u mW count: %u timer: %u ms\n",  in amd_pmf_trans_cnqf()
190 			tp->timer = 0;  in amd_pmf_trans_cnqf()
191 			tp->total_power = 0;  in amd_pmf_trans_cnqf()
192 			tp->count = 0;  in amd_pmf_trans_cnqf()
208 		config_store.trans_param[src][0].priority,  in amd_pmf_trans_cnqf()
218 	for (j = 0; j < CNQF_TRANSITION_MAX; j++) {  in amd_pmf_trans_cnqf()
233 	return 0;  in amd_pmf_trans_cnqf()
273 	struct cnqf_mode_settings *ms;  in amd_pmf_update_mode_set()  local
276 	ms = &config_store.mode_set[idx][CNQF_MODE_QUIET];  in amd_pmf_update_mode_set()
277 	ms->power_floor = out->ps[APMF_CNQF_QUIET].pfloor;  in amd_pmf_update_mode_set()
278 	ms->power_control.fppt = out->ps[APMF_CNQF_QUIET].fppt;  in amd_pmf_update_mode_set()
279 	ms->power_control.sppt = out->ps[APMF_CNQF_QUIET].sppt;  in amd_pmf_update_mode_set()
280 	ms->power_control.sppt_apu_only = out->ps[APMF_CNQF_QUIET].sppt_apu_only;  in amd_pmf_update_mode_set()
281 	ms->power_control.spl = out->ps[APMF_CNQF_QUIET].spl;  in amd_pmf_update_mode_set()
282 	ms->power_control.stt_min = out->ps[APMF_CNQF_QUIET].stt_min_limit;  in amd_pmf_update_mode_set()
283 	ms->power_control.stt_skin_temp[STT_TEMP_APU] =  in amd_pmf_update_mode_set()
285 	ms->power_control.stt_skin_temp[STT_TEMP_HS2] =  in amd_pmf_update_mode_set()
287 	ms->fan_control.fan_id = out->ps[APMF_CNQF_QUIET].fan_id;  in amd_pmf_update_mode_set()
290 	ms = &config_store.mode_set[idx][CNQF_MODE_BALANCE];  in amd_pmf_update_mode_set()
291 	ms->power_floor = out->ps[APMF_CNQF_BALANCE].pfloor;  in amd_pmf_update_mode_set()
292 	ms->power_control.fppt = out->ps[APMF_CNQF_BALANCE].fppt;  in amd_pmf_update_mode_set()
293 	ms->power_control.sppt = out->ps[APMF_CNQF_BALANCE].sppt;  in amd_pmf_update_mode_set()
294 	ms->power_control.sppt_apu_only = out->ps[APMF_CNQF_BALANCE].sppt_apu_only;  in amd_pmf_update_mode_set()
295 	ms->power_control.spl = out->ps[APMF_CNQF_BALANCE].spl;  in amd_pmf_update_mode_set()
296 	ms->power_control.stt_min = out->ps[APMF_CNQF_BALANCE].stt_min_limit;  in amd_pmf_update_mode_set()
297 	ms->power_control.stt_skin_temp[STT_TEMP_APU] =  in amd_pmf_update_mode_set()
299 	ms->power_control.stt_skin_temp[STT_TEMP_HS2] =  in amd_pmf_update_mode_set()
301 	ms->fan_control.fan_id = out->ps[APMF_CNQF_BALANCE].fan_id;  in amd_pmf_update_mode_set()
304 	ms = &config_store.mode_set[idx][CNQF_MODE_PERFORMANCE];  in amd_pmf_update_mode_set()
305 	ms->power_floor = out->ps[APMF_CNQF_PERFORMANCE].pfloor;  in amd_pmf_update_mode_set()
306 	ms->power_control.fppt = out->ps[APMF_CNQF_PERFORMANCE].fppt;  in amd_pmf_update_mode_set()
307 	ms->power_control.sppt = out->ps[APMF_CNQF_PERFORMANCE].sppt;  in amd_pmf_update_mode_set()
308 	ms->power_control.sppt_apu_only = out->ps[APMF_CNQF_PERFORMANCE].sppt_apu_only;  in amd_pmf_update_mode_set()
309 	ms->power_control.spl = out->ps[APMF_CNQF_PERFORMANCE].spl;  in amd_pmf_update_mode_set()
310 	ms->power_control.stt_min = out->ps[APMF_CNQF_PERFORMANCE].stt_min_limit;  in amd_pmf_update_mode_set()
311 	ms->power_control.stt_skin_temp[STT_TEMP_APU] =  in amd_pmf_update_mode_set()
313 	ms->power_control.stt_skin_temp[STT_TEMP_HS2] =  in amd_pmf_update_mode_set()
315 	ms->fan_control.fan_id = out->ps[APMF_CNQF_PERFORMANCE].fan_id;  in amd_pmf_update_mode_set()
318 	ms = &config_store.mode_set[idx][CNQF_MODE_TURBO];  in amd_pmf_update_mode_set()
319 	ms->power_floor = out->ps[APMF_CNQF_TURBO].pfloor;  in amd_pmf_update_mode_set()
320 	ms->power_control.fppt = out->ps[APMF_CNQF_TURBO].fppt;  in amd_pmf_update_mode_set()
321 	ms->power_control.sppt = out->ps[APMF_CNQF_TURBO].sppt;  in amd_pmf_update_mode_set()
322 	ms->power_control.sppt_apu_only = out->ps[APMF_CNQF_TURBO].sppt_apu_only;  in amd_pmf_update_mode_set()
323 	ms->power_control.spl = out->ps[APMF_CNQF_TURBO].spl;  in amd_pmf_update_mode_set()
324 	ms->power_control.stt_min = out->ps[APMF_CNQF_TURBO].stt_min_limit;  in amd_pmf_update_mode_set()
325 	ms->power_control.stt_skin_temp[STT_TEMP_APU] =  in amd_pmf_update_mode_set()
327 	ms->power_control.stt_skin_temp[STT_TEMP_HS2] =  in amd_pmf_update_mode_set()
329 	ms->fan_control.fan_id = out->ps[APMF_CNQF_TURBO].fan_id;  in amd_pmf_update_mode_set()
349 	for (i = 0; i < POWER_SOURCE_MAX; i++) {  in amd_pmf_load_defaults_cnqf()
367 		for (j = 0; j < CNQF_MODE_MAX; j++) {  in amd_pmf_load_defaults_cnqf()
378 	return 0;  in amd_pmf_load_defaults_cnqf()
424 	return pdev->cnqf_supported ? attr->mode : 0;  in cnqf_feature_is_visible()
452 	if (ret < 0)  in amd_pmf_init_cnqf()
466 	return 0;  in amd_pmf_init_cnqf()