Lines Matching +full:simple +full:- +full:pm +full:- +full:bus

1 # SPDX-License-Identifier: GPL-2.0-only
26 	  If you have an ACPI-compatible Chromebook, say Y or M here.
47 	  The range of memory used is 0xf00000-0x1000000, traditionally
71 	  You also need to enable the driver for the bus you are using. The
72 	  protocol for talking to the EC is defined by the bus driver.
83 	  EC through an I2C bus. This uses a simple byte-level protocol with
92 	  through rpmsg. This uses a simple byte-level protocol with a
93 	  checksum. Also since there's no addition EC-to-host interrupt, this
106 	  ISH Transport protocol (ISH-TP). This uses a simple byte-level
118 	  through a SPI bus, using a byte-level protocol. Since the EC's
120 	  'pre-amble' bytes before the response actually starts.
127 	  through a UART, using a byte-level protocol.
138 	  over an LPC bus, including the LPC Microchip EC (MEC) variant.
139 	  This uses a simple byte-level protocol with a checksum. This is
230 	tristate "ChromeOS EC Type-C Connector Control"
240 	  called cros-ec-typec.
244 	depends on HID && I2C && PM
248 	  sensor connected to the I2C bus and exposes it as a character device.
265 	tristate "ChromeOS Type-C power delivery event notifier"
269 	  If you say Y here, you get support for Type-C PD event notifications
284 	  This driver provides the support needed for the in-built electronic
290 	tristate "ChromeOS EC Type-C Switch Control"
294 	  If you say Y here, you get support for configuring the ChromeOS EC Type-C