pinctrl/visconti/pinctrl-tmpv7700.c

1 // SPDX-License-Identifier: GPL-2.0
3  * Copyright (c) 2020 TOSHIBA CORPORATION
4  * Copyright (c) 2020 Toshiba Electronic Devices & Storage Corporation
5  * Copyright (c) 2020 Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
13 #include "pinctrl-common.h"
52 	VISCONTI_PIN(PINCTRL_PIN(5, "gpio5"), REG_IO_DSEL5, 12,
62 	VISCONTI_PIN(PINCTRL_PIN(10, "gpio10"), REG_IO_DSEL6, 0,
66 	VISCONTI_PIN(PINCTRL_PIN(12, "gpio12"), REG_IO_DSEL6, 8,
67 		    REG_IO_PUDE2, REG_IO_PUDSEL2, 10),
68 	VISCONTI_PIN(PINCTRL_PIN(13, "gpio13"), REG_IO_DSEL6, 12,
71 		    REG_IO_PUDE2, REG_IO_PUDSEL2, 12),
84 	VISCONTI_PIN(PINCTRL_PIN(21, "gpio21"), REG_IO_DSEL7, 12,
106 	VISCONTI_PIN(PINCTRL_PIN(32, "spi_sck"), REG_IO_DSEL4, 12,
117 VISCONTI_PINS(i2c2, 12, 13);
136 VISCONTI_PINS(spi3, 8, 9, 10);
137 VISCONTI_PINS(spi4, 12, 13, 14);
141 VISCONTI_PINS(uart1, 8, 9, 10, 11);
142 VISCONTI_PINS(uart2, 12, 13, 14, 15);
150 VISCONTI_PINS(pwm2_gpio10, 10);
152 VISCONTI_PINS(pwm0_gpio12, 12);
176 	VISCONTI_PIN_GROUP(spi1_cs, REG_PINMUX2, GENMASK(15, 12), 0x00001000),
178 	VISCONTI_PIN_GROUP(spi3_cs, REG_PINMUX3, GENMASK(15, 12), 0x00001000),
180 	VISCONTI_PIN_GROUP(spi5_cs, REG_PINMUX4, GENMASK(15, 12), 0x00001000),
181 	VISCONTI_PIN_GROUP(spi6_cs, REG_PINMUX5, GENMASK(15, 12), 0x00001000),
200 	VISCONTI_PIN_GROUP(pwm3_gpio11, REG_PINMUX3, GENMASK(15, 12), 0x00005000),
208 	VISCONTI_PIN_GROUP(pwm3_gpio19, REG_PINMUX4, GENMASK(15, 12), 0x00005000),
284 	tmpv7700_GPIO_MUX(REG_PINMUX2, GENMASK(15, 12)),
292 	tmpv7700_GPIO_MUX(REG_PINMUX3, GENMASK(15, 12)),
300 	tmpv7700_GPIO_MUX(REG_PINMUX4, GENMASK(15, 12)),
308 	tmpv7700_GPIO_MUX(REG_PINMUX5, GENMASK(15, 12)),
339 	{ .compatible = "toshiba,tmpv7708-pinctrl", },
346 		.name = "tmpv7700-pinctrl",