Lines Matching +full:1 +full:g
254 const struct tegra_pingroup *g; in tegra_pinctrl_set_mux() local
258 g = &pmx->soc->groups[group]; in tegra_pinctrl_set_mux()
260 if (WARN_ON(g->mux_reg < 0)) in tegra_pinctrl_set_mux()
263 for (i = 0; i < ARRAY_SIZE(g->funcs); i++) { in tegra_pinctrl_set_mux()
264 if (g->funcs[i] == function) in tegra_pinctrl_set_mux()
267 if (WARN_ON(i == ARRAY_SIZE(g->funcs))) in tegra_pinctrl_set_mux()
270 val = pmx_readl(pmx, g->mux_bank, g->mux_reg); in tegra_pinctrl_set_mux()
271 val &= ~(0x3 << g->mux_bit); in tegra_pinctrl_set_mux()
272 val |= i << g->mux_bit; in tegra_pinctrl_set_mux()
273 pmx_writel(pmx, val, g->mux_bank, g->mux_reg); in tegra_pinctrl_set_mux()
360 const struct tegra_pingroup *g, in tegra_pinconf_reg() argument
367 *bank = g->pupd_bank; in tegra_pinconf_reg()
368 *reg = g->pupd_reg; in tegra_pinconf_reg()
369 *bit = g->pupd_bit; in tegra_pinconf_reg()
373 *bank = g->tri_bank; in tegra_pinconf_reg()
374 *reg = g->tri_reg; in tegra_pinconf_reg()
375 *bit = g->tri_bit; in tegra_pinconf_reg()
376 *width = 1; in tegra_pinconf_reg()
379 *bank = g->mux_bank; in tegra_pinconf_reg()
380 *reg = g->mux_reg; in tegra_pinconf_reg()
381 *bit = g->einput_bit; in tegra_pinconf_reg()
382 *width = 1; in tegra_pinconf_reg()
385 *bank = g->mux_bank; in tegra_pinconf_reg()
386 *reg = g->mux_reg; in tegra_pinconf_reg()
387 *bit = g->odrain_bit; in tegra_pinconf_reg()
388 *width = 1; in tegra_pinconf_reg()
391 *bank = g->mux_bank; in tegra_pinconf_reg()
392 *reg = g->mux_reg; in tegra_pinconf_reg()
393 *bit = g->lock_bit; in tegra_pinconf_reg()
394 *width = 1; in tegra_pinconf_reg()
397 *bank = g->mux_bank; in tegra_pinconf_reg()
398 *reg = g->mux_reg; in tegra_pinconf_reg()
399 *bit = g->ioreset_bit; in tegra_pinconf_reg()
400 *width = 1; in tegra_pinconf_reg()
403 *bank = g->mux_bank; in tegra_pinconf_reg()
404 *reg = g->mux_reg; in tegra_pinconf_reg()
405 *bit = g->rcv_sel_bit; in tegra_pinconf_reg()
406 *width = 1; in tegra_pinconf_reg()
410 *bank = g->mux_bank; in tegra_pinconf_reg()
411 *reg = g->mux_reg; in tegra_pinconf_reg()
413 *bank = g->drv_bank; in tegra_pinconf_reg()
414 *reg = g->drv_reg; in tegra_pinconf_reg()
416 *bit = g->hsm_bit; in tegra_pinconf_reg()
417 *width = 1; in tegra_pinconf_reg()
421 *bank = g->mux_bank; in tegra_pinconf_reg()
422 *reg = g->mux_reg; in tegra_pinconf_reg()
424 *bank = g->drv_bank; in tegra_pinconf_reg()
425 *reg = g->drv_reg; in tegra_pinconf_reg()
427 *bit = g->schmitt_bit; in tegra_pinconf_reg()
428 *width = 1; in tegra_pinconf_reg()
431 *bank = g->drv_bank; in tegra_pinconf_reg()
432 *reg = g->drv_reg; in tegra_pinconf_reg()
433 *bit = g->lpmd_bit; in tegra_pinconf_reg()
437 *bank = g->drv_bank; in tegra_pinconf_reg()
438 *reg = g->drv_reg; in tegra_pinconf_reg()
439 *bit = g->drvdn_bit; in tegra_pinconf_reg()
440 *width = g->drvdn_width; in tegra_pinconf_reg()
443 *bank = g->drv_bank; in tegra_pinconf_reg()
444 *reg = g->drv_reg; in tegra_pinconf_reg()
445 *bit = g->drvup_bit; in tegra_pinconf_reg()
446 *width = g->drvup_width; in tegra_pinconf_reg()
449 *bank = g->drv_bank; in tegra_pinconf_reg()
450 *reg = g->drv_reg; in tegra_pinconf_reg()
451 *bit = g->slwf_bit; in tegra_pinconf_reg()
452 *width = g->slwf_width; in tegra_pinconf_reg()
455 *bank = g->drv_bank; in tegra_pinconf_reg()
456 *reg = g->drv_reg; in tegra_pinconf_reg()
457 *bit = g->slwr_bit; in tegra_pinconf_reg()
458 *width = g->slwr_width; in tegra_pinconf_reg()
462 *bank = g->mux_bank; in tegra_pinconf_reg()
463 *reg = g->mux_reg; in tegra_pinconf_reg()
465 *bank = g->drv_bank; in tegra_pinconf_reg()
466 *reg = g->drv_reg; in tegra_pinconf_reg()
468 *bit = g->drvtype_bit; in tegra_pinconf_reg()
490 param, prop, g->name); in tegra_pinconf_reg()
519 const struct tegra_pingroup *g; in tegra_pinconf_group_get() local
525 g = &pmx->soc->groups[group]; in tegra_pinconf_group_get()
527 ret = tegra_pinconf_reg(pmx, g, param, true, &bank, ®, &bit, in tegra_pinconf_group_get()
533 mask = (1 << width) - 1; in tegra_pinconf_group_get()
548 const struct tegra_pingroup *g; in tegra_pinconf_group_set() local
554 g = &pmx->soc->groups[group]; in tegra_pinconf_group_set()
560 ret = tegra_pinconf_reg(pmx, g, param, true, &bank, ®, &bit, in tegra_pinconf_group_set()
576 if (width == 1) in tegra_pinconf_group_set()
580 mask = (1 << width) - 1; in tegra_pinconf_group_set()
609 return comma + 1; in strip_prefix()
616 const struct tegra_pingroup *g; in tegra_pinconf_group_dbg_show() local
622 g = &pmx->soc->groups[group]; in tegra_pinconf_group_dbg_show()
625 ret = tegra_pinconf_reg(pmx, g, cfg_params[i].param, false, in tegra_pinconf_group_dbg_show()
632 val &= (1 << width) - 1; in tegra_pinconf_group_dbg_show()
638 if (g->mux_reg >= 0) { in tegra_pinconf_group_dbg_show()
640 val = pmx_readl(pmx, g->mux_bank, g->mux_reg); in tegra_pinconf_group_dbg_show()
641 val = g->funcs[(val >> g->mux_bit) & 0x3]; in tegra_pinconf_group_dbg_show()
682 const struct tegra_pingroup *g; in tegra_pinctrl_clear_parked_bits() local
686 g = &pmx->soc->groups[i]; in tegra_pinctrl_clear_parked_bits()
687 if (g->parked_bitmask > 0) { in tegra_pinctrl_clear_parked_bits()
690 if (g->mux_reg != -1) { in tegra_pinctrl_clear_parked_bits()
691 bank = g->mux_bank; in tegra_pinctrl_clear_parked_bits()
692 reg = g->mux_reg; in tegra_pinctrl_clear_parked_bits()
694 bank = g->drv_bank; in tegra_pinctrl_clear_parked_bits()
695 reg = g->drv_reg; in tegra_pinctrl_clear_parked_bits()
699 val &= ~g->parked_bitmask; in tegra_pinctrl_clear_parked_bits()
814 const struct tegra_pingroup *g = &pmx->soc->groups[gn]; in tegra_pinctrl_probe() local
816 if (g->mux_reg == -1) in tegra_pinctrl_probe()
820 if (g->funcs[gfn] == fn) in tegra_pinctrl_probe()
827 *group_pins++ = g->name; in tegra_pinctrl_probe()