Lines Matching refs:SUNXI_FUNCTION
25 SUNXI_FUNCTION(0x0, "gpio_in"),
26 SUNXI_FUNCTION(0x1, "gpio_out"),
27 SUNXI_FUNCTION(0x2, "uart2"), /* TX */
28 SUNXI_FUNCTION(0x3, "jtag"), /* MS0 */
31 SUNXI_FUNCTION(0x0, "gpio_in"),
32 SUNXI_FUNCTION(0x1, "gpio_out"),
33 SUNXI_FUNCTION(0x2, "uart2"), /* RX */
34 SUNXI_FUNCTION(0x3, "jtag"), /* CK0 */
37 SUNXI_FUNCTION(0x0, "gpio_in"),
38 SUNXI_FUNCTION(0x1, "gpio_out"),
39 SUNXI_FUNCTION(0x2, "uart2"), /* RTS */
40 SUNXI_FUNCTION(0x3, "jtag"), /* DO0 */
43 SUNXI_FUNCTION(0x0, "gpio_in"),
44 SUNXI_FUNCTION(0x1, "gpio_out"),
45 SUNXI_FUNCTION(0x2, "uart2"), /* CTS */
46 SUNXI_FUNCTION(0x3, "jtag"), /* DI0 */
49 SUNXI_FUNCTION(0x0, "gpio_in"),
50 SUNXI_FUNCTION(0x1, "gpio_out"),
51 SUNXI_FUNCTION(0x2, "i2s0"), /* LRCK */
52 SUNXI_FUNCTION(0x3, "tdm"), /* LRCK */
55 SUNXI_FUNCTION(0x0, "gpio_in"),
56 SUNXI_FUNCTION(0x1, "gpio_out"),
57 SUNXI_FUNCTION(0x2, "i2s0"), /* BCLK */
58 SUNXI_FUNCTION(0x3, "tdm"), /* BCLK */
61 SUNXI_FUNCTION(0x0, "gpio_in"),
62 SUNXI_FUNCTION(0x1, "gpio_out"),
63 SUNXI_FUNCTION(0x2, "i2s0"), /* DOUT */
64 SUNXI_FUNCTION(0x3, "tdm"), /* DOUT */
67 SUNXI_FUNCTION(0x0, "gpio_in"),
68 SUNXI_FUNCTION(0x1, "gpio_out"),
69 SUNXI_FUNCTION(0x2, "i2s0"), /* DIN */
70 SUNXI_FUNCTION(0x3, "tdm"), /* DIN */
73 SUNXI_FUNCTION(0x0, "gpio_in"),
74 SUNXI_FUNCTION(0x1, "gpio_out"),
75 SUNXI_FUNCTION(0x2, "i2s0"), /* MCLK */
76 SUNXI_FUNCTION(0x3, "tdm"), /* MCLK */
79 SUNXI_FUNCTION(0x0, "gpio_in"),
80 SUNXI_FUNCTION(0x1, "gpio_out"),
81 SUNXI_FUNCTION(0x2, "uart0"), /* TX */
84 SUNXI_FUNCTION(0x0, "gpio_in"),
85 SUNXI_FUNCTION(0x1, "gpio_out"),
86 SUNXI_FUNCTION(0x2, "uart0"), /* RX */
90 SUNXI_FUNCTION(0x0, "gpio_in"),
91 SUNXI_FUNCTION(0x1, "gpio_out"),
92 SUNXI_FUNCTION(0x2, "nand0"), /* WE */
93 SUNXI_FUNCTION(0x3, "spi0")), /* MOSI */
95 SUNXI_FUNCTION(0x0, "gpio_in"),
96 SUNXI_FUNCTION(0x1, "gpio_out"),
97 SUNXI_FUNCTION(0x2, "nand0"), /* ALE */
98 SUNXI_FUNCTION(0x3, "spi0")), /* MISO */
100 SUNXI_FUNCTION(0x0, "gpio_in"),
101 SUNXI_FUNCTION(0x1, "gpio_out"),
102 SUNXI_FUNCTION(0x2, "nand0"), /* CLE */
103 SUNXI_FUNCTION(0x3, "spi0")), /* CLK */
105 SUNXI_FUNCTION(0x0, "gpio_in"),
106 SUNXI_FUNCTION(0x1, "gpio_out"),
107 SUNXI_FUNCTION(0x2, "nand0"), /* CE1 */
108 SUNXI_FUNCTION(0x3, "spi0")), /* CS */
110 SUNXI_FUNCTION(0x0, "gpio_in"),
111 SUNXI_FUNCTION(0x1, "gpio_out"),
112 SUNXI_FUNCTION(0x2, "nand0")), /* CE0 */
114 SUNXI_FUNCTION(0x0, "gpio_in"),
115 SUNXI_FUNCTION(0x1, "gpio_out"),
116 SUNXI_FUNCTION(0x2, "nand0"), /* RE */
117 SUNXI_FUNCTION(0x3, "mmc2")), /* CLK */
119 SUNXI_FUNCTION(0x0, "gpio_in"),
120 SUNXI_FUNCTION(0x1, "gpio_out"),
121 SUNXI_FUNCTION(0x2, "nand0"), /* RB0 */
122 SUNXI_FUNCTION(0x3, "mmc2")), /* CMD */
124 SUNXI_FUNCTION(0x0, "gpio_in"),
125 SUNXI_FUNCTION(0x1, "gpio_out"),
126 SUNXI_FUNCTION(0x2, "nand0")), /* RB1 */
128 SUNXI_FUNCTION(0x0, "gpio_in"),
129 SUNXI_FUNCTION(0x1, "gpio_out"),
130 SUNXI_FUNCTION(0x2, "nand0"), /* DQ0 */
131 SUNXI_FUNCTION(0x3, "mmc2")), /* D0 */
133 SUNXI_FUNCTION(0x0, "gpio_in"),
134 SUNXI_FUNCTION(0x1, "gpio_out"),
135 SUNXI_FUNCTION(0x2, "nand0"), /* DQ1 */
136 SUNXI_FUNCTION(0x3, "mmc2")), /* D1 */
138 SUNXI_FUNCTION(0x0, "gpio_in"),
139 SUNXI_FUNCTION(0x1, "gpio_out"),
140 SUNXI_FUNCTION(0x2, "nand0"), /* DQ2 */
141 SUNXI_FUNCTION(0x3, "mmc2")), /* D2 */
143 SUNXI_FUNCTION(0x0, "gpio_in"),
144 SUNXI_FUNCTION(0x1, "gpio_out"),
145 SUNXI_FUNCTION(0x2, "nand0"), /* DQ3 */
146 SUNXI_FUNCTION(0x3, "mmc2")), /* D3 */
148 SUNXI_FUNCTION(0x0, "gpio_in"),
149 SUNXI_FUNCTION(0x1, "gpio_out"),
150 SUNXI_FUNCTION(0x2, "nand0"), /* DQ4 */
151 SUNXI_FUNCTION(0x3, "mmc2")), /* D4 */
153 SUNXI_FUNCTION(0x0, "gpio_in"),
154 SUNXI_FUNCTION(0x1, "gpio_out"),
155 SUNXI_FUNCTION(0x2, "nand0"), /* DQ5 */
156 SUNXI_FUNCTION(0x3, "mmc2")), /* D5 */
158 SUNXI_FUNCTION(0x0, "gpio_in"),
159 SUNXI_FUNCTION(0x1, "gpio_out"),
160 SUNXI_FUNCTION(0x2, "nand0"), /* DQ6 */
161 SUNXI_FUNCTION(0x3, "mmc2")), /* D6 */
163 SUNXI_FUNCTION(0x0, "gpio_in"),
164 SUNXI_FUNCTION(0x1, "gpio_out"),
165 SUNXI_FUNCTION(0x2, "nand0"), /* DQ7 */
166 SUNXI_FUNCTION(0x3, "mmc2")), /* D7 */
168 SUNXI_FUNCTION(0x0, "gpio_in"),
169 SUNXI_FUNCTION(0x1, "gpio_out"),
170 SUNXI_FUNCTION(0x2, "nand0"), /* DQS */
171 SUNXI_FUNCTION(0x3, "mmc2")), /* RST */
173 SUNXI_FUNCTION(0x0, "gpio_in"),
174 SUNXI_FUNCTION(0x1, "gpio_out"),
175 SUNXI_FUNCTION(0x2, "nand0")), /* CE2 */
177 SUNXI_FUNCTION(0x0, "gpio_in"),
178 SUNXI_FUNCTION(0x1, "gpio_out"),
179 SUNXI_FUNCTION(0x2, "nand0")), /* CE3 */
182 SUNXI_FUNCTION(0x0, "gpio_in"),
183 SUNXI_FUNCTION(0x1, "gpio_out"),
184 SUNXI_FUNCTION(0x2, "lcd0"), /* D2 */
185 SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII RXD3 */
187 SUNXI_FUNCTION(0x0, "gpio_in"),
188 SUNXI_FUNCTION(0x1, "gpio_out"),
189 SUNXI_FUNCTION(0x2, "lcd0"), /* D3 */
190 SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII RXD2 */
192 SUNXI_FUNCTION(0x0, "gpio_in"),
193 SUNXI_FUNCTION(0x1, "gpio_out"),
194 SUNXI_FUNCTION(0x2, "lcd0"), /* D4 */
195 SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII RXD1 */
197 SUNXI_FUNCTION(0x0, "gpio_in"),
198 SUNXI_FUNCTION(0x1, "gpio_out"),
199 SUNXI_FUNCTION(0x2, "lcd0"), /* D5 */
200 SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII RXD0 */
202 SUNXI_FUNCTION(0x0, "gpio_in"),
203 SUNXI_FUNCTION(0x1, "gpio_out"),
204 SUNXI_FUNCTION(0x2, "lcd0"), /* D6 */
205 SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII RXCK */
207 SUNXI_FUNCTION(0x0, "gpio_in"),
208 SUNXI_FUNCTION(0x1, "gpio_out"),
209 SUNXI_FUNCTION(0x2, "lcd0"), /* D7 */
210 SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII RXDV */
212 SUNXI_FUNCTION(0x0, "gpio_in"),
213 SUNXI_FUNCTION(0x1, "gpio_out"),
214 SUNXI_FUNCTION(0x2, "lcd0"), /* D10 */
215 SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII RXERR */
217 SUNXI_FUNCTION(0x0, "gpio_in"),
218 SUNXI_FUNCTION(0x1, "gpio_out"),
219 SUNXI_FUNCTION(0x2, "lcd0"), /* D11 */
220 SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII TXD3 */
222 SUNXI_FUNCTION(0x0, "gpio_in"),
223 SUNXI_FUNCTION(0x1, "gpio_out"),
224 SUNXI_FUNCTION(0x2, "lcd0"), /* D12 */
225 SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII TXD2 */
227 SUNXI_FUNCTION(0x0, "gpio_in"),
228 SUNXI_FUNCTION(0x1, "gpio_out"),
229 SUNXI_FUNCTION(0x2, "lcd0"), /* D13 */
230 SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII TXD1 */
232 SUNXI_FUNCTION(0x0, "gpio_in"),
233 SUNXI_FUNCTION(0x1, "gpio_out"),
234 SUNXI_FUNCTION(0x2, "lcd0"), /* D14 */
235 SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII TXD0 */
237 SUNXI_FUNCTION(0x0, "gpio_in"),
238 SUNXI_FUNCTION(0x1, "gpio_out"),
239 SUNXI_FUNCTION(0x2, "lcd0"), /* D15 */
240 SUNXI_FUNCTION(0x4, "gmac")), /* RGMII-NULL / MII-CRS */
242 SUNXI_FUNCTION(0x0, "gpio_in"),
243 SUNXI_FUNCTION(0x1, "gpio_out"),
244 SUNXI_FUNCTION(0x2, "lcd0"), /* D18 */
245 SUNXI_FUNCTION(0x3, "lvds0"), /* VP0 */
246 SUNXI_FUNCTION(0x4, "gmac")), /* GTXCK / ETXCK */
248 SUNXI_FUNCTION(0x0, "gpio_in"),
249 SUNXI_FUNCTION(0x1, "gpio_out"),
250 SUNXI_FUNCTION(0x2, "lcd0"), /* D19 */
251 SUNXI_FUNCTION(0x3, "lvds0"), /* VN0 */
252 SUNXI_FUNCTION(0x4, "gmac")), /* GTXCTL / ETXEL */
254 SUNXI_FUNCTION(0x0, "gpio_in"),
255 SUNXI_FUNCTION(0x1, "gpio_out"),
256 SUNXI_FUNCTION(0x2, "lcd0"), /* D20 */
257 SUNXI_FUNCTION(0x3, "lvds0"), /* VP1 */
258 SUNXI_FUNCTION(0x4, "gmac")), /* GNULL / ETXERR */
260 SUNXI_FUNCTION(0x0, "gpio_in"),
261 SUNXI_FUNCTION(0x1, "gpio_out"),
262 SUNXI_FUNCTION(0x2, "lcd0"), /* D21 */
263 SUNXI_FUNCTION(0x3, "lvds0"), /* VN1 */
264 SUNXI_FUNCTION(0x4, "gmac")), /* GCLKIN / ECOL */
266 SUNXI_FUNCTION(0x0, "gpio_in"),
267 SUNXI_FUNCTION(0x1, "gpio_out"),
268 SUNXI_FUNCTION(0x2, "lcd0"), /* D22 */
269 SUNXI_FUNCTION(0x3, "lvds0"), /* VP2 */
270 SUNXI_FUNCTION(0x4, "gmac")), /* GMDC */
272 SUNXI_FUNCTION(0x0, "gpio_in"),
273 SUNXI_FUNCTION(0x1, "gpio_out"),
274 SUNXI_FUNCTION(0x2, "lcd0"), /* D23 */
275 SUNXI_FUNCTION(0x3, "lvds0"), /* VN2 */
276 SUNXI_FUNCTION(0x4, "gmac")), /* GMDIO */
278 SUNXI_FUNCTION(0x0, "gpio_in"),
279 SUNXI_FUNCTION(0x1, "gpio_out"),
280 SUNXI_FUNCTION(0x2, "lcd0"), /* CLK */
281 SUNXI_FUNCTION(0x3, "lvds0")), /* VPC */
283 SUNXI_FUNCTION(0x0, "gpio_in"),
284 SUNXI_FUNCTION(0x1, "gpio_out"),
285 SUNXI_FUNCTION(0x2, "lcd0"), /* DE */
286 SUNXI_FUNCTION(0x3, "lvds0")), /* VNC */
288 SUNXI_FUNCTION(0x0, "gpio_in"),
289 SUNXI_FUNCTION(0x1, "gpio_out"),
290 SUNXI_FUNCTION(0x2, "lcd0"), /* HSYNC */
291 SUNXI_FUNCTION(0x3, "lvds0")), /* VP3 */
293 SUNXI_FUNCTION(0x0, "gpio_in"),
294 SUNXI_FUNCTION(0x1, "gpio_out"),
295 SUNXI_FUNCTION(0x2, "lcd0"), /* VSYNC */
296 SUNXI_FUNCTION(0x3, "lvds0")), /* VN3 */
298 SUNXI_FUNCTION(0x0, "gpio_in"),
299 SUNXI_FUNCTION(0x1, "gpio_out"),
300 SUNXI_FUNCTION(0x2, "pwm")), /* PWM */
302 SUNXI_FUNCTION(0x0, "gpio_in"),
303 SUNXI_FUNCTION(0x1, "gpio_out")),
306 SUNXI_FUNCTION(0x0, "gpio_in"),
307 SUNXI_FUNCTION(0x1, "gpio_out"),
308 SUNXI_FUNCTION(0x2, "csi"), /* PCLK */
309 SUNXI_FUNCTION(0x4, "ccir")), /* CLK */
311 SUNXI_FUNCTION(0x0, "gpio_in"),
312 SUNXI_FUNCTION(0x1, "gpio_out"),
313 SUNXI_FUNCTION(0x2, "csi"), /* MCLK */
314 SUNXI_FUNCTION(0x4, "ccir")), /* DE */
316 SUNXI_FUNCTION(0x0, "gpio_in"),
317 SUNXI_FUNCTION(0x1, "gpio_out"),
318 SUNXI_FUNCTION(0x2, "csi"), /* HSYNC */
319 SUNXI_FUNCTION(0x4, "ccir")), /* HSYNC */
321 SUNXI_FUNCTION(0x0, "gpio_in"),
322 SUNXI_FUNCTION(0x1, "gpio_out"),
323 SUNXI_FUNCTION(0x2, "csi"), /* VSYNC */
324 SUNXI_FUNCTION(0x4, "ccir")), /* VSYNC */
326 SUNXI_FUNCTION(0x0, "gpio_in"),
327 SUNXI_FUNCTION(0x1, "gpio_out"),
328 SUNXI_FUNCTION(0x2, "csi")), /* D0 */
330 SUNXI_FUNCTION(0x0, "gpio_in"),
331 SUNXI_FUNCTION(0x1, "gpio_out"),
332 SUNXI_FUNCTION(0x2, "csi")), /* D1 */
334 SUNXI_FUNCTION(0x0, "gpio_in"),
335 SUNXI_FUNCTION(0x1, "gpio_out"),
336 SUNXI_FUNCTION(0x2, "csi"), /* D2 */
337 SUNXI_FUNCTION(0x4, "ccir")), /* D0 */
339 SUNXI_FUNCTION(0x0, "gpio_in"),
340 SUNXI_FUNCTION(0x1, "gpio_out"),
341 SUNXI_FUNCTION(0x2, "csi"), /* D3 */
342 SUNXI_FUNCTION(0x4, "ccir")), /* D1 */
344 SUNXI_FUNCTION(0x0, "gpio_in"),
345 SUNXI_FUNCTION(0x1, "gpio_out"),
346 SUNXI_FUNCTION(0x2, "csi"), /* D4 */
347 SUNXI_FUNCTION(0x4, "ccir")), /* D2 */
349 SUNXI_FUNCTION(0x0, "gpio_in"),
350 SUNXI_FUNCTION(0x1, "gpio_out"),
351 SUNXI_FUNCTION(0x2, "csi"), /* D5 */
352 SUNXI_FUNCTION(0x4, "ccir")), /* D3 */
354 SUNXI_FUNCTION(0x0, "gpio_in"),
355 SUNXI_FUNCTION(0x1, "gpio_out"),
356 SUNXI_FUNCTION(0x2, "csi"), /* D6 */
357 SUNXI_FUNCTION(0x3, "uart4"), /* TX */
358 SUNXI_FUNCTION(0x4, "ccir")), /* D4 */
360 SUNXI_FUNCTION(0x0, "gpio_in"),
361 SUNXI_FUNCTION(0x1, "gpio_out"),
362 SUNXI_FUNCTION(0x2, "csi"), /* D7 */
363 SUNXI_FUNCTION(0x3, "uart4"), /* RX */
364 SUNXI_FUNCTION(0x4, "ccir")), /* D5 */
366 SUNXI_FUNCTION(0x0, "gpio_in"),
367 SUNXI_FUNCTION(0x1, "gpio_out"),
368 SUNXI_FUNCTION(0x2, "csi"), /* D8 */
369 SUNXI_FUNCTION(0x3, "uart4"), /* RTS */
370 SUNXI_FUNCTION(0x4, "ccir")), /* D6 */
372 SUNXI_FUNCTION(0x0, "gpio_in"),
373 SUNXI_FUNCTION(0x1, "gpio_out"),
374 SUNXI_FUNCTION(0x2, "csi"), /* D9 */
375 SUNXI_FUNCTION(0x3, "uart4"), /* CTS */
376 SUNXI_FUNCTION(0x4, "ccir")), /* D7 */
378 SUNXI_FUNCTION(0x0, "gpio_in"),
379 SUNXI_FUNCTION(0x1, "gpio_out"),
380 SUNXI_FUNCTION(0x2, "csi"), /* SCK */
381 SUNXI_FUNCTION(0x3, "i2c2")), /* SCK */
383 SUNXI_FUNCTION(0x0, "gpio_in"),
384 SUNXI_FUNCTION(0x1, "gpio_out"),
385 SUNXI_FUNCTION(0x2, "csi"), /* SDA */
386 SUNXI_FUNCTION(0x3, "i2c2")), /* SDA */
388 SUNXI_FUNCTION(0x0, "gpio_in"),
389 SUNXI_FUNCTION(0x1, "gpio_out")),
391 SUNXI_FUNCTION(0x0, "gpio_in"),
392 SUNXI_FUNCTION(0x1, "gpio_out")),
394 SUNXI_FUNCTION(0x0, "gpio_in"),
395 SUNXI_FUNCTION(0x1, "gpio_out"),
396 SUNXI_FUNCTION(0x3, "spdif")), /* DOUT */
398 SUNXI_FUNCTION(0x0, "gpio_in"),
399 SUNXI_FUNCTION(0x1, "gpio_out")),
402 SUNXI_FUNCTION(0x0, "gpio_in"),
403 SUNXI_FUNCTION(0x1, "gpio_out"),
404 SUNXI_FUNCTION(0x2, "mmc0"), /* D1 */
405 SUNXI_FUNCTION(0x3, "jtag")), /* MS1 */
407 SUNXI_FUNCTION(0x0, "gpio_in"),
408 SUNXI_FUNCTION(0x1, "gpio_out"),
409 SUNXI_FUNCTION(0x2, "mmc0"), /* D0 */
410 SUNXI_FUNCTION(0x3, "jtag")), /* DI1 */
412 SUNXI_FUNCTION(0x0, "gpio_in"),
413 SUNXI_FUNCTION(0x1, "gpio_out"),
414 SUNXI_FUNCTION(0x2, "mmc0"), /* CLK */
415 SUNXI_FUNCTION(0x3, "uart0")), /* TX */
417 SUNXI_FUNCTION(0x0, "gpio_in"),
418 SUNXI_FUNCTION(0x1, "gpio_out"),
419 SUNXI_FUNCTION(0x2, "mmc0"), /* CMD */
420 SUNXI_FUNCTION(0x3, "jtag")), /* DO1 */
422 SUNXI_FUNCTION(0x0, "gpio_in"),
423 SUNXI_FUNCTION(0x1, "gpio_out"),
424 SUNXI_FUNCTION(0x2, "mmc0"), /* D3 */
425 SUNXI_FUNCTION(0x3, "uart0")), /* RX */
427 SUNXI_FUNCTION(0x0, "gpio_in"),
428 SUNXI_FUNCTION(0x1, "gpio_out"),
429 SUNXI_FUNCTION(0x2, "mmc0"), /* D2 */
430 SUNXI_FUNCTION(0x3, "jtag")), /* CK1 */
432 SUNXI_FUNCTION(0x0, "gpio_in"),
433 SUNXI_FUNCTION(0x1, "gpio_out")),
436 SUNXI_FUNCTION(0x0, "gpio_in"),
437 SUNXI_FUNCTION(0x1, "gpio_out"),
438 SUNXI_FUNCTION(0x2, "mmc1"), /* CLK */
441 SUNXI_FUNCTION(0x0, "gpio_in"),
442 SUNXI_FUNCTION(0x1, "gpio_out"),
443 SUNXI_FUNCTION(0x2, "mmc1"), /* CMD */
446 SUNXI_FUNCTION(0x0, "gpio_in"),
447 SUNXI_FUNCTION(0x1, "gpio_out"),
448 SUNXI_FUNCTION(0x2, "mmc1"), /* D0 */
451 SUNXI_FUNCTION(0x0, "gpio_in"),
452 SUNXI_FUNCTION(0x1, "gpio_out"),
453 SUNXI_FUNCTION(0x2, "mmc1"), /* D1 */
456 SUNXI_FUNCTION(0x0, "gpio_in"),
457 SUNXI_FUNCTION(0x1, "gpio_out"),
458 SUNXI_FUNCTION(0x2, "mmc1"), /* D2 */
461 SUNXI_FUNCTION(0x0, "gpio_in"),
462 SUNXI_FUNCTION(0x1, "gpio_out"),
463 SUNXI_FUNCTION(0x2, "mmc1"), /* D3 */
466 SUNXI_FUNCTION(0x0, "gpio_in"),
467 SUNXI_FUNCTION(0x1, "gpio_out"),
468 SUNXI_FUNCTION(0x2, "uart1"), /* TX */
469 SUNXI_FUNCTION(0x3, "spi1"), /* CS */
472 SUNXI_FUNCTION(0x0, "gpio_in"),
473 SUNXI_FUNCTION(0x1, "gpio_out"),
474 SUNXI_FUNCTION(0x2, "uart1"), /* RX */
475 SUNXI_FUNCTION(0x3, "spi1"), /* CLK */
478 SUNXI_FUNCTION(0x0, "gpio_in"),
479 SUNXI_FUNCTION(0x1, "gpio_out"),
480 SUNXI_FUNCTION(0x2, "uart1"), /* RTS */
481 SUNXI_FUNCTION(0x3, "spi1"), /* MOSI */
484 SUNXI_FUNCTION(0x0, "gpio_in"),
485 SUNXI_FUNCTION(0x1, "gpio_out"),
486 SUNXI_FUNCTION(0x2, "uart1"), /* CTS */
487 SUNXI_FUNCTION(0x3, "spi1"), /* MISO */
490 SUNXI_FUNCTION(0x0, "gpio_in"),
491 SUNXI_FUNCTION(0x1, "gpio_out"),
492 SUNXI_FUNCTION(0x2, "i2s1"), /* BCLK */
493 SUNXI_FUNCTION(0x3, "uart3"), /* TX */
496 SUNXI_FUNCTION(0x0, "gpio_in"),
497 SUNXI_FUNCTION(0x1, "gpio_out"),
498 SUNXI_FUNCTION(0x2, "i2s1"), /* LRCK */
499 SUNXI_FUNCTION(0x3, "uart3"), /* RX */
502 SUNXI_FUNCTION(0x0, "gpio_in"),
503 SUNXI_FUNCTION(0x1, "gpio_out"),
504 SUNXI_FUNCTION(0x2, "i2s1"), /* DOUT */
505 SUNXI_FUNCTION(0x3, "uart3"), /* RTS */
508 SUNXI_FUNCTION(0x0, "gpio_in"),
509 SUNXI_FUNCTION(0x1, "gpio_out"),
510 SUNXI_FUNCTION(0x2, "i2s1"), /* DIN */
511 SUNXI_FUNCTION(0x3, "uart3"), /* CTS */
515 SUNXI_FUNCTION(0x0, "gpio_in"),
516 SUNXI_FUNCTION(0x1, "gpio_out"),
517 SUNXI_FUNCTION(0x2, "i2c0"), /* SCK */
520 SUNXI_FUNCTION(0x0, "gpio_in"),
521 SUNXI_FUNCTION(0x1, "gpio_out"),
522 SUNXI_FUNCTION(0x2, "i2c0"), /* SDA */
525 SUNXI_FUNCTION(0x0, "gpio_in"),
526 SUNXI_FUNCTION(0x1, "gpio_out"),
527 SUNXI_FUNCTION(0x2, "i2c1"), /* SCK */
530 SUNXI_FUNCTION(0x0, "gpio_in"),
531 SUNXI_FUNCTION(0x1, "gpio_out"),
532 SUNXI_FUNCTION(0x2, "i2c1"), /* SDA */
535 SUNXI_FUNCTION(0x0, "gpio_in"),
536 SUNXI_FUNCTION(0x1, "gpio_out"),
537 SUNXI_FUNCTION(0x2, "i2c2"), /* SCK */
540 SUNXI_FUNCTION(0x0, "gpio_in"),
541 SUNXI_FUNCTION(0x1, "gpio_out"),
542 SUNXI_FUNCTION(0x2, "i2c2"), /* SDA */
545 SUNXI_FUNCTION(0x0, "gpio_in"),
546 SUNXI_FUNCTION(0x1, "gpio_out"),
547 SUNXI_FUNCTION(0x2, "hdmi"), /* HSCL */
550 SUNXI_FUNCTION(0x0, "gpio_in"),
551 SUNXI_FUNCTION(0x1, "gpio_out"),
552 SUNXI_FUNCTION(0x2, "hdmi"), /* HSDA */
555 SUNXI_FUNCTION(0x0, "gpio_in"),
556 SUNXI_FUNCTION(0x1, "gpio_out"),
557 SUNXI_FUNCTION(0x2, "hdmi"), /* HCEC */
560 SUNXI_FUNCTION(0x0, "gpio_in"),
561 SUNXI_FUNCTION(0x1, "gpio_out"),
564 SUNXI_FUNCTION(0x0, "gpio_in"),
565 SUNXI_FUNCTION(0x1, "gpio_out"),
568 SUNXI_FUNCTION(0x0, "gpio_in"),
569 SUNXI_FUNCTION(0x1, "gpio_out"),