Lines Matching refs:SUNXI_FUNCTION
17 SUNXI_FUNCTION(0x2, "emac")), /* ERXD1 */
19 SUNXI_FUNCTION(0x2, "emac")), /* ERXD0 */
21 SUNXI_FUNCTION(0x2, "emac")), /* ECRS_DV */
23 SUNXI_FUNCTION(0x2, "emac")), /* ERXERR */
25 SUNXI_FUNCTION(0x2, "emac")), /* ETXD1 */
27 SUNXI_FUNCTION(0x2, "emac")), /* ETXD0 */
29 SUNXI_FUNCTION(0x2, "emac")), /* ETXCK */
31 SUNXI_FUNCTION(0x2, "emac")), /* ETXEN */
33 SUNXI_FUNCTION(0x2, "emac")), /* EMDC */
35 SUNXI_FUNCTION(0x2, "emac")), /* EMDIO */
38 SUNXI_FUNCTION(0x2, "ccir"), /* CLK */
41 SUNXI_FUNCTION(0x2, "ccir"), /* DE */
44 SUNXI_FUNCTION(0x2, "ccir"), /* HSYNC */
47 SUNXI_FUNCTION(0x2, "ccir"), /* VSYNC */
50 SUNXI_FUNCTION(0x2, "ccir"), /* DO0 */
53 SUNXI_FUNCTION(0x2, "ccir"), /* DO1 */
56 SUNXI_FUNCTION(0x2, "ccir"), /* DO2 */
59 SUNXI_FUNCTION(0x2, "ccir"), /* DO3 */
62 SUNXI_FUNCTION(0x2, "ccir"), /* DO4 */
65 SUNXI_FUNCTION(0x2, "ccir"), /* DO5 */
68 SUNXI_FUNCTION(0x2, "ccir"), /* DO6 */
71 SUNXI_FUNCTION(0x2, "ccir"), /* DO7 */
74 SUNXI_FUNCTION(0x2, "i2s3"), /* SYNC */
75 SUNXI_FUNCTION(0x4, "h_i2s3"), /* SYNC */
78 SUNXI_FUNCTION(0x2, "i2s3"), /* CLK */
79 SUNXI_FUNCTION(0x4, "h_i2s3"), /* CLK */
82 SUNXI_FUNCTION(0x2, "i2s3"), /* DOUT */
83 SUNXI_FUNCTION(0x4, "h_i2s3"), /* DOUT */
86 SUNXI_FUNCTION(0x2, "i2s3"), /* DIN */
87 SUNXI_FUNCTION(0x4, "h_i2s3"), /* DIN */
90 SUNXI_FUNCTION(0x2, "i2s3"), /* MCLK */
91 SUNXI_FUNCTION(0x4, "h_i2s3"), /* MCLK */
94 SUNXI_FUNCTION(0x2, "i2c3"), /* SCK */
97 SUNXI_FUNCTION(0x2, "i2c3"), /* SDA */
100 SUNXI_FUNCTION(0x2, "pwm1"),
103 SUNXI_FUNCTION(0x0, "gpio_in"),
107 SUNXI_FUNCTION(0x0, "gpio_in"),
108 SUNXI_FUNCTION(0x1, "gpio_out"),
109 SUNXI_FUNCTION(0x2, "nand0"), /* WE */
110 SUNXI_FUNCTION(0x4, "spi0")), /* CLK */
112 SUNXI_FUNCTION(0x0, "gpio_in"),
113 SUNXI_FUNCTION(0x1, "gpio_out"),
114 SUNXI_FUNCTION(0x2, "nand0"), /* ALE */
115 SUNXI_FUNCTION(0x3, "mmc2")), /* DS */
117 SUNXI_FUNCTION(0x0, "gpio_in"),
118 SUNXI_FUNCTION(0x1, "gpio_out"),
119 SUNXI_FUNCTION(0x2, "nand0"), /* CLE */
120 SUNXI_FUNCTION(0x4, "spi0")), /* MOSI */
122 SUNXI_FUNCTION(0x0, "gpio_in"),
123 SUNXI_FUNCTION(0x1, "gpio_out"),
124 SUNXI_FUNCTION(0x2, "nand0"), /* CE0 */
125 SUNXI_FUNCTION(0x4, "spi0")), /* MISO */
127 SUNXI_FUNCTION(0x0, "gpio_in"),
128 SUNXI_FUNCTION(0x1, "gpio_out"),
129 SUNXI_FUNCTION(0x2, "nand0"), /* RE */
130 SUNXI_FUNCTION(0x3, "mmc2")), /* CLK */
132 SUNXI_FUNCTION(0x0, "gpio_in"),
133 SUNXI_FUNCTION(0x1, "gpio_out"),
134 SUNXI_FUNCTION(0x2, "nand0"), /* RB0 */
135 SUNXI_FUNCTION(0x3, "mmc2"), /* CMD */
136 SUNXI_FUNCTION(0x4, "spi0")), /* CS */
138 SUNXI_FUNCTION(0x0, "gpio_in"),
139 SUNXI_FUNCTION(0x1, "gpio_out"),
140 SUNXI_FUNCTION(0x2, "nand0"), /* DQ0 */
141 SUNXI_FUNCTION(0x3, "mmc2"), /* D0 */
142 SUNXI_FUNCTION(0x4, "spi0")), /* HOLD */
144 SUNXI_FUNCTION(0x0, "gpio_in"),
145 SUNXI_FUNCTION(0x1, "gpio_out"),
146 SUNXI_FUNCTION(0x2, "nand0"), /* DQ1 */
147 SUNXI_FUNCTION(0x3, "mmc2"), /* D1 */
148 SUNXI_FUNCTION(0x4, "spi0")), /* WP */
150 SUNXI_FUNCTION(0x0, "gpio_in"),
151 SUNXI_FUNCTION(0x1, "gpio_out"),
152 SUNXI_FUNCTION(0x2, "nand0"), /* DQ2 */
153 SUNXI_FUNCTION(0x3, "mmc2")), /* D2 */
155 SUNXI_FUNCTION(0x0, "gpio_in"),
156 SUNXI_FUNCTION(0x1, "gpio_out"),
157 SUNXI_FUNCTION(0x2, "nand0"), /* DQ3 */
158 SUNXI_FUNCTION(0x3, "mmc2")), /* D3 */
160 SUNXI_FUNCTION(0x0, "gpio_in"),
161 SUNXI_FUNCTION(0x1, "gpio_out"),
162 SUNXI_FUNCTION(0x2, "nand0"), /* DQ4 */
163 SUNXI_FUNCTION(0x3, "mmc2")), /* D4 */
165 SUNXI_FUNCTION(0x0, "gpio_in"),
166 SUNXI_FUNCTION(0x1, "gpio_out"),
167 SUNXI_FUNCTION(0x2, "nand0"), /* DQ5 */
168 SUNXI_FUNCTION(0x3, "mmc2")), /* D5 */
170 SUNXI_FUNCTION(0x0, "gpio_in"),
171 SUNXI_FUNCTION(0x1, "gpio_out"),
172 SUNXI_FUNCTION(0x2, "nand0"), /* DQ6 */
173 SUNXI_FUNCTION(0x3, "mmc2")), /* D6 */
175 SUNXI_FUNCTION(0x0, "gpio_in"),
176 SUNXI_FUNCTION(0x1, "gpio_out"),
177 SUNXI_FUNCTION(0x2, "nand0"), /* DQ7 */
178 SUNXI_FUNCTION(0x3, "mmc2")), /* D7 */
180 SUNXI_FUNCTION(0x0, "gpio_in"),
181 SUNXI_FUNCTION(0x1, "gpio_out"),
182 SUNXI_FUNCTION(0x2, "nand0"), /* DQS */
183 SUNXI_FUNCTION(0x3, "mmc2")), /* RST */
185 SUNXI_FUNCTION(0x0, "gpio_in"),
186 SUNXI_FUNCTION(0x1, "gpio_out"),
187 SUNXI_FUNCTION(0x2, "nand0")), /* CE1 */
189 SUNXI_FUNCTION(0x0, "gpio_in"),
190 SUNXI_FUNCTION(0x1, "gpio_out"),
191 SUNXI_FUNCTION(0x2, "nand0")), /* RB1 */
194 SUNXI_FUNCTION(0x0, "gpio_in"),
195 SUNXI_FUNCTION(0x1, "gpio_out"),
196 SUNXI_FUNCTION(0x2, "lcd0"), /* D2 */
197 SUNXI_FUNCTION(0x3, "ts0"), /* CLK */
198 SUNXI_FUNCTION(0x4, "csi"), /* PCLK */
199 SUNXI_FUNCTION(0x5, "emac")), /* ERXD3 */
201 SUNXI_FUNCTION(0x0, "gpio_in"),
202 SUNXI_FUNCTION(0x1, "gpio_out"),
203 SUNXI_FUNCTION(0x2, "lcd0"), /* D3 */
204 SUNXI_FUNCTION(0x3, "ts0"), /* ERR */
205 SUNXI_FUNCTION(0x4, "csi"), /* MCLK */
206 SUNXI_FUNCTION(0x5, "emac")), /* ERXD2 */
208 SUNXI_FUNCTION(0x0, "gpio_in"),
209 SUNXI_FUNCTION(0x1, "gpio_out"),
210 SUNXI_FUNCTION(0x2, "lcd0"), /* D4 */
211 SUNXI_FUNCTION(0x3, "ts0"), /* SYNC */
212 SUNXI_FUNCTION(0x4, "csi"), /* HSYNC */
213 SUNXI_FUNCTION(0x5, "emac")), /* ERXD1 */
215 SUNXI_FUNCTION(0x0, "gpio_in"),
216 SUNXI_FUNCTION(0x1, "gpio_out"),
217 SUNXI_FUNCTION(0x2, "lcd0"), /* D5 */
218 SUNXI_FUNCTION(0x3, "ts0"), /* DVLD */
219 SUNXI_FUNCTION(0x4, "csi"), /* VSYNC */
220 SUNXI_FUNCTION(0x5, "emac")), /* ERXD0 */
222 SUNXI_FUNCTION(0x0, "gpio_in"),
223 SUNXI_FUNCTION(0x1, "gpio_out"),
224 SUNXI_FUNCTION(0x2, "lcd0"), /* D6 */
225 SUNXI_FUNCTION(0x3, "ts0"), /* D0 */
226 SUNXI_FUNCTION(0x4, "csi"), /* D0 */
227 SUNXI_FUNCTION(0x5, "emac")), /* ERXCK */
229 SUNXI_FUNCTION(0x0, "gpio_in"),
230 SUNXI_FUNCTION(0x1, "gpio_out"),
231 SUNXI_FUNCTION(0x2, "lcd0"), /* D7 */
232 SUNXI_FUNCTION(0x3, "ts0"), /* D1 */
233 SUNXI_FUNCTION(0x4, "csi"), /* D1 */
234 SUNXI_FUNCTION(0x5, "emac")), /* ERXCTL */
236 SUNXI_FUNCTION(0x0, "gpio_in"),
237 SUNXI_FUNCTION(0x1, "gpio_out"),
238 SUNXI_FUNCTION(0x2, "lcd0"), /* D10 */
239 SUNXI_FUNCTION(0x3, "ts0"), /* D2 */
240 SUNXI_FUNCTION(0x4, "csi"), /* D2 */
241 SUNXI_FUNCTION(0x5, "emac")), /* ENULL */
243 SUNXI_FUNCTION(0x0, "gpio_in"),
244 SUNXI_FUNCTION(0x1, "gpio_out"),
245 SUNXI_FUNCTION(0x2, "lcd0"), /* D11 */
246 SUNXI_FUNCTION(0x3, "ts0"), /* D3 */
247 SUNXI_FUNCTION(0x4, "csi"), /* D3 */
248 SUNXI_FUNCTION(0x5, "emac")), /* ETXD3 */
250 SUNXI_FUNCTION(0x0, "gpio_in"),
251 SUNXI_FUNCTION(0x1, "gpio_out"),
252 SUNXI_FUNCTION(0x2, "lcd0"), /* D12 */
253 SUNXI_FUNCTION(0x3, "ts0"), /* D4 */
254 SUNXI_FUNCTION(0x4, "csi"), /* D4 */
255 SUNXI_FUNCTION(0x5, "emac")), /* ETXD2 */
257 SUNXI_FUNCTION(0x0, "gpio_in"),
258 SUNXI_FUNCTION(0x1, "gpio_out"),
259 SUNXI_FUNCTION(0x2, "lcd0"), /* D13 */
260 SUNXI_FUNCTION(0x3, "ts0"), /* D5 */
261 SUNXI_FUNCTION(0x4, "csi"), /* D5 */
262 SUNXI_FUNCTION(0x5, "emac")), /* ETXD1 */
264 SUNXI_FUNCTION(0x0, "gpio_in"),
265 SUNXI_FUNCTION(0x1, "gpio_out"),
266 SUNXI_FUNCTION(0x2, "lcd0"), /* D14 */
267 SUNXI_FUNCTION(0x3, "ts0"), /* D6 */
268 SUNXI_FUNCTION(0x4, "csi"), /* D6 */
269 SUNXI_FUNCTION(0x5, "emac")), /* ETXD0 */
271 SUNXI_FUNCTION(0x0, "gpio_in"),
272 SUNXI_FUNCTION(0x1, "gpio_out"),
273 SUNXI_FUNCTION(0x2, "lcd0"), /* D15 */
274 SUNXI_FUNCTION(0x3, "ts0"), /* D7 */
275 SUNXI_FUNCTION(0x4, "csi"), /* D7 */
276 SUNXI_FUNCTION(0x5, "emac")), /* ETXCK */
278 SUNXI_FUNCTION(0x0, "gpio_in"),
279 SUNXI_FUNCTION(0x1, "gpio_out"),
280 SUNXI_FUNCTION(0x2, "lcd0"), /* D18 */
281 SUNXI_FUNCTION(0x3, "ts1"), /* CLK */
282 SUNXI_FUNCTION(0x4, "csi"), /* SCK */
283 SUNXI_FUNCTION(0x5, "emac")), /* ETXCTL */
285 SUNXI_FUNCTION(0x0, "gpio_in"),
286 SUNXI_FUNCTION(0x1, "gpio_out"),
287 SUNXI_FUNCTION(0x2, "lcd0"), /* D19 */
288 SUNXI_FUNCTION(0x3, "ts1"), /* ERR */
289 SUNXI_FUNCTION(0x4, "csi"), /* SDA */
290 SUNXI_FUNCTION(0x5, "emac")), /* ECLKIN */
292 SUNXI_FUNCTION(0x0, "gpio_in"),
293 SUNXI_FUNCTION(0x1, "gpio_out"),
294 SUNXI_FUNCTION(0x2, "lcd0"), /* D20 */
295 SUNXI_FUNCTION(0x3, "ts1"), /* SYNC */
296 SUNXI_FUNCTION(0x4, "dmic"), /* CLK */
297 SUNXI_FUNCTION(0x5, "csi")), /* D8 */
299 SUNXI_FUNCTION(0x0, "gpio_in"),
300 SUNXI_FUNCTION(0x1, "gpio_out"),
301 SUNXI_FUNCTION(0x2, "lcd0"), /* D21 */
302 SUNXI_FUNCTION(0x3, "ts1"), /* DVLD */
303 SUNXI_FUNCTION(0x4, "dmic"), /* DATA0 */
304 SUNXI_FUNCTION(0x5, "csi")), /* D9 */
306 SUNXI_FUNCTION(0x0, "gpio_in"),
307 SUNXI_FUNCTION(0x1, "gpio_out"),
308 SUNXI_FUNCTION(0x2, "lcd0"), /* D22 */
309 SUNXI_FUNCTION(0x3, "ts1"), /* D0 */
310 SUNXI_FUNCTION(0x4, "dmic")), /* DATA1 */
312 SUNXI_FUNCTION(0x0, "gpio_in"),
313 SUNXI_FUNCTION(0x1, "gpio_out"),
314 SUNXI_FUNCTION(0x2, "lcd0"), /* D23 */
315 SUNXI_FUNCTION(0x3, "ts2"), /* CLK */
316 SUNXI_FUNCTION(0x4, "dmic")), /* DATA2 */
318 SUNXI_FUNCTION(0x0, "gpio_in"),
319 SUNXI_FUNCTION(0x1, "gpio_out"),
320 SUNXI_FUNCTION(0x2, "lcd0"), /* CLK */
321 SUNXI_FUNCTION(0x3, "ts2"), /* ERR */
322 SUNXI_FUNCTION(0x4, "dmic")), /* DATA3 */
324 SUNXI_FUNCTION(0x0, "gpio_in"),
325 SUNXI_FUNCTION(0x1, "gpio_out"),
326 SUNXI_FUNCTION(0x2, "lcd0"), /* DE */
327 SUNXI_FUNCTION(0x3, "ts2"), /* SYNC */
328 SUNXI_FUNCTION(0x4, "uart2"), /* TX */
329 SUNXI_FUNCTION(0x5, "emac")), /* EMDC */
331 SUNXI_FUNCTION(0x0, "gpio_in"),
332 SUNXI_FUNCTION(0x1, "gpio_out"),
333 SUNXI_FUNCTION(0x2, "lcd0"), /* HSYNC */
334 SUNXI_FUNCTION(0x3, "ts2"), /* DVLD */
335 SUNXI_FUNCTION(0x4, "uart2"), /* RX */
336 SUNXI_FUNCTION(0x5, "emac")), /* EMDIO */
338 SUNXI_FUNCTION(0x0, "gpio_in"),
339 SUNXI_FUNCTION(0x1, "gpio_out"),
340 SUNXI_FUNCTION(0x2, "lcd0"), /* VSYNC */
341 SUNXI_FUNCTION(0x3, "ts2"), /* D0 */
342 SUNXI_FUNCTION(0x4, "uart2")), /* RTS */
344 SUNXI_FUNCTION(0x0, "gpio_in"),
345 SUNXI_FUNCTION(0x1, "gpio_out"),
346 SUNXI_FUNCTION(0x2, "pwm"), /* PWM0 */
347 SUNXI_FUNCTION(0x3, "ts3"), /* CLK */
348 SUNXI_FUNCTION(0x4, "uart2")), /* CTS */
350 SUNXI_FUNCTION(0x0, "gpio_in"),
351 SUNXI_FUNCTION(0x1, "gpio_out"),
352 SUNXI_FUNCTION(0x2, "i2c2"), /* SCK */
353 SUNXI_FUNCTION(0x3, "ts3"), /* ERR */
354 SUNXI_FUNCTION(0x4, "uart3"), /* TX */
355 SUNXI_FUNCTION(0x5, "jtag")), /* MS */
357 SUNXI_FUNCTION(0x0, "gpio_in"),
358 SUNXI_FUNCTION(0x1, "gpio_out"),
359 SUNXI_FUNCTION(0x2, "i2c2"), /* SDA */
360 SUNXI_FUNCTION(0x3, "ts3"), /* SYNC */
361 SUNXI_FUNCTION(0x4, "uart3"), /* RX */
362 SUNXI_FUNCTION(0x5, "jtag")), /* CK */
364 SUNXI_FUNCTION(0x0, "gpio_in"),
365 SUNXI_FUNCTION(0x1, "gpio_out"),
366 SUNXI_FUNCTION(0x2, "i2c0"), /* SCK */
367 SUNXI_FUNCTION(0x3, "ts3"), /* DVLD */
368 SUNXI_FUNCTION(0x4, "uart3"), /* RTS */
369 SUNXI_FUNCTION(0x5, "jtag")), /* DO */
371 SUNXI_FUNCTION(0x0, "gpio_in"),
372 SUNXI_FUNCTION(0x1, "gpio_out"),
373 SUNXI_FUNCTION(0x2, "i2c0"), /* SDA */
374 SUNXI_FUNCTION(0x3, "ts3"), /* D0 */
375 SUNXI_FUNCTION(0x4, "uart3"), /* CTS */
376 SUNXI_FUNCTION(0x5, "jtag")), /* DI */
379 SUNXI_FUNCTION(0x0, "gpio_in"),
380 SUNXI_FUNCTION(0x1, "gpio_out"),
381 SUNXI_FUNCTION(0x2, "mmc0"), /* D1 */
382 SUNXI_FUNCTION(0x3, "jtag"), /* MS */
385 SUNXI_FUNCTION(0x0, "gpio_in"),
386 SUNXI_FUNCTION(0x1, "gpio_out"),
387 SUNXI_FUNCTION(0x2, "mmc0"), /* D0 */
388 SUNXI_FUNCTION(0x3, "jtag"), /* DI */
391 SUNXI_FUNCTION(0x0, "gpio_in"),
392 SUNXI_FUNCTION(0x1, "gpio_out"),
393 SUNXI_FUNCTION(0x2, "mmc0"), /* CLK */
394 SUNXI_FUNCTION(0x3, "uart0"), /* TX */
397 SUNXI_FUNCTION(0x0, "gpio_in"),
398 SUNXI_FUNCTION(0x1, "gpio_out"),
399 SUNXI_FUNCTION(0x2, "mmc0"), /* CMD */
400 SUNXI_FUNCTION(0x3, "jtag"), /* DO */
403 SUNXI_FUNCTION(0x0, "gpio_in"),
404 SUNXI_FUNCTION(0x1, "gpio_out"),
405 SUNXI_FUNCTION(0x2, "mmc0"), /* D3 */
406 SUNXI_FUNCTION(0x3, "uart0"), /* RX */
409 SUNXI_FUNCTION(0x0, "gpio_in"),
410 SUNXI_FUNCTION(0x1, "gpio_out"),
411 SUNXI_FUNCTION(0x2, "mmc0"), /* D2 */
412 SUNXI_FUNCTION(0x3, "jtag"), /* CK */
415 SUNXI_FUNCTION(0x0, "gpio_in"),
416 SUNXI_FUNCTION(0x1, "gpio_out"),
420 SUNXI_FUNCTION(0x0, "gpio_in"),
421 SUNXI_FUNCTION(0x1, "gpio_out"),
422 SUNXI_FUNCTION(0x2, "mmc1"), /* CLK */
425 SUNXI_FUNCTION(0x0, "gpio_in"),
426 SUNXI_FUNCTION(0x1, "gpio_out"),
427 SUNXI_FUNCTION(0x2, "mmc1"), /* CMD */
430 SUNXI_FUNCTION(0x0, "gpio_in"),
431 SUNXI_FUNCTION(0x1, "gpio_out"),
432 SUNXI_FUNCTION(0x2, "mmc1"), /* D0 */
435 SUNXI_FUNCTION(0x0, "gpio_in"),
436 SUNXI_FUNCTION(0x1, "gpio_out"),
437 SUNXI_FUNCTION(0x2, "mmc1"), /* D1 */
440 SUNXI_FUNCTION(0x0, "gpio_in"),
441 SUNXI_FUNCTION(0x1, "gpio_out"),
442 SUNXI_FUNCTION(0x2, "mmc1"), /* D2 */
445 SUNXI_FUNCTION(0x0, "gpio_in"),
446 SUNXI_FUNCTION(0x1, "gpio_out"),
447 SUNXI_FUNCTION(0x2, "mmc1"), /* D3 */
450 SUNXI_FUNCTION(0x0, "gpio_in"),
451 SUNXI_FUNCTION(0x1, "gpio_out"),
452 SUNXI_FUNCTION(0x2, "uart1"), /* TX */
455 SUNXI_FUNCTION(0x0, "gpio_in"),
456 SUNXI_FUNCTION(0x1, "gpio_out"),
457 SUNXI_FUNCTION(0x2, "uart1"), /* RX */
460 SUNXI_FUNCTION(0x0, "gpio_in"),
461 SUNXI_FUNCTION(0x1, "gpio_out"),
462 SUNXI_FUNCTION(0x2, "uart1"), /* RTS */
463 SUNXI_FUNCTION(0x4, "sim0"), /* VPPEN */
466 SUNXI_FUNCTION(0x0, "gpio_in"),
467 SUNXI_FUNCTION(0x1, "gpio_out"),
468 SUNXI_FUNCTION(0x2, "uart1"), /* CTS */
469 SUNXI_FUNCTION(0x4, "sim0"), /* VPPPP */
472 SUNXI_FUNCTION(0x0, "gpio_in"),
473 SUNXI_FUNCTION(0x1, "gpio_out"),
474 SUNXI_FUNCTION(0x2, "i2s2"), /* SYNC */
475 SUNXI_FUNCTION(0x3, "h_i2s2"), /* SYNC */
476 SUNXI_FUNCTION(0x4, "sim0"), /* PWREN */
479 SUNXI_FUNCTION(0x0, "gpio_in"),
480 SUNXI_FUNCTION(0x1, "gpio_out"),
481 SUNXI_FUNCTION(0x2, "i2s2"), /* CLK */
482 SUNXI_FUNCTION(0x3, "h_i2s2"), /* CLK */
483 SUNXI_FUNCTION(0x4, "sim0"), /* CLK */
486 SUNXI_FUNCTION(0x0, "gpio_in"),
487 SUNXI_FUNCTION(0x1, "gpio_out"),
488 SUNXI_FUNCTION(0x2, "i2s2"), /* DOUT */
489 SUNXI_FUNCTION(0x3, "h_i2s2"), /* DOUT */
490 SUNXI_FUNCTION(0x4, "sim0"), /* DATA */
493 SUNXI_FUNCTION(0x0, "gpio_in"),
494 SUNXI_FUNCTION(0x1, "gpio_out"),
495 SUNXI_FUNCTION(0x2, "i2s2"), /* DIN */
496 SUNXI_FUNCTION(0x3, "h_i2s2"), /* DIN */
497 SUNXI_FUNCTION(0x4, "sim0"), /* RST */
500 SUNXI_FUNCTION(0x0, "gpio_in"),
501 SUNXI_FUNCTION(0x1, "gpio_out"),
502 SUNXI_FUNCTION(0x2, "i2s2"), /* MCLK */
503 SUNXI_FUNCTION(0x3, "h_i2s2"), /* MCLK */
504 SUNXI_FUNCTION(0x4, "sim0"), /* DET */
508 SUNXI_FUNCTION(0x0, "gpio_in"),
509 SUNXI_FUNCTION(0x1, "gpio_out"),
510 SUNXI_FUNCTION(0x2, "uart0"), /* TX */
511 SUNXI_FUNCTION(0x3, "i2s0"), /* SYNC */
512 SUNXI_FUNCTION(0x4, "h_i2s0"), /* SYNC */
513 SUNXI_FUNCTION(0x5, "sim1"), /* VPPEN */
516 SUNXI_FUNCTION(0x0, "gpio_in"),
517 SUNXI_FUNCTION(0x1, "gpio_out"),
518 SUNXI_FUNCTION(0x2, "uart0"), /* RX */
519 SUNXI_FUNCTION(0x3, "i2s0"), /* CLK */
520 SUNXI_FUNCTION(0x4, "h_i2s0"), /* CLK */
521 SUNXI_FUNCTION(0x5, "sim1"), /* VPPPP */
524 SUNXI_FUNCTION(0x0, "gpio_in"),
525 SUNXI_FUNCTION(0x1, "gpio_out"),
526 SUNXI_FUNCTION(0x2, "ir_tx"),
527 SUNXI_FUNCTION(0x3, "i2s0"), /* DOUT */
528 SUNXI_FUNCTION(0x4, "h_i2s0"), /* DOUT */
529 SUNXI_FUNCTION(0x5, "sim1"), /* PWREN */
532 SUNXI_FUNCTION(0x0, "gpio_in"),
533 SUNXI_FUNCTION(0x1, "gpio_out"),
534 SUNXI_FUNCTION(0x2, "spi1"), /* CS */
535 SUNXI_FUNCTION(0x3, "i2s0"), /* DIN */
536 SUNXI_FUNCTION(0x4, "h_i2s0"), /* DIN */
537 SUNXI_FUNCTION(0x5, "sim1"), /* CLK */
540 SUNXI_FUNCTION(0x0, "gpio_in"),
541 SUNXI_FUNCTION(0x1, "gpio_out"),
542 SUNXI_FUNCTION(0x2, "spi1"), /* CLK */
543 SUNXI_FUNCTION(0x3, "i2s0"), /* MCLK */
544 SUNXI_FUNCTION(0x4, "h_i2s0"), /* MCLK */
545 SUNXI_FUNCTION(0x5, "sim1"), /* DATA */
548 SUNXI_FUNCTION(0x0, "gpio_in"),
549 SUNXI_FUNCTION(0x1, "gpio_out"),
550 SUNXI_FUNCTION(0x2, "spi1"), /* MOSI */
551 SUNXI_FUNCTION(0x3, "spdif"), /* MCLK */
552 SUNXI_FUNCTION(0x4, "i2c1"), /* SCK */
553 SUNXI_FUNCTION(0x5, "sim1"), /* RST */
556 SUNXI_FUNCTION(0x0, "gpio_in"),
557 SUNXI_FUNCTION(0x1, "gpio_out"),
558 SUNXI_FUNCTION(0x2, "spi1"), /* MISO */
559 SUNXI_FUNCTION(0x3, "spdif"), /* IN */
560 SUNXI_FUNCTION(0x4, "i2c1"), /* SDA */
561 SUNXI_FUNCTION(0x5, "sim1"), /* DET */
564 SUNXI_FUNCTION(0x0, "gpio_in"),
565 SUNXI_FUNCTION(0x1, "gpio_out"),
566 SUNXI_FUNCTION(0x3, "spdif"), /* OUT */
569 SUNXI_FUNCTION(0x0, "gpio_in"),
570 SUNXI_FUNCTION(0x1, "gpio_out"),
571 SUNXI_FUNCTION(0x2, "hdmi"), /* HSCL */
574 SUNXI_FUNCTION(0x0, "gpio_in"),
575 SUNXI_FUNCTION(0x1, "gpio_out"),
576 SUNXI_FUNCTION(0x2, "hdmi"), /* HSDA */
579 SUNXI_FUNCTION(0x0, "gpio_in"),
580 SUNXI_FUNCTION(0x1, "gpio_out"),
581 SUNXI_FUNCTION(0x2, "hdmi"), /* HCEC */