Lines Matching refs:SUNXI_FUNCTION
18 SUNXI_FUNCTION(0x0, "gpio_in"),
19 SUNXI_FUNCTION(0x1, "gpio_out"),
20 SUNXI_FUNCTION(0x2, "uart2"), /* TX */
21 SUNXI_FUNCTION(0x3, "spi2"), /* CS */
22 SUNXI_FUNCTION(0x4, "jtag"), /* MS */
25 SUNXI_FUNCTION(0x0, "gpio_in"),
26 SUNXI_FUNCTION(0x1, "gpio_out"),
27 SUNXI_FUNCTION(0x2, "uart2"), /* RX */
28 SUNXI_FUNCTION(0x3, "spi2"), /* CLK */
29 SUNXI_FUNCTION(0x4, "jtag"), /* CK */
32 SUNXI_FUNCTION(0x0, "gpio_in"),
33 SUNXI_FUNCTION(0x1, "gpio_out"),
34 SUNXI_FUNCTION(0x2, "uart2"), /* RTS */
35 SUNXI_FUNCTION(0x3, "spi2"), /* MOSI */
36 SUNXI_FUNCTION(0x4, "jtag"), /* DO */
39 SUNXI_FUNCTION(0x0, "gpio_in"),
40 SUNXI_FUNCTION(0x1, "gpio_out"),
41 SUNXI_FUNCTION(0x2, "uart2"), /* CTS */
42 SUNXI_FUNCTION(0x3, "spi2"), /* MISO */
43 SUNXI_FUNCTION(0x4, "jtag"), /* DI */
46 SUNXI_FUNCTION(0x0, "gpio_in"),
47 SUNXI_FUNCTION(0x1, "gpio_out"),
48 SUNXI_FUNCTION(0x2, "i2c1"), /* SCK */
49 SUNXI_FUNCTION(0x3, "i2s0"), /* MCLK */
50 SUNXI_FUNCTION(0x4, "jtag_gpu"), /* MS_GPU */
53 SUNXI_FUNCTION(0x0, "gpio_in"),
54 SUNXI_FUNCTION(0x1, "gpio_out"),
55 SUNXI_FUNCTION(0x2, "i2c1"), /* SDA */
56 SUNXI_FUNCTION(0x3, "i2s0"), /* BCLK */
57 SUNXI_FUNCTION(0x4, "jtag_gpu"), /* CK_GPU */
60 SUNXI_FUNCTION(0x0, "gpio_in"),
61 SUNXI_FUNCTION(0x1, "gpio_out"),
62 SUNXI_FUNCTION(0x3, "i2s0"), /* LRCK */
63 SUNXI_FUNCTION(0x4, "jtag_gpu"), /* DO_GPU */
66 SUNXI_FUNCTION(0x0, "gpio_in"),
67 SUNXI_FUNCTION(0x1, "gpio_out"),
68 SUNXI_FUNCTION(0x2, "spdif"), /* DIN */
69 SUNXI_FUNCTION(0x3, "i2s0_dout0"), /* DOUT0 */
70 SUNXI_FUNCTION(0x4, "i2s0_din1"), /* DIN1 */
73 SUNXI_FUNCTION(0x0, "gpio_in"),
74 SUNXI_FUNCTION(0x1, "gpio_out"),
75 SUNXI_FUNCTION(0x2, "spdif"), /* DOUT */
76 SUNXI_FUNCTION(0x3, "i2s0_din0"), /* DIN0 */
77 SUNXI_FUNCTION(0x4, "i2s0_dout1"), /* DOUT1 */
80 SUNXI_FUNCTION(0x0, "gpio_in"),
81 SUNXI_FUNCTION(0x1, "gpio_out"),
82 SUNXI_FUNCTION(0x2, "uart0"), /* TX */
83 SUNXI_FUNCTION(0x3, "i2c0"), /* SCK */
84 SUNXI_FUNCTION(0x4, "jtag_gpu"), /* DI_GPU */
87 SUNXI_FUNCTION(0x0, "gpio_in"),
88 SUNXI_FUNCTION(0x1, "gpio_out"),
89 SUNXI_FUNCTION(0x2, "uart0"), /* RX */
90 SUNXI_FUNCTION(0x3, "i2c0"), /* SDA */
91 SUNXI_FUNCTION(0x4, "pwm1"),
95 SUNXI_FUNCTION(0x0, "gpio_in"),
96 SUNXI_FUNCTION(0x1, "gpio_out"),
97 SUNXI_FUNCTION(0x2, "nand0"), /* WE */
98 SUNXI_FUNCTION(0x3, "mmc2"), /* DS */
101 SUNXI_FUNCTION(0x0, "gpio_in"),
102 SUNXI_FUNCTION(0x1, "gpio_out"),
103 SUNXI_FUNCTION(0x2, "nand0"), /* ALE */
104 SUNXI_FUNCTION(0x3, "mmc2"), /* RST */
107 SUNXI_FUNCTION(0x0, "gpio_in"),
108 SUNXI_FUNCTION(0x1, "gpio_out"),
109 SUNXI_FUNCTION(0x2, "nand0"), /* CLE */
110 SUNXI_FUNCTION(0x4, "spi0"), /* MOSI */
113 SUNXI_FUNCTION(0x0, "gpio_in"),
114 SUNXI_FUNCTION(0x1, "gpio_out"),
115 SUNXI_FUNCTION(0x2, "nand0"), /* CE1 */
116 SUNXI_FUNCTION(0x4, "spi0"), /* CS0 */
119 SUNXI_FUNCTION(0x0, "gpio_in"),
120 SUNXI_FUNCTION(0x1, "gpio_out"),
121 SUNXI_FUNCTION(0x2, "nand0"), /* CE0 */
122 SUNXI_FUNCTION(0x4, "spi0"), /* MISO */
125 SUNXI_FUNCTION(0x0, "gpio_in"),
126 SUNXI_FUNCTION(0x1, "gpio_out"),
127 SUNXI_FUNCTION(0x2, "nand0"), /* RE */
128 SUNXI_FUNCTION(0x3, "mmc2"), /* CLK */
131 SUNXI_FUNCTION(0x0, "gpio_in"),
132 SUNXI_FUNCTION(0x1, "gpio_out"),
133 SUNXI_FUNCTION(0x2, "nand0"), /* RB0 */
134 SUNXI_FUNCTION(0x3, "mmc2"), /* CMD */
137 SUNXI_FUNCTION(0x0, "gpio_in"),
138 SUNXI_FUNCTION(0x1, "gpio_out"),
139 SUNXI_FUNCTION(0x2, "nand0"), /* RB1 */
140 SUNXI_FUNCTION(0x4, "spi0"), /* CS1 */
143 SUNXI_FUNCTION(0x0, "gpio_in"),
144 SUNXI_FUNCTION(0x1, "gpio_out"),
145 SUNXI_FUNCTION(0x2, "nand0"), /* DQ7 */
146 SUNXI_FUNCTION(0x3, "mmc2"), /* D3 */
149 SUNXI_FUNCTION(0x0, "gpio_in"),
150 SUNXI_FUNCTION(0x1, "gpio_out"),
151 SUNXI_FUNCTION(0x2, "nand0"), /* DQ6 */
152 SUNXI_FUNCTION(0x3, "mmc2"), /* D4 */
155 SUNXI_FUNCTION(0x0, "gpio_in"),
156 SUNXI_FUNCTION(0x1, "gpio_out"),
157 SUNXI_FUNCTION(0x2, "nand0"), /* DQ5 */
158 SUNXI_FUNCTION(0x3, "mmc2"), /* D0 */
161 SUNXI_FUNCTION(0x0, "gpio_in"),
162 SUNXI_FUNCTION(0x1, "gpio_out"),
163 SUNXI_FUNCTION(0x2, "nand0"), /* DQ4 */
164 SUNXI_FUNCTION(0x3, "mmc2"), /* D5 */
167 SUNXI_FUNCTION(0x0, "gpio_in"),
168 SUNXI_FUNCTION(0x1, "gpio_out"),
169 SUNXI_FUNCTION(0x2, "nand0"), /* DQS */
170 SUNXI_FUNCTION(0x4, "spi0"), /* CLK */
173 SUNXI_FUNCTION(0x0, "gpio_in"),
174 SUNXI_FUNCTION(0x1, "gpio_out"),
175 SUNXI_FUNCTION(0x2, "nand0"), /* DQ3 */
176 SUNXI_FUNCTION(0x3, "mmc2"), /* D1 */
179 SUNXI_FUNCTION(0x0, "gpio_in"),
180 SUNXI_FUNCTION(0x1, "gpio_out"),
181 SUNXI_FUNCTION(0x2, "nand0"), /* DQ2 */
182 SUNXI_FUNCTION(0x3, "mmc2"), /* D6 */
185 SUNXI_FUNCTION(0x0, "gpio_in"),
186 SUNXI_FUNCTION(0x1, "gpio_out"),
187 SUNXI_FUNCTION(0x2, "nand0"), /* DQ1 */
188 SUNXI_FUNCTION(0x3, "mmc2"), /* D2 */
189 SUNXI_FUNCTION(0x4, "spi0"), /* WP */
192 SUNXI_FUNCTION(0x0, "gpio_in"),
193 SUNXI_FUNCTION(0x1, "gpio_out"),
194 SUNXI_FUNCTION(0x2, "nand0"), /* DQ0 */
195 SUNXI_FUNCTION(0x3, "mmc2"), /* D7 */
196 SUNXI_FUNCTION(0x4, "spi0"), /* HOLD */
200 SUNXI_FUNCTION(0x0, "gpio_in"),
201 SUNXI_FUNCTION(0x1, "gpio_out"),
202 SUNXI_FUNCTION(0x2, "lcd0"), /* D2 */
203 SUNXI_FUNCTION(0x3, "lvds0"), /* D0P */
204 SUNXI_FUNCTION(0x4, "dsi0"), /* DP0 */
207 SUNXI_FUNCTION(0x0, "gpio_in"),
208 SUNXI_FUNCTION(0x1, "gpio_out"),
209 SUNXI_FUNCTION(0x2, "lcd0"), /* D3 */
210 SUNXI_FUNCTION(0x3, "lvds0"), /* D0N */
211 SUNXI_FUNCTION(0x4, "dsi0"), /* DM0 */
214 SUNXI_FUNCTION(0x0, "gpio_in"),
215 SUNXI_FUNCTION(0x1, "gpio_out"),
216 SUNXI_FUNCTION(0x2, "lcd0"), /* D4 */
217 SUNXI_FUNCTION(0x3, "lvds0"), /* D1P */
218 SUNXI_FUNCTION(0x4, "dsi0"), /* DP1 */
221 SUNXI_FUNCTION(0x0, "gpio_in"),
222 SUNXI_FUNCTION(0x1, "gpio_out"),
223 SUNXI_FUNCTION(0x2, "lcd0"), /* D5 */
224 SUNXI_FUNCTION(0x3, "lvds0"), /* D1N */
225 SUNXI_FUNCTION(0x4, "dsi0"), /* DM1 */
228 SUNXI_FUNCTION(0x0, "gpio_in"),
229 SUNXI_FUNCTION(0x1, "gpio_out"),
230 SUNXI_FUNCTION(0x2, "lcd0"), /* D6 */
231 SUNXI_FUNCTION(0x3, "lvds0"), /* D2P */
232 SUNXI_FUNCTION(0x4, "dsi0"), /* CKP */
235 SUNXI_FUNCTION(0x0, "gpio_in"),
236 SUNXI_FUNCTION(0x1, "gpio_out"),
237 SUNXI_FUNCTION(0x2, "lcd0"), /* D7 */
238 SUNXI_FUNCTION(0x3, "lvds0"), /* D2N */
239 SUNXI_FUNCTION(0x4, "dsi0"), /* CKM */
242 SUNXI_FUNCTION(0x0, "gpio_in"),
243 SUNXI_FUNCTION(0x1, "gpio_out"),
244 SUNXI_FUNCTION(0x2, "lcd0"), /* D10 */
245 SUNXI_FUNCTION(0x3, "lvds0"), /* CKP */
246 SUNXI_FUNCTION(0x4, "dsi0"), /* DP2 */
249 SUNXI_FUNCTION(0x0, "gpio_in"),
250 SUNXI_FUNCTION(0x1, "gpio_out"),
251 SUNXI_FUNCTION(0x2, "lcd0"), /* D11 */
252 SUNXI_FUNCTION(0x3, "lvds0"), /* CKN */
253 SUNXI_FUNCTION(0x4, "dsi0"), /* DM2 */
256 SUNXI_FUNCTION(0x0, "gpio_in"),
257 SUNXI_FUNCTION(0x1, "gpio_out"),
258 SUNXI_FUNCTION(0x2, "lcd0"), /* D12 */
259 SUNXI_FUNCTION(0x4, "dsi0"), /* DP3 */
262 SUNXI_FUNCTION(0x0, "gpio_in"),
263 SUNXI_FUNCTION(0x1, "gpio_out"),
264 SUNXI_FUNCTION(0x2, "lcd0"), /* D13 */
265 SUNXI_FUNCTION(0x4, "dsi0"), /* DM3 */
268 SUNXI_FUNCTION(0x0, "gpio_in"),
269 SUNXI_FUNCTION(0x1, "gpio_out"),
270 SUNXI_FUNCTION(0x2, "lcd0"), /* D14 */
271 SUNXI_FUNCTION(0x4, "spi1"), /* CS */
274 SUNXI_FUNCTION(0x0, "gpio_in"),
275 SUNXI_FUNCTION(0x1, "gpio_out"),
276 SUNXI_FUNCTION(0x2, "lcd0"), /* D15 */
277 SUNXI_FUNCTION(0x4, "spi1"), /* CLK */
280 SUNXI_FUNCTION(0x0, "gpio_in"),
281 SUNXI_FUNCTION(0x1, "gpio_out"),
282 SUNXI_FUNCTION(0x2, "lcd0"), /* D18 */
283 SUNXI_FUNCTION(0x4, "spi1"), /* MOSI */
286 SUNXI_FUNCTION(0x0, "gpio_in"),
287 SUNXI_FUNCTION(0x1, "gpio_out"),
288 SUNXI_FUNCTION(0x2, "lcd0"), /* D19 */
289 SUNXI_FUNCTION(0x4, "spi1"), /* MISO */
292 SUNXI_FUNCTION(0x0, "gpio_in"),
293 SUNXI_FUNCTION(0x1, "gpio_out"),
294 SUNXI_FUNCTION(0x2, "lcd0"), /* D20 */
295 SUNXI_FUNCTION(0x4, "uart3"), /* TX */
298 SUNXI_FUNCTION(0x0, "gpio_in"),
299 SUNXI_FUNCTION(0x1, "gpio_out"),
300 SUNXI_FUNCTION(0x2, "lcd0"), /* D21 */
301 SUNXI_FUNCTION(0x4, "uart3"), /* RX */
304 SUNXI_FUNCTION(0x0, "gpio_in"),
305 SUNXI_FUNCTION(0x1, "gpio_out"),
306 SUNXI_FUNCTION(0x2, "lcd0"), /* D22 */
307 SUNXI_FUNCTION(0x4, "uart3"), /* RTS */
310 SUNXI_FUNCTION(0x0, "gpio_in"),
311 SUNXI_FUNCTION(0x1, "gpio_out"),
312 SUNXI_FUNCTION(0x2, "lcd0"), /* D23 */
313 SUNXI_FUNCTION(0x4, "uart3"), /* CTS */
316 SUNXI_FUNCTION(0x0, "gpio_in"),
317 SUNXI_FUNCTION(0x1, "gpio_out"),
318 SUNXI_FUNCTION(0x2, "lcd0"), /* CLK */
319 SUNXI_FUNCTION(0x4, "uart4"), /* TX */
322 SUNXI_FUNCTION(0x0, "gpio_in"),
323 SUNXI_FUNCTION(0x1, "gpio_out"),
324 SUNXI_FUNCTION(0x2, "lcd0"), /* DE */
325 SUNXI_FUNCTION(0x4, "uart4"), /* RX */
328 SUNXI_FUNCTION(0x0, "gpio_in"),
329 SUNXI_FUNCTION(0x1, "gpio_out"),
330 SUNXI_FUNCTION(0x2, "lcd0"), /* HSYNC */
331 SUNXI_FUNCTION(0x3, "pwm2"),
332 SUNXI_FUNCTION(0x4, "uart4"), /* RTS */
335 SUNXI_FUNCTION(0x0, "gpio_in"),
336 SUNXI_FUNCTION(0x1, "gpio_out"),
337 SUNXI_FUNCTION(0x2, "lcd0"), /* VSYNC */
338 SUNXI_FUNCTION(0x3, "pwm3"),
339 SUNXI_FUNCTION(0x4, "uart4"), /* CTS */
342 SUNXI_FUNCTION(0x0, "gpio_in"),
343 SUNXI_FUNCTION(0x1, "gpio_out"),
344 SUNXI_FUNCTION(0x2, "pwm1"),
345 SUNXI_FUNCTION(0x4, "i2c0"), /* SCK */
348 SUNXI_FUNCTION(0x0, "gpio_in"),
349 SUNXI_FUNCTION(0x1, "gpio_out"),
350 SUNXI_FUNCTION(0x2, "pwm0"),
351 SUNXI_FUNCTION(0x4, "i2c0"), /* SDA */
355 SUNXI_FUNCTION(0x0, "gpio_in"),
356 SUNXI_FUNCTION(0x1, "gpio_out"),
357 SUNXI_FUNCTION(0x2, "csi"), /* MCLK */
360 SUNXI_FUNCTION(0x0, "gpio_in"),
361 SUNXI_FUNCTION(0x1, "gpio_out"),
362 SUNXI_FUNCTION(0x2, "i2c2"), /* SCK */
365 SUNXI_FUNCTION(0x0, "gpio_in"),
366 SUNXI_FUNCTION(0x1, "gpio_out"),
367 SUNXI_FUNCTION(0x2, "i2c2"), /* SDA */
370 SUNXI_FUNCTION(0x0, "gpio_in"),
371 SUNXI_FUNCTION(0x1, "gpio_out"),
372 SUNXI_FUNCTION(0x2, "i2c3"), /* SCK */
375 SUNXI_FUNCTION(0x0, "gpio_in"),
376 SUNXI_FUNCTION(0x1, "gpio_out"),
377 SUNXI_FUNCTION(0x2, "i2c3"), /* SDA */
380 SUNXI_FUNCTION(0x0, "gpio_in"),
381 SUNXI_FUNCTION(0x1, "gpio_out"),
382 SUNXI_FUNCTION(0x2, "csi"), /* MCLK */
383 SUNXI_FUNCTION(0x3, "pll"), /* LOCK_DBG */
384 SUNXI_FUNCTION(0x4, "i2s2"), /* MCLK */
385 SUNXI_FUNCTION(0x5, "ledc"), /* LEDC */
388 SUNXI_FUNCTION(0x0, "gpio_in"),
389 SUNXI_FUNCTION(0x1, "gpio_out"),
390 SUNXI_FUNCTION(0x3, "bist0"), /* RESULT0 */
391 SUNXI_FUNCTION(0x4, "i2s2"), /* BCLK */
394 SUNXI_FUNCTION(0x0, "gpio_in"),
395 SUNXI_FUNCTION(0x1, "gpio_out"),
396 SUNXI_FUNCTION(0x2, "csi"), /* SM_VS */
397 SUNXI_FUNCTION(0x3, "bist0"), /* RESULT1 */
398 SUNXI_FUNCTION(0x4, "i2s2"), /* LRCK */
399 SUNXI_FUNCTION(0x5, "tcon0"), /* TRIG */
402 SUNXI_FUNCTION(0x0, "gpio_in"),
403 SUNXI_FUNCTION(0x1, "gpio_out"),
404 SUNXI_FUNCTION(0x3, "bist0"), /* RESULT2 */
405 SUNXI_FUNCTION(0x4, "i2s2"), /* DOUT0 */
408 SUNXI_FUNCTION(0x0, "gpio_in"),
409 SUNXI_FUNCTION(0x1, "gpio_out"),
410 SUNXI_FUNCTION(0x3, "bist0"), /* RESULT3 */
411 SUNXI_FUNCTION(0x4, "i2s2"), /* DIN0 */
415 SUNXI_FUNCTION(0x0, "gpio_in"),
416 SUNXI_FUNCTION(0x1, "gpio_out"),
417 SUNXI_FUNCTION(0x2, "mmc0"), /* D1 */
418 SUNXI_FUNCTION(0x3, "jtag"), /* MS1 */
419 SUNXI_FUNCTION(0x4, "jtag_gpu"), /* MS_GPU */
422 SUNXI_FUNCTION(0x0, "gpio_in"),
423 SUNXI_FUNCTION(0x1, "gpio_out"),
424 SUNXI_FUNCTION(0x2, "mmc0"), /* D0 */
425 SUNXI_FUNCTION(0x3, "jtag"), /* DI1 */
426 SUNXI_FUNCTION(0x4, "jtag_gpu"), /* DI_GPU */
429 SUNXI_FUNCTION(0x0, "gpio_in"),
430 SUNXI_FUNCTION(0x1, "gpio_out"),
431 SUNXI_FUNCTION(0x2, "mmc0"), /* CLK */
432 SUNXI_FUNCTION(0x3, "uart0"), /* TX */
435 SUNXI_FUNCTION(0x0, "gpio_in"),
436 SUNXI_FUNCTION(0x1, "gpio_out"),
437 SUNXI_FUNCTION(0x2, "mmc0"), /* CMD */
438 SUNXI_FUNCTION(0x3, "jtag"), /* DO */
439 SUNXI_FUNCTION(0x4, "jtag_gpu"), /* DO_GPU */
442 SUNXI_FUNCTION(0x0, "gpio_in"),
443 SUNXI_FUNCTION(0x1, "gpio_out"),
444 SUNXI_FUNCTION(0x2, "mmc0"), /* D3 */
445 SUNXI_FUNCTION(0x3, "uart0"), /* RX */
448 SUNXI_FUNCTION(0x0, "gpio_in"),
449 SUNXI_FUNCTION(0x1, "gpio_out"),
450 SUNXI_FUNCTION(0x2, "mmc0"), /* D2 */
451 SUNXI_FUNCTION(0x3, "jtag"), /* CK */
452 SUNXI_FUNCTION(0x4, "jtag_gpu"), /* CK_GPU */
455 SUNXI_FUNCTION(0x0, "gpio_in"),
456 SUNXI_FUNCTION(0x1, "gpio_out"),
460 SUNXI_FUNCTION(0x0, "gpio_in"),
461 SUNXI_FUNCTION(0x1, "gpio_out"),
462 SUNXI_FUNCTION(0x2, "mmc1"), /* CLK */
465 SUNXI_FUNCTION(0x0, "gpio_in"),
466 SUNXI_FUNCTION(0x1, "gpio_out"),
467 SUNXI_FUNCTION(0x2, "mmc1"), /* CMD */
470 SUNXI_FUNCTION(0x0, "gpio_in"),
471 SUNXI_FUNCTION(0x1, "gpio_out"),
472 SUNXI_FUNCTION(0x2, "mmc1"), /* D0 */
475 SUNXI_FUNCTION(0x0, "gpio_in"),
476 SUNXI_FUNCTION(0x1, "gpio_out"),
477 SUNXI_FUNCTION(0x2, "mmc1"), /* D1 */
480 SUNXI_FUNCTION(0x0, "gpio_in"),
481 SUNXI_FUNCTION(0x1, "gpio_out"),
482 SUNXI_FUNCTION(0x2, "mmc1"), /* D2 */
485 SUNXI_FUNCTION(0x0, "gpio_in"),
486 SUNXI_FUNCTION(0x1, "gpio_out"),
487 SUNXI_FUNCTION(0x2, "mmc1"), /* D3 */
490 SUNXI_FUNCTION(0x0, "gpio_in"),
491 SUNXI_FUNCTION(0x1, "gpio_out"),
492 SUNXI_FUNCTION(0x2, "uart1"), /* TX */
495 SUNXI_FUNCTION(0x0, "gpio_in"),
496 SUNXI_FUNCTION(0x1, "gpio_out"),
497 SUNXI_FUNCTION(0x2, "uart1"), /* RX */
500 SUNXI_FUNCTION(0x0, "gpio_in"),
501 SUNXI_FUNCTION(0x1, "gpio_out"),
502 SUNXI_FUNCTION(0x2, "uart1"), /* RTS */
505 SUNXI_FUNCTION(0x0, "gpio_in"),
506 SUNXI_FUNCTION(0x1, "gpio_out"),
507 SUNXI_FUNCTION(0x2, "uart1"), /* CTS */
508 SUNXI_FUNCTION(0x3, "i2s1"), /* MCLK */
511 SUNXI_FUNCTION(0x0, "gpio_in"),
512 SUNXI_FUNCTION(0x1, "gpio_out"),
513 SUNXI_FUNCTION(0x3, "i2s1"), /* BCLK */
516 SUNXI_FUNCTION(0x0, "gpio_in"),
517 SUNXI_FUNCTION(0x1, "gpio_out"),
518 SUNXI_FUNCTION(0x3, "i2s1"), /* LRCK */
521 SUNXI_FUNCTION(0x0, "gpio_in"),
522 SUNXI_FUNCTION(0x1, "gpio_out"),
523 SUNXI_FUNCTION(0x3, "i2s1_dout0"), /* DOUT0 */
524 SUNXI_FUNCTION(0x4, "i2s1_din1"), /* DIN1 */
527 SUNXI_FUNCTION(0x0, "gpio_in"),
528 SUNXI_FUNCTION(0x1, "gpio_out"),
529 SUNXI_FUNCTION(0x3, "i2s1_din0"), /* DIN0 */
530 SUNXI_FUNCTION(0x4, "i2s1_dout1"), /* DOUT1 */
534 SUNXI_FUNCTION(0x0, "gpio_in"),
535 SUNXI_FUNCTION(0x1, "gpio_out"),
536 SUNXI_FUNCTION(0x2, "i2c0"), /* SCK */
537 SUNXI_FUNCTION(0x5, "emac0"), /* RXD1 */
540 SUNXI_FUNCTION(0x0, "gpio_in"),
541 SUNXI_FUNCTION(0x1, "gpio_out"),
542 SUNXI_FUNCTION(0x2, "i2c0"), /* SDA */
543 SUNXI_FUNCTION(0x5, "emac0"), /* RXD0 */
546 SUNXI_FUNCTION(0x0, "gpio_in"),
547 SUNXI_FUNCTION(0x1, "gpio_out"),
548 SUNXI_FUNCTION(0x2, "i2c1"), /* SCK */
549 SUNXI_FUNCTION(0x5, "emac0"), /* RXCTL */
552 SUNXI_FUNCTION(0x0, "gpio_in"),
553 SUNXI_FUNCTION(0x1, "gpio_out"),
554 SUNXI_FUNCTION(0x2, "i2c1"), /* SDA */
555 SUNXI_FUNCTION(0x3, "cir0"), /* OUT */
556 SUNXI_FUNCTION(0x5, "emac0"), /* CLKIN */
559 SUNXI_FUNCTION(0x0, "gpio_in"),
560 SUNXI_FUNCTION(0x1, "gpio_out"),
561 SUNXI_FUNCTION(0x2, "uart3"), /* TX */
562 SUNXI_FUNCTION(0x3, "spi1"), /* CS */
563 SUNXI_FUNCTION(0x5, "emac0"), /* TXD1 */
566 SUNXI_FUNCTION(0x0, "gpio_in"),
567 SUNXI_FUNCTION(0x1, "gpio_out"),
568 SUNXI_FUNCTION(0x2, "uart3"), /* RX */
569 SUNXI_FUNCTION(0x3, "spi1"), /* CLK */
570 SUNXI_FUNCTION(0x4, "ledc"),
571 SUNXI_FUNCTION(0x5, "emac0"), /* TXD0 */
574 SUNXI_FUNCTION(0x0, "gpio_in"),
575 SUNXI_FUNCTION(0x1, "gpio_out"),
576 SUNXI_FUNCTION(0x2, "uart3"), /* RTS */
577 SUNXI_FUNCTION(0x3, "spi1"), /* MOSI */
578 SUNXI_FUNCTION(0x5, "emac0"), /* TXCK */
581 SUNXI_FUNCTION(0x0, "gpio_in"),
582 SUNXI_FUNCTION(0x1, "gpio_out"),
583 SUNXI_FUNCTION(0x2, "uart3"), /* CTS */
584 SUNXI_FUNCTION(0x3, "spi1"), /* MISO */
585 SUNXI_FUNCTION(0x4, "spdif"), /* OUT */
586 SUNXI_FUNCTION(0x5, "emac0"), /* TXCTL */
589 SUNXI_FUNCTION(0x0, "gpio_in"),
590 SUNXI_FUNCTION(0x1, "gpio_out"),
591 SUNXI_FUNCTION(0x2, "dmic"), /* CLK */
592 SUNXI_FUNCTION(0x3, "spi2"), /* CS */
593 SUNXI_FUNCTION(0x4, "i2s2"), /* MCLK */
594 SUNXI_FUNCTION(0x5, "i2s2_din2"), /* DIN2 */
597 SUNXI_FUNCTION(0x0, "gpio_in"),
598 SUNXI_FUNCTION(0x1, "gpio_out"),
599 SUNXI_FUNCTION(0x2, "dmic"), /* DATA0 */
600 SUNXI_FUNCTION(0x3, "spi2"), /* CLK */
601 SUNXI_FUNCTION(0x4, "i2s2"), /* BCLK */
602 SUNXI_FUNCTION(0x5, "emac0"), /* MDC */
605 SUNXI_FUNCTION(0x0, "gpio_in"),
606 SUNXI_FUNCTION(0x1, "gpio_out"),
607 SUNXI_FUNCTION(0x2, "dmic"), /* DATA1 */
608 SUNXI_FUNCTION(0x3, "spi2"), /* MOSI */
609 SUNXI_FUNCTION(0x4, "i2s2"), /* LRCK */
610 SUNXI_FUNCTION(0x5, "emac0"), /* MDIO */
613 SUNXI_FUNCTION(0x0, "gpio_in"),
614 SUNXI_FUNCTION(0x1, "gpio_out"),
615 SUNXI_FUNCTION(0x2, "dmic"), /* DATA2 */
616 SUNXI_FUNCTION(0x3, "spi2"), /* MISO */
617 SUNXI_FUNCTION(0x4, "i2s2_dout0"), /* DOUT0 */
618 SUNXI_FUNCTION(0x5, "i2s2_din1"), /* DIN1 */
621 SUNXI_FUNCTION(0x0, "gpio_in"),
622 SUNXI_FUNCTION(0x1, "gpio_out"),
623 SUNXI_FUNCTION(0x2, "dmic"), /* DATA3 */
624 SUNXI_FUNCTION(0x3, "i2c3"), /* SCK */
625 SUNXI_FUNCTION(0x4, "i2s2_din0"), /* DIN0 */
626 SUNXI_FUNCTION(0x5, "i2s2_dout1"), /* DOUT1 */
629 SUNXI_FUNCTION(0x0, "gpio_in"),
630 SUNXI_FUNCTION(0x1, "gpio_out"),
631 SUNXI_FUNCTION(0x3, "i2c3"), /* SCK */
632 SUNXI_FUNCTION(0x4, "i2s3"), /* MCLK */
633 SUNXI_FUNCTION(0x5, "emac0"), /* EPHY */
636 SUNXI_FUNCTION(0x0, "gpio_in"),
637 SUNXI_FUNCTION(0x1, "gpio_out"),
638 SUNXI_FUNCTION(0x4, "i2s3"), /* BCLK */
639 SUNXI_FUNCTION(0x5, "emac0"), /* RXD3 */
642 SUNXI_FUNCTION(0x0, "gpio_in"),
643 SUNXI_FUNCTION(0x1, "gpio_out"),
644 SUNXI_FUNCTION(0x4, "i2s3"), /* LRCK */
645 SUNXI_FUNCTION(0x5, "emac0"), /* RXD2 */
648 SUNXI_FUNCTION(0x0, "gpio_in"),
649 SUNXI_FUNCTION(0x1, "gpio_out"),
650 SUNXI_FUNCTION(0x3, "i2s3_dout0"), /* DOUT0 */
651 SUNXI_FUNCTION(0x4, "i2s3_din1"), /* DIN1 */
652 SUNXI_FUNCTION(0x5, "emac0"), /* RXCK */
655 SUNXI_FUNCTION(0x0, "gpio_in"),
656 SUNXI_FUNCTION(0x1, "gpio_out"),
657 SUNXI_FUNCTION(0x3, "i2s3_dout1"), /* DOUT1 */
658 SUNXI_FUNCTION(0x4, "i2s3_din0"), /* DIN0 */
659 SUNXI_FUNCTION(0x5, "emac0"), /* TXD3 */
662 SUNXI_FUNCTION(0x0, "gpio_in"),
663 SUNXI_FUNCTION(0x1, "gpio_out"),
664 SUNXI_FUNCTION(0x2, "cir0"), /* OUT */
665 SUNXI_FUNCTION(0x3, "i2s3_dout2"), /* DOUT2 */
666 SUNXI_FUNCTION(0x4, "i2s3_din2"), /* DIN2 */
667 SUNXI_FUNCTION(0x5, "emac0"), /* TXD2 */
670 SUNXI_FUNCTION(0x0, "gpio_in"),
671 SUNXI_FUNCTION(0x1, "gpio_out"),
672 SUNXI_FUNCTION(0x2, "cir0"), /* IN */
673 SUNXI_FUNCTION(0x3, "i2s3_dout3"), /* DOUT3 */
674 SUNXI_FUNCTION(0x4, "i2s3_din3"), /* DIN3 */
675 SUNXI_FUNCTION(0x5, "ledc"),