Lines Matching +full:11 +full:- +full:14

1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
10 #include "pinctrl-stm32.h"
25 STM32_FUNCTION(11, "ETH2_MII_RXD2 ETH2_RGMII_RXD2"),
43 STM32_FUNCTION(14, "DCMI_D5 PSSI_D5 DCMIPP_D5"),
57 STM32_FUNCTION(11, "I2C1_SDA"),
59 STM32_FUNCTION(14, "DCMI_D3 PSSI_D3 DCMIPP_D3"),
74 STM32_FUNCTION(11, "I2C1_SCL"),
76 STM32_FUNCTION(14, "DCMI_D2 PSSI_D2 DCMIPP_D2"),
88 STM32_FUNCTION(11, "LCD_R1"),
89 STM32_FUNCTION(14, "ETH1_PTP_AUX_TS"),
104 STM32_FUNCTION(11, "LCD_G0"),
106 STM32_FUNCTION(14, "DCMI_D13 PSSI_D13 DCMIPP_D13"),
121 STM32_FUNCTION(11, "LCD_G4"),
123 STM32_FUNCTION(14, "DCMI_D12 PSSI_D12 DCMIPP_D12"),
140 STM32_FUNCTION(11, "LCD_B5"),
143 STM32_FUNCTION(14, "DCMI_D6 PSSI_D6 DCMIPP_D6"),
159 STM32_FUNCTION(14, "DCMI_D4 PSSI_D4 DCMIPP_D4"),
172 STM32_FUNCTION(11, "ETH1_MDC"),
174 STM32_FUNCTION(14, "PSSI_D14 DCMIPP_D14"),
188 STM32_FUNCTION(11, "ETH1_MDIO"),
190 STM32_FUNCTION(14, "PSSI_D15 DCMIPP_D15"),
196 PINCTRL_PIN(11, "PA11"),
203 STM32_FUNCTION(11, "ETH1_MII_RX_DV ETH1_RGMII_RX_CTL ETH1_RMII_CRS_DV"),
216 STM32_FUNCTION(11, "ETH1_PHY_INTN"),
230 STM32_FUNCTION(11, "ETH1_MII_TX_EN ETH1_RGMII_TX_CTL ETH1_RMII_TX_EN"),
235 PINCTRL_PIN(14, "PA14"),
242 STM32_FUNCTION(11, "ETH1_MII_RX_CLK ETH1_RGMII_RX_CLK ETH1_RMII_REF_CLK"),
253 STM32_FUNCTION(11, "ETH1_MII_TXD0 ETH1_RGMII_TXD0 ETH1_RMII_TXD0"),
265 STM32_FUNCTION(11, "OCTOSPIM_P2_IO0"),
276 STM32_FUNCTION(11, "OCTOSPIM_P2_IO1"),
290 STM32_FUNCTION(11, "OCTOSPIM_P2_IO2"),
301 STM32_FUNCTION(11, "OCTOSPIM_P2_IO3"),
317 STM32_FUNCTION(11, "OCTOSPIM_P2_IO4"),
318 STM32_FUNCTION(14, "I3C2_SDA"),
332 STM32_FUNCTION(11, "OCTOSPIM_P2_IO5"),
334 STM32_FUNCTION(14, "I3C2_SCL"),
347 STM32_FUNCTION(11, "OCTOSPIM_P2_IO6"),
362 STM32_FUNCTION(11, "OCTOSPIM_P2_IO7"),
377 STM32_FUNCTION(11, "OCTOSPIM_P2_NCS1"),
391 STM32_FUNCTION(11, "OCTOSPIM_P2_DQS"),
404 STM32_FUNCTION(11, "OCTOSPIM_P2_CLK"),
418 STM32_FUNCTION(11, "OCTOSPIM_P2_NCLK"),
421 STM32_FUNCTION(14, "OCTOSPIM_P1_NCS2"),
432 STM32_FUNCTION(11, "SDMMC3_D2"),
445 STM32_FUNCTION(11, "SDMMC3_CK"),
459 STM32_FUNCTION(11, "SDMMC3_D0"),
476 STM32_FUNCTION(11, "ETH1_PPS_OUT"),
478 STM32_FUNCTION(14, "LCD_R4"),
492 STM32_FUNCTION(11, "ETH2_MII_RX_CLK ETH2_RGMII_RX_CLK ETH2_RMII_REF_CLK"),
495 STM32_FUNCTION(14, "LCD_G7"),
506 STM32_FUNCTION(11, "ETH1_MII_TXD1 ETH1_RGMII_TXD1 ETH1_RMII_TXD1"),
519 STM32_FUNCTION(11, "ETH1_MII_RXD1 ETH1_RGMII_RXD1 ETH1_RMII_RXD1"),
532 STM32_FUNCTION(11, "ETH2_MII_RX_DV ETH2_RGMII_RX_CTL ETH2_RMII_CRS_DV"),
534 STM32_FUNCTION(14, "LCD_G6"),
545 STM32_FUNCTION(11, "ETH2_MII_TX_EN ETH2_RGMII_TX_CTL ETH2_RMII_TX_EN"),
547 STM32_FUNCTION(14, "LCD_R0"),
559 STM32_FUNCTION(11, "ETH2_MDIO"),
562 STM32_FUNCTION(14, "ETH1_PPS_OUT"),
576 STM32_FUNCTION(11, "ETH2_MDC"),
579 STM32_FUNCTION(14, "ETH1_PHY_INTN"),
591 STM32_FUNCTION(11, "ETH2_MII_TXD0 ETH2_RGMII_TXD0 ETH2_RMII_TXD0"),
593 STM32_FUNCTION(14, "LCD_B4"),
607 STM32_FUNCTION(11, "ETH2_MII_TXD1 ETH2_RGMII_TXD1 ETH2_RMII_TXD1"),
609 STM32_FUNCTION(14, "LCD_B3"),
624 STM32_FUNCTION(11, "ETH2_MII_TXD2 ETH2_RGMII_TXD2"),
627 STM32_FUNCTION(14, "LCD_G2"),
640 STM32_FUNCTION(11, "ETH2_MII_TXD3 ETH2_RGMII_TXD3"),
643 STM32_FUNCTION(14, "LCD_G3"),
659 STM32_FUNCTION(11, "ETH2_MII_RXD3 ETH2_RGMII_RXD3"),
661 STM32_FUNCTION(14, "LCD_R2"),
675 STM32_FUNCTION(11, "ETH2_MII_RXD1 ETH2_RGMII_RXD1 ETH2_RMII_RXD1"),
677 STM32_FUNCTION(14, "LCD_G1"),
701 STM32_FUNCTION(11, "OCTOSPIM_P1_CLK"),
702 STM32_FUNCTION(14, "DCMI_PIXCLK PSSI_PDCK DCMIPP_PIXCLK"),
718 STM32_FUNCTION(11, "OCTOSPIM_P1_NCLK"),
721 STM32_FUNCTION(14, "DCMI_HSYNC PSSI_DE DCMIPP_HSYNC"),
737 STM32_FUNCTION(11, "OCTOSPIM_P1_DQS"),
739 STM32_FUNCTION(14, "DCMI_VSYNC PSSI_RDY DCMIPP_VSYNC"),
755 STM32_FUNCTION(11, "OCTOSPIM_P1_NCS1"),
756 STM32_FUNCTION(14, "PSSI_D15 DCMIPP_D15"),
771 STM32_FUNCTION(11, "OCTOSPIM_P1_IO0"),
772 STM32_FUNCTION(14, "PSSI_D14 DCMIPP_D14"),
787 STM32_FUNCTION(11, "OCTOSPIM_P1_IO1"),
788 STM32_FUNCTION(14, "DCMI_D13 PSSI_D13 DCMIPP_D13"),
803 STM32_FUNCTION(11, "OCTOSPIM_P1_IO2"),
804 STM32_FUNCTION(14, "DCMI_D12 PSSI_D12 DCMIPP_D12"),
819 STM32_FUNCTION(11, "OCTOSPIM_P1_IO3"),
820 STM32_FUNCTION(14, "DCMI_D11 PSSI_D11 DCMIPP_D11"),
836 STM32_FUNCTION(11, "OCTOSPIM_P1_IO4"),
839 STM32_FUNCTION(14, "DCMI_D10 PSSI_D10 DCMIPP_D10"),
854 STM32_FUNCTION(11, "OCTOSPIM_P1_IO5"),
857 STM32_FUNCTION(14, "DCMI_D9 PSSI_D9 DCMIPP_D9"),
873 STM32_FUNCTION(11, "OCTOSPIM_P1_IO6"),
876 STM32_FUNCTION(14, "DCMI_D8 PSSI_D8 DCMIPP_D8"),
892 STM32_FUNCTION(11, "OCTOSPIM_P1_IO7"),
895 STM32_FUNCTION(14, "DCMI_D7 PSSI_D7 DCMIPP_D7"),
908 STM32_FUNCTION(11, "SDMMC3_CMD"),
922 STM32_FUNCTION(11, "SDMMC3_D1"),
935 STM32_FUNCTION(11, "I2C7_SDA"),
938 STM32_FUNCTION(14, "DCMI_D1 PSSI_D1 DCMIPP_D1"),
952 STM32_FUNCTION(11, "I2C7_SCL"),
955 STM32_FUNCTION(14, "DCMI_D0 PSSI_D0 DCMIPP_D0"),
968 STM32_FUNCTION(11, "SDMMC1_D2"),
981 STM32_FUNCTION(11, "SDMMC1_D3"),
994 STM32_FUNCTION(11, "SDMMC1_CMD"),
1008 STM32_FUNCTION(11, "SDMMC1_CK"),
1023 STM32_FUNCTION(11, "SDMMC1_D0"),
1038 STM32_FUNCTION(11, "SDMMC1_D1"),
1052 STM32_FUNCTION(14, "SDMMC2_D0DIR"),
1064 STM32_FUNCTION(11, "TIM14_CH1"),
1067 STM32_FUNCTION(14, "SDMMC2_D123DIR"),
1096 STM32_FUNCTION(14, "SDMMC2_CDIR"),
1109 STM32_FUNCTION(11, "FMC_NE3"),
1112 STM32_FUNCTION(14, "SDMMC2_CKIN"),
1140 STM32_FUNCTION(11, "FMC_NE2"),
1195 STM32_FUNCTION(11, "ETH1_MDC"),
1197 STM32_FUNCTION(14, "I3C2_SDA"),
1210 STM32_FUNCTION(11, "ETH1_MII_RXD0 ETH1_RGMII_RXD0 ETH1_RMII_RXD0"),
1222 STM32_FUNCTION(11, "ETH1_MDIO"),
1225 STM32_FUNCTION(14, "I3C2_SCL"),
1239 STM32_FUNCTION(11, "ETH2_PPS_OUT"),
1241 STM32_FUNCTION(14, "LCD_R6"),
1257 STM32_FUNCTION(11, "ETH2_PPS_OUT"),
1259 STM32_FUNCTION(14, "LCD_B7"),
1273 STM32_FUNCTION(11, "ETH2_PHY_INTN"),
1275 STM32_FUNCTION(14, "LCD_B6"),
1288 STM32_FUNCTION(11, "ETH2_MII_RX_CLK ETH2_RGMII_RX_CLK ETH2_RMII_REF_CLK"),
1289 STM32_FUNCTION(14, "LCD_B0"),
1301 STM32_FUNCTION(11, "ETH2_RGMII_GTX_CLK"),
1303 STM32_FUNCTION(14, "LCD_R1"),
1316 STM32_FUNCTION(11, "ETH2_RGMII_CLK125"),
1319 STM32_FUNCTION(14, "LCD_G0"),
1332 STM32_FUNCTION(11, "ETH2_MII_RXD2 ETH2_RGMII_RXD2"),
1347 STM32_FUNCTION(11, "ETH2_MII_TXD2 ETH2_RGMII_TXD2"),
1362 STM32_FUNCTION(11, "ETH2_MII_TXD3 ETH2_RGMII_TXD3"),
1375 STM32_FUNCTION(14, "LCD_CLK"),
1393 STM32_FUNCTION(14, "LCD_R2"),
1408 STM32_FUNCTION(14, "LCD_R3"),
1425 STM32_FUNCTION(14, "LCD_R4"),
1438 STM32_FUNCTION(11, "ETH2_MII_RXD0 ETH2_RGMII_RXD0 ETH2_RMII_RXD0"),
1440 STM32_FUNCTION(14, "LCD_G5"),
1457 STM32_FUNCTION(11, "ETH2_MII_RX_ER"),
1460 STM32_FUNCTION(14, "LCD_VSYNC"),
1476 STM32_FUNCTION(11, "ETH2_MII_TX_CLK"),
1479 STM32_FUNCTION(14, "LCD_HSYNC"),
1494 STM32_FUNCTION(11, "ETH2_PHY_INTN"),
1496 STM32_FUNCTION(14, "LCD_R5"),
1509 STM32_FUNCTION(11, "ETH2_PPS_OUT"),
1512 STM32_FUNCTION(14, "LCD_R7"),
1526 STM32_FUNCTION(14, "LCD_R5"),
1541 STM32_FUNCTION(14, "LCD_R6"),
1556 STM32_FUNCTION(14, "LCD_R7"),
1573 STM32_FUNCTION(14, "LCD_G2"),
1585 STM32_FUNCTION(14, "LCD_G3"),
1598 STM32_FUNCTION(14, "LCD_G4"),
1612 STM32_FUNCTION(14, "LCD_G5"),
1626 STM32_FUNCTION(14, "LCD_G6"),
1641 STM32_FUNCTION(11, "I3C1_SCL"),
1642 STM32_FUNCTION(14, "LCD_G7"),
1657 STM32_FUNCTION(14, "LCD_B1"),
1672 STM32_FUNCTION(14, "LCD_B2"),
1701 STM32_FUNCTION(11, "I2C7_SCL"),
1713 STM32_FUNCTION(11, "LCD_R0"),
1716 STM32_FUNCTION(14, "ETH1_PTP_AUX_TS"),
1729 STM32_FUNCTION(11, "LCD_G1"),
1732 STM32_FUNCTION(14, "ETH2_PTP_AUX_TS"),
1746 STM32_FUNCTION(11, "I2C1_SMBA"),
1760 STM32_FUNCTION(11, "I2C7_SDA"),
1774 STM32_FUNCTION(11, "I2C3_SMBA"),
1788 STM32_FUNCTION(11, "ETH1_RGMII_CLK125"),
1802 STM32_FUNCTION(11, "ETH1_MII_TXD2 ETH1_RGMII_TXD2"),
1814 STM32_FUNCTION(11, "ETH1_MII_TXD3 ETH1_RGMII_TXD3"),
1825 STM32_FUNCTION(11, "ETH1_MII_RXD2 ETH1_RGMII_RXD2"),
1837 STM32_FUNCTION(11, "ETH1_MII_RXD3 ETH1_RGMII_RXD3"),
1851 STM32_FUNCTION(14, "LCD_B3"),
1866 STM32_FUNCTION(11, "I3C1_SDA"),
1867 STM32_FUNCTION(14, "LCD_B4"),
1880 STM32_FUNCTION(14, "LCD_B5"),
1893 STM32_FUNCTION(14, "LCD_B6"),
1905 STM32_FUNCTION(14, "LCD_B7"),
1919 STM32_FUNCTION(14, "LCD_DE"),
1932 STM32_FUNCTION(14, "LCD_VSYNC"),
1943 STM32_FUNCTION(14, "LCD_HSYNC"),
1964 STM32_FUNCTION(11, "FMC_NWAIT"),
1966 STM32_FUNCTION(14, "LCD_B0"),
1982 STM32_FUNCTION(14, "DSI_TE"),
1994 STM32_FUNCTION(11, "SDMMC3_D3"),
2007 STM32_FUNCTION(14, "LCD_G0"),
2019 STM32_FUNCTION(14, "LCD_G1"),
2031 STM32_FUNCTION(11, "FMC_NWAIT"),
2033 STM32_FUNCTION(14, "DCMI_D4 PSSI_D4 DCMIPP_D4"),
2047 STM32_FUNCTION(11, "SDMMC3_CDIR"),
2048 STM32_FUNCTION(14, "DCMI_D9 PSSI_D9 DCMIPP_D9"),
2063 STM32_FUNCTION(14, "ETH3_PPS_OUT"),
2074 STM32_FUNCTION(11, "I3C1_SCL"),
2114 STM32_FUNCTION(11, "I2C5_SMBA"),
2141 STM32_FUNCTION(14, "DCMI_D7 PSSI_D7 DCMIPP_D7"),
2192 STM32_FUNCTION(11, "I3C1_SDA"),
2221 STM32_FUNCTION(11, "I3C2_SCL"),
2236 STM32_FUNCTION(11, "I3C2_SDA"),
2248 STM32_FUNCTION(14, "LCD_R0"),
2262 STM32_FUNCTION(14, "LCD_R1"),
2275 STM32_FUNCTION(11, "SDMMC3_D123DIR"),
2277 STM32_FUNCTION(14, "DCMI_D11 PSSI_D11 DCMIPP_D11"),
2290 STM32_FUNCTION(11, "SDMMC3_D0DIR"),
2292 STM32_FUNCTION(14, "DCMI_D10 PSSI_D10 DCMIPP_D10"),
2307 STM32_FUNCTION(14, "DCMI_D6 PSSI_D6 DCMIPP_D6"),
2320 STM32_FUNCTION(14, "DCMI_D3 PSSI_D3 DCMIPP_D3"),
2334 STM32_FUNCTION(11, "SDMMC3_CKIN"),
2336 STM32_FUNCTION(14, "DCMI_D8 PSSI_D8 DCMIPP_D8"),
2349 STM32_FUNCTION(11, "I2C5_SCL"),
2351 STM32_FUNCTION(14, "DCMI_D1 PSSI_D1 DCMIPP_D1"),
2367 STM32_FUNCTION(14, "DCMI_D5 PSSI_D5 DCMIPP_D5"),
2379 STM32_FUNCTION(11, "I2C5_SDA"),
2382 STM32_FUNCTION(14, "DCMI_D2 PSSI_D2 DCMIPP_D2"),
2399 STM32_FUNCTION(11, "LPTIM3_CH2"),
2446 STM32_FUNCTION(11, "LPTIM4_CH2"),
2478 STM32_FUNCTION(11, "LPTIM4_CH2"),
2493 STM32_FUNCTION(11, "LPTIM4_CH2"),
2506 STM32_FUNCTION(11, "LPTIM3_CH2"),
2535 STM32_FUNCTION(11, "LPTIM3_CH2"),
2554 .compatible = "st,stm32mp257-pinctrl",
2558 .compatible = "st,stm32mp257-z-pinctrl",
2571 .name = "stm32mp257-pinctrl",