Lines Matching full:pctl
210 struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent); in stm32_gpio_request() local
214 range = pinctrl_find_gpio_range_from_pin_nolock(pctl->pctl_dev, pin); in stm32_gpio_request()
216 dev_err(pctl->dev, "pin %d not in range.\n", pin); in stm32_gpio_request()
284 struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent); in stm32_gpio_init_valid_mask() local
298 dev_dbg(pctl->dev, "No access to gpio %d - %d\n", bank->bank_nr, i); in stm32_gpio_init_valid_mask()
370 struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent); in stm32_gpio_irq_request_resources() local
379 dev_err(pctl->dev, "unable to lock HW IRQ %lu for IRQ\n", in stm32_gpio_irq_request_resources()
430 struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent); in stm32_gpio_domain_activate() local
433 if (pctl->hwlock) { in stm32_gpio_domain_activate()
434 ret = hwspin_lock_timeout_in_atomic(pctl->hwlock, in stm32_gpio_domain_activate()
437 dev_err(pctl->dev, "Can't get hwspinlock\n"); in stm32_gpio_domain_activate()
442 regmap_field_write(pctl->irqmux[irq_data->hwirq], bank->bank_ioport_nr); in stm32_gpio_domain_activate()
444 if (pctl->hwlock) in stm32_gpio_domain_activate()
445 hwspin_unlock_in_atomic(pctl->hwlock); in stm32_gpio_domain_activate()
457 struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent); in stm32_gpio_domain_alloc() local
466 spin_lock_irqsave(&pctl->irqmux_lock, flags); in stm32_gpio_domain_alloc()
468 if (pctl->irqmux_map & BIT(hwirq)) { in stm32_gpio_domain_alloc()
469 dev_err(pctl->dev, "irq line %ld already requested.\n", hwirq); in stm32_gpio_domain_alloc()
472 pctl->irqmux_map |= BIT(hwirq); in stm32_gpio_domain_alloc()
475 spin_unlock_irqrestore(&pctl->irqmux_lock, flags); in stm32_gpio_domain_alloc()
494 struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent); in stm32_gpio_domain_free() local
500 spin_lock_irqsave(&pctl->irqmux_lock, flags); in stm32_gpio_domain_free()
501 pctl->irqmux_map &= ~BIT(hwirq); in stm32_gpio_domain_free()
502 spin_unlock_irqrestore(&pctl->irqmux_lock, flags); in stm32_gpio_domain_free()
514 stm32_pctrl_find_group_by_pin(struct stm32_pinctrl *pctl, u32 pin) in stm32_pctrl_find_group_by_pin() argument
518 for (i = 0; i < pctl->ngroups; i++) { in stm32_pctrl_find_group_by_pin()
519 struct stm32_pinctrl_group *grp = pctl->groups + i; in stm32_pctrl_find_group_by_pin()
528 static bool stm32_pctrl_is_function_valid(struct stm32_pinctrl *pctl, in stm32_pctrl_is_function_valid() argument
533 for (i = 0; i < pctl->npins; i++) { in stm32_pctrl_is_function_valid()
534 const struct stm32_desc_pin *pin = pctl->pins + i; in stm32_pctrl_is_function_valid()
549 dev_err(pctl->dev, "invalid function %d on pin %d .\n", fnum, pin_num); in stm32_pctrl_is_function_valid()
554 static int stm32_pctrl_dt_node_to_map_func(struct stm32_pinctrl *pctl, in stm32_pctrl_dt_node_to_map_func() argument
565 if (!stm32_pctrl_is_function_valid(pctl, pin, fnum)) in stm32_pctrl_dt_node_to_map_func()
580 struct stm32_pinctrl *pctl; in stm32_pctrl_dt_subnode_to_map() local
590 pctl = pinctrl_dev_get_drvdata(pctldev); in stm32_pctrl_dt_subnode_to_map()
594 dev_err(pctl->dev, "missing pins property in node %pOFn .\n", in stm32_pctrl_dt_subnode_to_map()
636 if (!stm32_pctrl_is_function_valid(pctl, pin, func)) { in stm32_pctrl_dt_subnode_to_map()
641 grp = stm32_pctrl_find_group_by_pin(pctl, pin); in stm32_pctrl_dt_subnode_to_map()
643 dev_err(pctl->dev, "unable to match pin %d to group\n", in stm32_pctrl_dt_subnode_to_map()
649 err = stm32_pctrl_dt_node_to_map_func(pctl, pin, func, grp, map, in stm32_pctrl_dt_subnode_to_map()
694 struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in stm32_pctrl_get_groups_count() local
696 return pctl->ngroups; in stm32_pctrl_get_groups_count()
702 struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in stm32_pctrl_get_group_name() local
704 return pctl->groups[group].name; in stm32_pctrl_get_group_name()
712 struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in stm32_pctrl_get_group_pins() local
714 *pins = (unsigned *)&pctl->groups[group].pin; in stm32_pctrl_get_group_pins()
747 struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in stm32_pmx_get_func_groups() local
749 *groups = pctl->grp_names; in stm32_pmx_get_func_groups()
750 *num_groups = pctl->ngroups; in stm32_pmx_get_func_groups()
758 struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent); in stm32_pmx_set_mode() local
767 if (pctl->hwlock) { in stm32_pmx_set_mode()
768 err = hwspin_lock_timeout_in_atomic(pctl->hwlock, in stm32_pmx_set_mode()
771 dev_err(pctl->dev, "Can't get hwspinlock\n"); in stm32_pmx_set_mode()
786 if (pctl->hwlock) in stm32_pmx_set_mode()
787 hwspin_unlock_in_atomic(pctl->hwlock); in stm32_pmx_set_mode()
823 struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in stm32_pmx_set_mux() local
824 struct stm32_pinctrl_group *g = pctl->groups + group; in stm32_pmx_set_mux()
830 ret = stm32_pctrl_is_function_valid(pctl, g->pin, function); in stm32_pmx_set_mux()
836 dev_err(pctl->dev, "No gpio range defined.\n"); in stm32_pmx_set_mux()
861 struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in stm32_pmx_request() local
866 dev_err(pctl->dev, "No gpio range defined.\n"); in stm32_pmx_request()
871 dev_warn(pctl->dev, "Can't access gpio %d\n", gpio); in stm32_pmx_request()
893 struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent); in stm32_pconf_set_driving() local
900 if (pctl->hwlock) { in stm32_pconf_set_driving()
901 err = hwspin_lock_timeout_in_atomic(pctl->hwlock, in stm32_pconf_set_driving()
904 dev_err(pctl->dev, "Can't get hwspinlock\n"); in stm32_pconf_set_driving()
914 if (pctl->hwlock) in stm32_pconf_set_driving()
915 hwspin_unlock_in_atomic(pctl->hwlock); in stm32_pconf_set_driving()
944 struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent); in stm32_pconf_set_speed() local
951 if (pctl->hwlock) { in stm32_pconf_set_speed()
952 err = hwspin_lock_timeout_in_atomic(pctl->hwlock, in stm32_pconf_set_speed()
955 dev_err(pctl->dev, "Can't get hwspinlock\n"); in stm32_pconf_set_speed()
965 if (pctl->hwlock) in stm32_pconf_set_speed()
966 hwspin_unlock_in_atomic(pctl->hwlock); in stm32_pconf_set_speed()
995 struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent); in stm32_pconf_set_bias() local
1002 if (pctl->hwlock) { in stm32_pconf_set_bias()
1003 err = hwspin_lock_timeout_in_atomic(pctl->hwlock, in stm32_pconf_set_bias()
1006 dev_err(pctl->dev, "Can't get hwspinlock\n"); in stm32_pconf_set_bias()
1016 if (pctl->hwlock) in stm32_pconf_set_bias()
1017 hwspin_unlock_in_atomic(pctl->hwlock); in stm32_pconf_set_bias()
1067 struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in stm32_pconf_parse_conf() local
1074 dev_err(pctl->dev, "No gpio range defined.\n"); in stm32_pconf_parse_conf()
1082 dev_warn(pctl->dev, "Can't access gpio %d\n", pin); in stm32_pconf_parse_conf()
1120 struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in stm32_pconf_group_get() local
1122 *config = pctl->groups[group].config; in stm32_pconf_group_get()
1130 struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in stm32_pconf_group_set() local
1131 struct stm32_pinctrl_group *g = &pctl->groups[group]; in stm32_pconf_group_set()
1166 stm32_pconf_get_pin_desc_by_pin_number(struct stm32_pinctrl *pctl, in stm32_pconf_get_pin_desc_by_pin_number() argument
1169 struct stm32_desc_pin *pins = pctl->pins; in stm32_pconf_get_pin_desc_by_pin_number()
1172 for (i = 0; i < pctl->npins; i++) { in stm32_pconf_get_pin_desc_by_pin_number()
1184 struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); in stm32_pconf_dbg_show() local
1240 pin_desc = stm32_pconf_get_pin_desc_by_pin_number(pctl, pin); in stm32_pconf_dbg_show()
1264 static struct stm32_desc_pin *stm32_pctrl_get_desc_pin_from_gpio(struct stm32_pinctrl *pctl, in stm32_pctrl_get_desc_pin_from_gpio() argument
1273 if (stm32_pin_nb < pctl->npins) { in stm32_pctrl_get_desc_pin_from_gpio()
1274 pin_desc = pctl->pins + stm32_pin_nb; in stm32_pctrl_get_desc_pin_from_gpio()
1280 for (i = 0; i < pctl->npins; i++) { in stm32_pctrl_get_desc_pin_from_gpio()
1281 pin_desc = pctl->pins + i; in stm32_pctrl_get_desc_pin_from_gpio()
1288 static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl, struct fwnode_handle *fwnode) in stm32_gpiolib_register_bank() argument
1290 struct stm32_gpio_bank *bank = &pctl->banks[pctl->nbanks]; in stm32_gpiolib_register_bank()
1294 struct device *dev = pctl->dev; in stm32_gpiolib_register_bank()
1330 bank_nr = pctl->nbanks; in stm32_gpiolib_register_bank()
1338 pinctrl_add_gpio_range(pctl->pctl_dev, in stm32_gpiolib_register_bank()
1339 &pctl->banks[bank_nr].range); in stm32_gpiolib_register_bank()
1352 bank->secure_control = pctl->match_data->secure_control; in stm32_gpiolib_register_bank()
1355 if (pctl->domain) { in stm32_gpiolib_register_bank()
1359 bank->domain = irq_domain_create_hierarchy(pctl->domain, 0, STM32_GPIO_IRQ_LINE, in stm32_gpiolib_register_bank()
1376 stm32_pin = stm32_pctrl_get_desc_pin_from_gpio(pctl, bank, i); in stm32_gpiolib_register_bank()
1427 struct stm32_pinctrl *pctl) in stm32_pctrl_dt_setup_irq() argument
1435 pctl->regmap = syscon_regmap_lookup_by_phandle(np, "st,syscfg"); in stm32_pctrl_dt_setup_irq()
1436 if (IS_ERR(pctl->regmap)) in stm32_pctrl_dt_setup_irq()
1437 return PTR_ERR(pctl->regmap); in stm32_pctrl_dt_setup_irq()
1439 rm = pctl->regmap; in stm32_pctrl_dt_setup_irq()
1461 pctl->irqmux[i] = devm_regmap_field_alloc(dev, rm, mux); in stm32_pctrl_dt_setup_irq()
1462 if (IS_ERR(pctl->irqmux[i])) in stm32_pctrl_dt_setup_irq()
1463 return PTR_ERR(pctl->irqmux[i]); in stm32_pctrl_dt_setup_irq()
1471 struct stm32_pinctrl *pctl = platform_get_drvdata(pdev); in stm32_pctrl_build_state() local
1474 pctl->ngroups = pctl->npins; in stm32_pctrl_build_state()
1477 pctl->groups = devm_kcalloc(&pdev->dev, pctl->ngroups, in stm32_pctrl_build_state()
1478 sizeof(*pctl->groups), GFP_KERNEL); in stm32_pctrl_build_state()
1479 if (!pctl->groups) in stm32_pctrl_build_state()
1483 pctl->grp_names = devm_kcalloc(&pdev->dev, pctl->ngroups, in stm32_pctrl_build_state()
1484 sizeof(*pctl->grp_names), GFP_KERNEL); in stm32_pctrl_build_state()
1485 if (!pctl->grp_names) in stm32_pctrl_build_state()
1488 for (i = 0; i < pctl->npins; i++) { in stm32_pctrl_build_state()
1489 const struct stm32_desc_pin *pin = pctl->pins + i; in stm32_pctrl_build_state()
1490 struct stm32_pinctrl_group *group = pctl->groups + i; in stm32_pctrl_build_state()
1494 pctl->grp_names[i] = pin->pin.name; in stm32_pctrl_build_state()
1500 static int stm32_pctrl_create_pins_tab(struct stm32_pinctrl *pctl, in stm32_pctrl_create_pins_tab() argument
1506 for (i = 0; i < pctl->match_data->npins; i++) { in stm32_pctrl_create_pins_tab()
1507 p = pctl->match_data->pins + i; in stm32_pctrl_create_pins_tab()
1508 if (pctl->pkg && !(pctl->pkg & p->pkg)) in stm32_pctrl_create_pins_tab()
1517 pctl->npins = nb_pins_available; in stm32_pctrl_create_pins_tab()
1527 struct stm32_pinctrl *pctl; in stm32_pctl_probe() local
1536 pctl = devm_kzalloc(dev, sizeof(*pctl), GFP_KERNEL); in stm32_pctl_probe()
1537 if (!pctl) in stm32_pctl_probe()
1540 platform_set_drvdata(pdev, pctl); in stm32_pctl_probe()
1543 pctl->domain = stm32_pctrl_get_irq_domain(pdev); in stm32_pctl_probe()
1544 if (IS_ERR(pctl->domain)) in stm32_pctl_probe()
1545 return PTR_ERR(pctl->domain); in stm32_pctl_probe()
1546 if (!pctl->domain) in stm32_pctl_probe()
1555 pctl->hwlock = hwspin_lock_request_specific(hwlock_id); in stm32_pctl_probe()
1558 spin_lock_init(&pctl->irqmux_lock); in stm32_pctl_probe()
1560 pctl->dev = dev; in stm32_pctl_probe()
1561 pctl->match_data = match_data; in stm32_pctl_probe()
1564 if (!device_property_read_u32(dev, "st,package", &pctl->pkg)) in stm32_pctl_probe()
1565 dev_dbg(pctl->dev, "package detected: %x\n", pctl->pkg); in stm32_pctl_probe()
1567 pctl->pins = devm_kcalloc(pctl->dev, pctl->match_data->npins, in stm32_pctl_probe()
1568 sizeof(*pctl->pins), GFP_KERNEL); in stm32_pctl_probe()
1569 if (!pctl->pins) in stm32_pctl_probe()
1572 ret = stm32_pctrl_create_pins_tab(pctl, pctl->pins); in stm32_pctl_probe()
1582 if (pctl->domain) { in stm32_pctl_probe()
1583 ret = stm32_pctrl_dt_setup_irq(pdev, pctl); in stm32_pctl_probe()
1588 pins = devm_kcalloc(&pdev->dev, pctl->npins, sizeof(*pins), in stm32_pctl_probe()
1593 for (i = 0; i < pctl->npins; i++) in stm32_pctl_probe()
1594 pins[i] = pctl->pins[i].pin; in stm32_pctl_probe()
1596 pctl->pctl_desc.name = dev_name(&pdev->dev); in stm32_pctl_probe()
1597 pctl->pctl_desc.owner = THIS_MODULE; in stm32_pctl_probe()
1598 pctl->pctl_desc.pins = pins; in stm32_pctl_probe()
1599 pctl->pctl_desc.npins = pctl->npins; in stm32_pctl_probe()
1600 pctl->pctl_desc.link_consumers = true; in stm32_pctl_probe()
1601 pctl->pctl_desc.confops = &stm32_pconf_ops; in stm32_pctl_probe()
1602 pctl->pctl_desc.pctlops = &stm32_pctrl_ops; in stm32_pctl_probe()
1603 pctl->pctl_desc.pmxops = &stm32_pmx_ops; in stm32_pctl_probe()
1604 pctl->dev = &pdev->dev; in stm32_pctl_probe()
1606 pctl->pctl_dev = devm_pinctrl_register(&pdev->dev, &pctl->pctl_desc, in stm32_pctl_probe()
1607 pctl); in stm32_pctl_probe()
1609 if (IS_ERR(pctl->pctl_dev)) { in stm32_pctl_probe()
1611 return PTR_ERR(pctl->pctl_dev); in stm32_pctl_probe()
1619 pctl->banks = devm_kcalloc(dev, banks, sizeof(*pctl->banks), in stm32_pctl_probe()
1621 if (!pctl->banks) in stm32_pctl_probe()
1626 struct stm32_gpio_bank *bank = &pctl->banks[i]; in stm32_pctl_probe()
1645 ret = stm32_gpiolib_register_bank(pctl, child); in stm32_pctl_probe()
1649 for (i = 0; i < pctl->nbanks; i++) in stm32_pctl_probe()
1650 clk_disable_unprepare(pctl->banks[i].clk); in stm32_pctl_probe()
1655 pctl->nbanks++; in stm32_pctl_probe()
1664 struct stm32_pinctrl *pctl, u32 pin) in stm32_pinctrl_restore_gpio_regs() argument
1666 const struct pin_desc *desc = pin_desc_get(pctl->pctl_dev, pin); in stm32_pinctrl_restore_gpio_regs()
1673 range = pinctrl_find_gpio_range_from_pin(pctl->pctl_dev, pin); in stm32_pinctrl_restore_gpio_regs()
1721 regmap_field_write(pctl->irqmux[offset], bank->bank_ioport_nr); in stm32_pinctrl_restore_gpio_regs()
1728 struct stm32_pinctrl *pctl = dev_get_drvdata(dev); in stm32_pinctrl_suspend() local
1731 for (i = 0; i < pctl->nbanks; i++) in stm32_pinctrl_suspend()
1732 clk_disable(pctl->banks[i].clk); in stm32_pinctrl_suspend()
1739 struct stm32_pinctrl *pctl = dev_get_drvdata(dev); in stm32_pinctrl_resume() local
1740 struct stm32_pinctrl_group *g = pctl->groups; in stm32_pinctrl_resume()
1743 for (i = 0; i < pctl->nbanks; i++) in stm32_pinctrl_resume()
1744 clk_enable(pctl->banks[i].clk); in stm32_pinctrl_resume()
1746 for (i = 0; i < pctl->ngroups; i++, g++) in stm32_pinctrl_resume()
1747 stm32_pinctrl_restore_gpio_regs(pctl, g->pin); in stm32_pinctrl_resume()