pinctrl/samsung/pinctrl-samsung.h

1 /* SPDX-License-Identifier: GPL-2.0+ */
3  * pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's.
25  * enum pincfg_type - possible pin configuration types supported.
46  * packed together into a 16-bits. The upper 8-bits represent the configuration
47  * type and the lower 8-bits hold the value of the configuration type.
70  * enum pud_index - Possible index values to access the pud_val array.
84  * enum eint_type - possible external interrupt types.
90  * Samsung GPIO controller groups all the available pins into banks. The pins
104 /* maximum length of a pin in pin descriptor (example: "gpa0-0") */
135  * struct samsung_pin_bank_data: represent a controller pin-bank (init data).
137  * @pctl_offset: starting offset of the pin-bank registers.
138  * @pctl_res_idx: index of base address for pin-bank registers.
139  * @nr_pins: number of pins included in this bank.
143  * @eint_offset: SoC-specific EINT register or interrupt offset of bank.
144  * @eint_con_offset: ExynosAuto SoC-specific EINT control register offset of bank.
145  * @eint_mask_offset: ExynosAuto SoC-specific EINT mask register offset of bank.
146  * @eint_pend_offset: ExynosAuto SoC-specific EINT pend register offset of bank.
165  * struct samsung_pin_bank: represent a controller pin-bank.
167  * @pctl_base: base address of the pin-bank registers
168  * @pctl_offset: starting offset of the pin-bank registers.
169  * @nr_pins: number of pins included in this bank.
170  * @eint_base: base address of the pin-bank EINT registers.
174  * @eint_offset: SoC-specific EINT register or interrupt offset of bank.
175  * @eint_con_offset: ExynosAuto SoC-specific EINT register or interrupt offset of bank.
176  * @eint_mask_offset: ExynosAuto SoC-specific EINT mask register offset of bank.
177  * @eint_pend_offset: ExynosAuto SoC-specific EINT pend register offset of bank.
180  * @pin_base: starting pin number of the bank.
181  * @soc_priv: per-bank private data for SoC-specific code.
183  * @drvdata: link to controller driver data
221  * struct samsung_retention_data: runtime pin-bank retention control data.
223  * @nr_regs: number of registers in @regs array.
241  * struct samsung_retention_data: represent a pin-bank retention control data.
243  * @nr_regs: number of registers in @regs array.
258  * struct samsung_pin_ctrl: represent a pin controller.
259  * @pin_banks: list of pin banks included in this controller.
260  * @nr_banks: number of pin banks.
261  * @nr_ext_resources: number of the extra base address for pin banks.
264  *	interrupts for the controller.
266  *	interrupts for the controller.
267  * @suspend: platform specific suspend callback, executed during pin controller
269  * @resume: platform specific resume callback, executed during pin controller
291  * @virt_base: register base address of the controller; this will be equal
292  *             to each bank samsung_pin_bank->pctl_base and used on legacy
295  * @dev: device instance representing the controller.
296  * @irq: interrpt number used by the controller to notify gpio interrupts.
298  * @ctrl: pin controller instance managed by the driver.
299  * @pctl: pin controller descriptor registered with the pinctrl subsystem.
302  * @nr_groups: number of such pin groups.
304  * @nr_function: number of such pin functions.
305  * @nr_pins: number of pins supported by the controller.
307  * @suspend: platform specific suspend callback, executed during pin controller
309  * @resume: platform specific resume callback, executed during pin controller
340  * @ctrl: array of pin controller data.
352  * @num_pins: number of pins included in this group.
353  * @func: the function number to be programmed when selected.
366  * @num_groups: number of groups included in @groups.