Lines Matching +full:exynos5410 +full:- +full:clock
1 // SPDX-License-Identifier: GPL-2.0+
3 // pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's.
32 #include "pinctrl-samsung.h"
42 { "samsung,pin-pud", PINCFG_TYPE_PUD },
43 { "samsung,pin-drv", PINCFG_TYPE_DRV },
44 { "samsung,pin-con-pdn", PINCFG_TYPE_CON_PDN },
45 { "samsung,pin-pud-pdn", PINCFG_TYPE_PUD_PDN },
46 { "samsung,pin-val", PINCFG_TYPE_DAT },
53 return pmx->nr_groups; in samsung_get_group_count()
61 return pmx->pin_groups[group].name; in samsung_get_group_name()
71 *pins = pmx->pin_groups[group].pins; in samsung_get_group_pins()
72 *num_pins = pmx->pin_groups[group].num_pins; in samsung_get_group_pins()
90 return -ENOMEM; in reserve_map()
92 memset(new_map + old_num, 0, (new_num - old_num) * sizeof(*new_map)); in reserve_map()
105 return -ENOSPC; in add_map_mux()
123 return -ENOSPC; in add_map_configs()
128 return -ENOMEM; in add_map_configs()
149 return -ENOMEM; in add_config()
189 ret = of_property_read_u32(np, "samsung,pin-function", &val); in samsung_dt_subnode_to_map()
201 } else if (ret != -EINVAL) { in samsung_dt_subnode_to_map()
226 num_maps, group, np->full_name); in samsung_dt_subnode_to_map()
263 return samsung_dt_subnode_to_map(drvdata, pctldev->dev, in samsung_dt_node_to_map()
269 ret = samsung_dt_subnode_to_map(drvdata, pctldev->dev, np, map, in samsung_dt_node_to_map()
324 return drvdata->nr_functions; in samsung_get_functions_count()
334 return drvdata->pmx_functions[selector].name; in samsung_pinmux_get_fname()
345 *groups = drvdata->pmx_functions[selector].groups; in samsung_pinmux_get_groups()
346 *num_groups = drvdata->pmx_functions[selector].num_groups; in samsung_pinmux_get_groups()
360 b = drvdata->pin_banks; in pin_to_reg_bank()
362 while ((pin >= b->pin_base) && in pin_to_reg_bank()
363 ((b->pin_base + b->nr_pins - 1) < pin)) in pin_to_reg_bank()
366 *reg = b->pctl_base + b->pctl_offset; in pin_to_reg_bank()
367 *offset = pin - b->pin_base; in pin_to_reg_bank()
387 func = &drvdata->pmx_functions[selector]; in samsung_pinmux_setup()
388 grp = &drvdata->pin_groups[group]; in samsung_pinmux_setup()
390 pin_to_reg_bank(drvdata, grp->pins[0], ®, &pin_offset, &bank); in samsung_pinmux_setup()
391 type = bank->type; in samsung_pinmux_setup()
392 mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1; in samsung_pinmux_setup()
393 shift = pin_offset * type->fld_width[PINCFG_TYPE_FUNC]; in samsung_pinmux_setup()
396 shift -= 32; in samsung_pinmux_setup()
400 ret = clk_enable(drvdata->pclk); in samsung_pinmux_setup()
402 dev_err(pctldev->dev, "failed to enable clock for setup\n"); in samsung_pinmux_setup()
406 raw_spin_lock_irqsave(&bank->slock, flags); in samsung_pinmux_setup()
408 data = readl(reg + type->reg_offset[PINCFG_TYPE_FUNC]); in samsung_pinmux_setup()
410 data |= func->val << shift; in samsung_pinmux_setup()
411 writel(data, reg + type->reg_offset[PINCFG_TYPE_FUNC]); in samsung_pinmux_setup()
413 raw_spin_unlock_irqrestore(&bank->slock, flags); in samsung_pinmux_setup()
415 clk_disable(drvdata->pclk); in samsung_pinmux_setup()
452 type = bank->type; in samsung_pinconf_rw()
454 if (cfg_type >= PINCFG_TYPE_NUM || !type->fld_width[cfg_type]) in samsung_pinconf_rw()
455 return -EINVAL; in samsung_pinconf_rw()
457 width = type->fld_width[cfg_type]; in samsung_pinconf_rw()
458 cfg_reg = type->reg_offset[cfg_type]; in samsung_pinconf_rw()
460 ret = clk_enable(drvdata->pclk); in samsung_pinconf_rw()
462 dev_err(drvdata->dev, "failed to enable clock\n"); in samsung_pinconf_rw()
466 raw_spin_lock_irqsave(&bank->slock, flags); in samsung_pinconf_rw()
468 mask = (1 << width) - 1; in samsung_pinconf_rw()
483 raw_spin_unlock_irqrestore(&bank->slock, flags); in samsung_pinconf_rw()
485 clk_disable(drvdata->pclk); in samsung_pinconf_rw()
522 pins = drvdata->pin_groups[group].pins; in samsung_pinconf_group_set()
524 for (cnt = 0; cnt < drvdata->pin_groups[group].num_pins; cnt++) in samsung_pinconf_group_set()
538 pins = drvdata->pin_groups[group].pins; in samsung_pinconf_group_get()
552 * The samsung_gpio_set_vlaue() should be called with "bank->slock" held
559 const struct samsung_pin_bank_type *type = bank->type; in samsung_gpio_set_value()
563 reg = bank->pctl_base + bank->pctl_offset; in samsung_gpio_set_value()
565 data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]); in samsung_gpio_set_value()
569 writel(data, reg + type->reg_offset[PINCFG_TYPE_DAT]); in samsung_gpio_set_value()
576 struct samsung_pinctrl_drv_data *drvdata = bank->drvdata; in samsung_gpio_set()
579 if (clk_enable(drvdata->pclk)) { in samsung_gpio_set()
580 dev_err(drvdata->dev, "failed to enable clock\n"); in samsung_gpio_set()
584 raw_spin_lock_irqsave(&bank->slock, flags); in samsung_gpio_set()
586 raw_spin_unlock_irqrestore(&bank->slock, flags); in samsung_gpio_set()
588 clk_disable(drvdata->pclk); in samsung_gpio_set()
597 const struct samsung_pin_bank_type *type = bank->type; in samsung_gpio_get()
598 struct samsung_pinctrl_drv_data *drvdata = bank->drvdata; in samsung_gpio_get()
601 reg = bank->pctl_base + bank->pctl_offset; in samsung_gpio_get()
603 ret = clk_enable(drvdata->pclk); in samsung_gpio_get()
605 dev_err(drvdata->dev, "failed to enable clock\n"); in samsung_gpio_get()
609 data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]); in samsung_gpio_get()
613 clk_disable(drvdata->pclk); in samsung_gpio_get()
619 * The samsung_gpio_set_direction() should be called with "bank->slock" held
633 type = bank->type; in samsung_gpio_set_direction()
635 reg = bank->pctl_base + bank->pctl_offset in samsung_gpio_set_direction()
636 + type->reg_offset[PINCFG_TYPE_FUNC]; in samsung_gpio_set_direction()
638 mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1; in samsung_gpio_set_direction()
639 shift = offset * type->fld_width[PINCFG_TYPE_FUNC]; in samsung_gpio_set_direction()
642 shift -= 32; in samsung_gpio_set_direction()
659 struct samsung_pinctrl_drv_data *drvdata = bank->drvdata; in samsung_gpio_direction_input()
663 ret = clk_enable(drvdata->pclk); in samsung_gpio_direction_input()
665 dev_err(drvdata->dev, "failed to enable clock\n"); in samsung_gpio_direction_input()
669 raw_spin_lock_irqsave(&bank->slock, flags); in samsung_gpio_direction_input()
671 raw_spin_unlock_irqrestore(&bank->slock, flags); in samsung_gpio_direction_input()
673 clk_disable(drvdata->pclk); in samsung_gpio_direction_input()
683 struct samsung_pinctrl_drv_data *drvdata = bank->drvdata; in samsung_gpio_direction_output()
687 ret = clk_enable(drvdata->pclk); in samsung_gpio_direction_output()
689 dev_err(drvdata->dev, "failed to enable clock\n"); in samsung_gpio_direction_output()
693 raw_spin_lock_irqsave(&bank->slock, flags); in samsung_gpio_direction_output()
696 raw_spin_unlock_irqrestore(&bank->slock, flags); in samsung_gpio_direction_output()
698 clk_disable(drvdata->pclk); in samsung_gpio_direction_output()
712 if (!bank->irq_domain) in samsung_gpio_to_irq()
713 return -ENXIO; in samsung_gpio_to_irq()
715 virq = irq_create_mapping(bank->irq_domain, offset); in samsung_gpio_to_irq()
717 return (virq) ? : -ENXIO; in samsung_gpio_to_irq()
724 bank->grange.name = bank->name; in samsung_add_pin_ranges()
725 bank->grange.id = bank->id; in samsung_add_pin_ranges()
726 bank->grange.pin_base = bank->pin_base; in samsung_add_pin_ranges()
727 bank->grange.base = gc->base; in samsung_add_pin_ranges()
728 bank->grange.npins = bank->nr_pins; in samsung_add_pin_ranges()
729 bank->grange.gc = &bank->gpio_chip; in samsung_add_pin_ranges()
730 pinctrl_add_gpio_range(bank->drvdata->pctl_dev, &bank->grange); in samsung_add_pin_ranges()
740 struct pinctrl_desc *ctrldesc = &drvdata->pctl; in samsung_pinctrl_create_groups()
745 groups = devm_kcalloc(dev, ctrldesc->npins, sizeof(*groups), in samsung_pinctrl_create_groups()
748 return ERR_PTR(-EINVAL); in samsung_pinctrl_create_groups()
751 pdesc = ctrldesc->pins; in samsung_pinctrl_create_groups()
752 for (i = 0; i < ctrldesc->npins; ++i, ++pdesc, ++grp) { in samsung_pinctrl_create_groups()
753 grp->name = pdesc->name; in samsung_pinctrl_create_groups()
754 grp->pins = &pdesc->number; in samsung_pinctrl_create_groups()
755 grp->num_pins = 1; in samsung_pinctrl_create_groups()
758 *cnt = ctrldesc->npins; in samsung_pinctrl_create_groups()
771 if (of_property_read_u32(func_np, "samsung,pin-function", &func->val)) in samsung_pinctrl_create_function()
777 return -EINVAL; in samsung_pinctrl_create_function()
780 func->name = func_np->full_name; in samsung_pinctrl_create_function()
782 func->groups = devm_kcalloc(dev, npins, sizeof(char *), GFP_KERNEL); in samsung_pinctrl_create_function()
783 if (!func->groups) in samsung_pinctrl_create_function()
784 return -ENOMEM; in samsung_pinctrl_create_function()
798 func->groups[i] = gname; in samsung_pinctrl_create_function()
801 func->num_groups = npins; in samsung_pinctrl_create_function()
811 struct device_node *dev_np = dev->of_node; in samsung_pinctrl_create_functions()
825 "samsung,pin-function")) in samsung_pinctrl_create_functions()
833 "samsung,pin-function")) in samsung_pinctrl_create_functions()
842 return ERR_PTR(-ENOMEM); in samsung_pinctrl_create_functions()
881 * from device node of the pin-controller. A pin group is formed with all
888 struct device *dev = &pdev->dev; in samsung_pinctrl_parse_dt()
905 drvdata->pin_groups = groups; in samsung_pinctrl_parse_dt()
906 drvdata->nr_groups = grp_cnt; in samsung_pinctrl_parse_dt()
907 drvdata->pmx_functions = functions; in samsung_pinctrl_parse_dt()
908 drvdata->nr_functions = func_cnt; in samsung_pinctrl_parse_dt()
917 struct pinctrl_desc *ctrldesc = &drvdata->pctl; in samsung_pinctrl_register()
923 ctrldesc->name = "samsung-pinctrl"; in samsung_pinctrl_register()
924 ctrldesc->owner = THIS_MODULE; in samsung_pinctrl_register()
925 ctrldesc->pctlops = &samsung_pctrl_ops; in samsung_pinctrl_register()
926 ctrldesc->pmxops = &samsung_pinmux_ops; in samsung_pinctrl_register()
927 ctrldesc->confops = &samsung_pinconf_ops; in samsung_pinctrl_register()
929 pindesc = devm_kcalloc(&pdev->dev, in samsung_pinctrl_register()
930 drvdata->nr_pins, sizeof(*pindesc), in samsung_pinctrl_register()
933 return -ENOMEM; in samsung_pinctrl_register()
934 ctrldesc->pins = pindesc; in samsung_pinctrl_register()
935 ctrldesc->npins = drvdata->nr_pins; in samsung_pinctrl_register()
938 for (pin = 0, pdesc = pindesc; pin < ctrldesc->npins; pin++, pdesc++) in samsung_pinctrl_register()
939 pdesc->number = pin; in samsung_pinctrl_register()
943 * the pins which belong to this pin-controller. in samsung_pinctrl_register()
945 pin_names = devm_kzalloc(&pdev->dev, in samsung_pinctrl_register()
947 drvdata->nr_pins), in samsung_pinctrl_register()
950 return -ENOMEM; in samsung_pinctrl_register()
952 /* for each pin, the name of the pin is pin-bank name + pin number */ in samsung_pinctrl_register()
953 for (bank = 0; bank < drvdata->nr_banks; bank++) { in samsung_pinctrl_register()
954 pin_bank = &drvdata->pin_banks[bank]; in samsung_pinctrl_register()
955 pin_bank->id = bank; in samsung_pinctrl_register()
956 for (pin = 0; pin < pin_bank->nr_pins; pin++) { in samsung_pinctrl_register()
957 sprintf(pin_names, "%s-%d", pin_bank->name, pin); in samsung_pinctrl_register()
958 pdesc = pindesc + pin_bank->pin_base + pin; in samsung_pinctrl_register()
959 pdesc->name = pin_names; in samsung_pinctrl_register()
968 ret = devm_pinctrl_register_and_init(&pdev->dev, ctrldesc, drvdata, in samsung_pinctrl_register()
969 &drvdata->pctl_dev); in samsung_pinctrl_register()
971 dev_err(&pdev->dev, "could not register pinctrl driver\n"); in samsung_pinctrl_register()
982 struct samsung_pin_bank *bank = drvdata->pin_banks; in samsung_pinctrl_unregister()
985 for (i = 0; i < drvdata->nr_banks; ++i, ++bank) in samsung_pinctrl_unregister()
986 pinctrl_remove_gpio_range(drvdata->pctl_dev, &bank->grange); in samsung_pinctrl_unregister()
993 unsigned int *pud_val = drvdata->pud_val; in samsung_pud_value_init()
1001 * Enable or Disable the pull-down and pull-up for the gpio pins in the
1008 const struct samsung_pin_bank_type *type = bank->type; in samsung_gpio_set_pud()
1012 reg = bank->pctl_base + bank->pctl_offset; in samsung_gpio_set_pud()
1013 data = readl(reg + type->reg_offset[PINCFG_TYPE_PUD]); in samsung_gpio_set_pud()
1014 mask = (1 << type->fld_width[PINCFG_TYPE_PUD]) - 1; in samsung_gpio_set_pud()
1015 data &= ~(mask << (offset * type->fld_width[PINCFG_TYPE_PUD])); in samsung_gpio_set_pud()
1016 data |= value << (offset * type->fld_width[PINCFG_TYPE_PUD]); in samsung_gpio_set_pud()
1017 writel(data, reg + type->reg_offset[PINCFG_TYPE_PUD]); in samsung_gpio_set_pud()
1028 struct samsung_pinctrl_drv_data *drvdata = bank->drvdata; in samsung_gpio_set_config()
1035 value = drvdata->pud_val[PUD_PULL_DISABLE]; in samsung_gpio_set_config()
1038 value = drvdata->pud_val[PUD_PULL_DOWN]; in samsung_gpio_set_config()
1041 value = drvdata->pud_val[PUD_PULL_UP]; in samsung_gpio_set_config()
1044 return -ENOTSUPP; in samsung_gpio_set_config()
1047 ret = clk_enable(drvdata->pclk); in samsung_gpio_set_config()
1049 dev_err(drvdata->dev, "failed to enable clock\n"); in samsung_gpio_set_config()
1053 raw_spin_lock_irqsave(&bank->slock, flags); in samsung_gpio_set_config()
1055 raw_spin_unlock_irqrestore(&bank->slock, flags); in samsung_gpio_set_config()
1057 clk_disable(drvdata->pclk); in samsung_gpio_set_config()
1079 struct samsung_pin_bank *bank = drvdata->pin_banks; in samsung_gpiolib_register()
1084 for (i = 0; i < drvdata->nr_banks; ++i, ++bank) { in samsung_gpiolib_register()
1085 bank->gpio_chip = samsung_gpiolib_chip; in samsung_gpiolib_register()
1087 gc = &bank->gpio_chip; in samsung_gpiolib_register()
1088 gc->base = -1; /* Dynamic allocation */ in samsung_gpiolib_register()
1089 gc->ngpio = bank->nr_pins; in samsung_gpiolib_register()
1090 gc->parent = &pdev->dev; in samsung_gpiolib_register()
1091 gc->fwnode = bank->fwnode; in samsung_gpiolib_register()
1092 gc->label = bank->name; in samsung_gpiolib_register()
1094 ret = devm_gpiochip_add_data(&pdev->dev, gc, bank); in samsung_gpiolib_register()
1096 dev_err(&pdev->dev, "failed to register gpio_chip %s, error code: %d\n", in samsung_gpiolib_register()
1097 gc->label, ret); in samsung_gpiolib_register()
1108 struct device_node *node = pdev->dev.of_node; in samsung_pinctrl_get_soc_data_for_of_alias()
1114 dev_err(&pdev->dev, "failed to get alias id\n"); in samsung_pinctrl_get_soc_data_for_of_alias()
1118 of_data = of_device_get_match_data(&pdev->dev); in samsung_pinctrl_get_soc_data_for_of_alias()
1119 if (id >= of_data->num_ctrl) { in samsung_pinctrl_get_soc_data_for_of_alias()
1120 dev_err(&pdev->dev, "invalid alias id %d\n", id); in samsung_pinctrl_get_soc_data_for_of_alias()
1124 return &(of_data->ctrl[id]); in samsung_pinctrl_get_soc_data_for_of_alias()
1132 bank = d->pin_banks; in samsung_banks_node_put()
1133 for (i = 0; i < d->nr_banks; ++i, ++bank) in samsung_banks_node_put()
1134 fwnode_handle_put(bank->fwnode); in samsung_banks_node_put()
1139 * skipping optional "-gpio" node suffix. When found, assign node to the bank.
1143 const char *suffix = "-gpio-bank"; in samsung_banks_node_get()
1151 bank = d->pin_banks; in samsung_banks_node_get()
1152 for (i = 0; i < d->nr_banks; ++i, ++bank) { in samsung_banks_node_get()
1153 strscpy(node_name, bank->name, sizeof(node_name)); in samsung_banks_node_get()
1157 bank->name); in samsung_banks_node_get()
1166 if (of_node_name_eq(np, bank->name)) in samsung_banks_node_get()
1171 bank->fwnode = child; in samsung_banks_node_get()
1173 dev_warn(dev, "Missing node for bank %s - invalid DTB\n", in samsung_banks_node_get()
1174 bank->name); in samsung_banks_node_get()
1193 return ERR_PTR(-ENOENT); in samsung_pinctrl_get_soc_data()
1195 d->suspend = ctrl->suspend; in samsung_pinctrl_get_soc_data()
1196 d->resume = ctrl->resume; in samsung_pinctrl_get_soc_data()
1197 d->nr_banks = ctrl->nr_banks; in samsung_pinctrl_get_soc_data()
1198 d->pin_banks = devm_kcalloc(&pdev->dev, d->nr_banks, in samsung_pinctrl_get_soc_data()
1199 sizeof(*d->pin_banks), GFP_KERNEL); in samsung_pinctrl_get_soc_data()
1200 if (!d->pin_banks) in samsung_pinctrl_get_soc_data()
1201 return ERR_PTR(-ENOMEM); in samsung_pinctrl_get_soc_data()
1203 if (ctrl->nr_ext_resources + 1 > SAMSUNG_PINCTRL_NUM_RESOURCES) in samsung_pinctrl_get_soc_data()
1204 return ERR_PTR(-EINVAL); in samsung_pinctrl_get_soc_data()
1206 for (i = 0; i < ctrl->nr_ext_resources + 1; i++) { in samsung_pinctrl_get_soc_data()
1209 dev_err(&pdev->dev, "failed to get mem%d resource\n", i); in samsung_pinctrl_get_soc_data()
1210 return ERR_PTR(-EINVAL); in samsung_pinctrl_get_soc_data()
1212 virt_base[i] = devm_ioremap(&pdev->dev, res->start, in samsung_pinctrl_get_soc_data()
1215 dev_err(&pdev->dev, "failed to ioremap %pR\n", res); in samsung_pinctrl_get_soc_data()
1216 return ERR_PTR(-EIO); in samsung_pinctrl_get_soc_data()
1220 bank = d->pin_banks; in samsung_pinctrl_get_soc_data()
1221 bdata = ctrl->pin_banks; in samsung_pinctrl_get_soc_data()
1222 for (i = 0; i < ctrl->nr_banks; ++i, ++bdata, ++bank) { in samsung_pinctrl_get_soc_data()
1223 bank->type = bdata->type; in samsung_pinctrl_get_soc_data()
1224 bank->pctl_offset = bdata->pctl_offset; in samsung_pinctrl_get_soc_data()
1225 bank->nr_pins = bdata->nr_pins; in samsung_pinctrl_get_soc_data()
1226 bank->eint_func = bdata->eint_func; in samsung_pinctrl_get_soc_data()
1227 bank->eint_type = bdata->eint_type; in samsung_pinctrl_get_soc_data()
1228 bank->eint_mask = bdata->eint_mask; in samsung_pinctrl_get_soc_data()
1229 bank->eint_offset = bdata->eint_offset; in samsung_pinctrl_get_soc_data()
1230 bank->eint_con_offset = bdata->eint_con_offset; in samsung_pinctrl_get_soc_data()
1231 bank->eint_mask_offset = bdata->eint_mask_offset; in samsung_pinctrl_get_soc_data()
1232 bank->eint_pend_offset = bdata->eint_pend_offset; in samsung_pinctrl_get_soc_data()
1233 bank->name = bdata->name; in samsung_pinctrl_get_soc_data()
1235 raw_spin_lock_init(&bank->slock); in samsung_pinctrl_get_soc_data()
1236 bank->drvdata = d; in samsung_pinctrl_get_soc_data()
1237 bank->pin_base = d->nr_pins; in samsung_pinctrl_get_soc_data()
1238 d->nr_pins += bank->nr_pins; in samsung_pinctrl_get_soc_data()
1240 bank->eint_base = virt_base[0]; in samsung_pinctrl_get_soc_data()
1241 bank->pctl_base = virt_base[bdata->pctl_res_idx]; in samsung_pinctrl_get_soc_data()
1248 d->virt_base = virt_base[0]; in samsung_pinctrl_get_soc_data()
1250 samsung_banks_node_get(&pdev->dev, d); in samsung_pinctrl_get_soc_data()
1259 struct device *dev = &pdev->dev; in samsung_pinctrl_probe()
1264 return -ENOMEM; in samsung_pinctrl_probe()
1268 dev_err(&pdev->dev, "driver data not available\n"); in samsung_pinctrl_probe()
1271 drvdata->dev = dev; in samsung_pinctrl_probe()
1274 if (ret < 0 && ret != -ENXIO) in samsung_pinctrl_probe()
1277 drvdata->irq = ret; in samsung_pinctrl_probe()
1279 if (ctrl->retention_data) { in samsung_pinctrl_probe()
1280 drvdata->retention_ctrl = ctrl->retention_data->init(drvdata, in samsung_pinctrl_probe()
1281 ctrl->retention_data); in samsung_pinctrl_probe()
1282 if (IS_ERR(drvdata->retention_ctrl)) { in samsung_pinctrl_probe()
1283 ret = PTR_ERR(drvdata->retention_ctrl); in samsung_pinctrl_probe()
1288 drvdata->pclk = devm_clk_get_optional_prepared(dev, "pclk"); in samsung_pinctrl_probe()
1289 if (IS_ERR(drvdata->pclk)) { in samsung_pinctrl_probe()
1290 ret = PTR_ERR(drvdata->pclk); in samsung_pinctrl_probe()
1298 if (ctrl->eint_gpio_init) in samsung_pinctrl_probe()
1299 ctrl->eint_gpio_init(drvdata); in samsung_pinctrl_probe()
1300 if (ctrl->eint_wkup_init) in samsung_pinctrl_probe()
1301 ctrl->eint_wkup_init(drvdata); in samsung_pinctrl_probe()
1303 if (ctrl->pud_value_init) in samsung_pinctrl_probe()
1304 ctrl->pud_value_init(drvdata); in samsung_pinctrl_probe()
1312 ret = pinctrl_enable(drvdata->pctl_dev); in samsung_pinctrl_probe()
1328 * samsung_pinctrl_suspend - save pinctrl state for suspend
1337 i = clk_enable(drvdata->pclk); in samsung_pinctrl_suspend()
1339 dev_err(drvdata->dev, in samsung_pinctrl_suspend()
1340 "failed to enable clock for saving state\n"); in samsung_pinctrl_suspend()
1344 for (i = 0; i < drvdata->nr_banks; i++) { in samsung_pinctrl_suspend()
1345 struct samsung_pin_bank *bank = &drvdata->pin_banks[i]; in samsung_pinctrl_suspend()
1346 const void __iomem *reg = bank->pctl_base + bank->pctl_offset; in samsung_pinctrl_suspend()
1347 const u8 *offs = bank->type->reg_offset; in samsung_pinctrl_suspend()
1348 const u8 *widths = bank->type->fld_width; in samsung_pinctrl_suspend()
1357 bank->pm_save[type] = readl(reg + offs[type]); in samsung_pinctrl_suspend()
1359 if (widths[PINCFG_TYPE_FUNC] * bank->nr_pins > 32) { in samsung_pinctrl_suspend()
1361 bank->pm_save[PINCFG_TYPE_NUM] = in samsung_pinctrl_suspend()
1364 bank->name, reg, in samsung_pinctrl_suspend()
1365 bank->pm_save[PINCFG_TYPE_FUNC], in samsung_pinctrl_suspend()
1366 bank->pm_save[PINCFG_TYPE_NUM]); in samsung_pinctrl_suspend()
1368 pr_debug("Save %s @ %p (con %#010x)\n", bank->name, in samsung_pinctrl_suspend()
1369 reg, bank->pm_save[PINCFG_TYPE_FUNC]); in samsung_pinctrl_suspend()
1373 clk_disable(drvdata->pclk); in samsung_pinctrl_suspend()
1375 if (drvdata->suspend) in samsung_pinctrl_suspend()
1376 drvdata->suspend(drvdata); in samsung_pinctrl_suspend()
1377 if (drvdata->retention_ctrl && drvdata->retention_ctrl->enable) in samsung_pinctrl_suspend()
1378 drvdata->retention_ctrl->enable(drvdata); in samsung_pinctrl_suspend()
1384 * samsung_pinctrl_resume - restore pinctrl state from suspend
1398 * enable clock before the callback, as we don't want to have to deal in samsung_pinctrl_resume()
1399 * with callback cleanup on clock failures. in samsung_pinctrl_resume()
1401 ret = clk_enable(drvdata->pclk); in samsung_pinctrl_resume()
1403 dev_err(drvdata->dev, in samsung_pinctrl_resume()
1404 "failed to enable clock for restoring state\n"); in samsung_pinctrl_resume()
1408 if (drvdata->resume) in samsung_pinctrl_resume()
1409 drvdata->resume(drvdata); in samsung_pinctrl_resume()
1411 for (i = 0; i < drvdata->nr_banks; i++) { in samsung_pinctrl_resume()
1412 struct samsung_pin_bank *bank = &drvdata->pin_banks[i]; in samsung_pinctrl_resume()
1413 void __iomem *reg = bank->pctl_base + bank->pctl_offset; in samsung_pinctrl_resume()
1414 const u8 *offs = bank->type->reg_offset; in samsung_pinctrl_resume()
1415 const u8 *widths = bank->type->fld_width; in samsung_pinctrl_resume()
1422 if (widths[PINCFG_TYPE_FUNC] * bank->nr_pins > 32) { in samsung_pinctrl_resume()
1425 bank->name, reg, in samsung_pinctrl_resume()
1428 bank->pm_save[PINCFG_TYPE_FUNC], in samsung_pinctrl_resume()
1429 bank->pm_save[PINCFG_TYPE_NUM]); in samsung_pinctrl_resume()
1430 writel(bank->pm_save[PINCFG_TYPE_NUM], in samsung_pinctrl_resume()
1433 pr_debug("%s @ %p (con %#010x => %#010x)\n", bank->name, in samsung_pinctrl_resume()
1435 bank->pm_save[PINCFG_TYPE_FUNC]); in samsung_pinctrl_resume()
1439 writel(bank->pm_save[type], reg + offs[type]); in samsung_pinctrl_resume()
1442 clk_disable(drvdata->pclk); in samsung_pinctrl_resume()
1444 if (drvdata->retention_ctrl && drvdata->retention_ctrl->disable) in samsung_pinctrl_resume()
1445 drvdata->retention_ctrl->disable(drvdata); in samsung_pinctrl_resume()
1452 { .compatible = "samsung,exynos3250-pinctrl",
1454 { .compatible = "samsung,exynos4210-pinctrl",
1456 { .compatible = "samsung,exynos4x12-pinctrl",
1458 { .compatible = "samsung,exynos5250-pinctrl",
1460 { .compatible = "samsung,exynos5260-pinctrl",
1462 { .compatible = "samsung,exynos5410-pinctrl",
1464 { .compatible = "samsung,exynos5420-pinctrl",
1466 { .compatible = "samsung,s5pv210-pinctrl",
1470 { .compatible = "google,gs101-pinctrl",
1472 { .compatible = "samsung,exynos5433-pinctrl",
1474 { .compatible = "samsung,exynos7-pinctrl",
1476 { .compatible = "samsung,exynos7885-pinctrl",
1478 { .compatible = "samsung,exynos850-pinctrl",
1480 { .compatible = "samsung,exynosautov9-pinctrl",
1482 { .compatible = "samsung,exynosautov920-pinctrl",
1484 { .compatible = "tesla,fsd-pinctrl",
1488 { .compatible = "samsung,s3c64xx-pinctrl",
1502 .name = "samsung-pinctrl",