Lines Matching refs:RZG2L_PINS_PER_PORT
167 #define RZG2L_PIN_ID_TO_PORT(id) ((id) / RZG2L_PINS_PER_PORT)
168 #define RZG2L_PIN_ID_TO_PIN(id) ((id) % RZG2L_PINS_PER_PORT)
2502 u32 nports = pctrl->data->n_port_pins / RZG2L_PINS_PER_PORT; in rzg2l_pinctrl_reg_cache_alloc()
2666 if (i && !(i % RZG2L_PINS_PER_PORT)) in rzg2l_pinctrl_register()
2673 i % RZG2L_PINS_PER_PORT); in rzg2l_pinctrl_register()
2727 BUILD_BUG_ON(ARRAY_SIZE(r9a07g044_gpio_configs) * RZG2L_PINS_PER_PORT > in rzg2l_pinctrl_probe()
2730 BUILD_BUG_ON(ARRAY_SIZE(r9a07g043_gpio_configs) * RZG2L_PINS_PER_PORT > in rzg2l_pinctrl_probe()
2733 BUILD_BUG_ON(ARRAY_SIZE(r9a08g045_gpio_configs) * RZG2L_PINS_PER_PORT > in rzg2l_pinctrl_probe()
2736 BUILD_BUG_ON(ARRAY_SIZE(r9a09g057_gpio_configs) * RZG2L_PINS_PER_PORT > in rzg2l_pinctrl_probe()
2776 u32 nports = pctrl->data->n_port_pins / RZG2L_PINS_PER_PORT; in rzg2l_pinctrl_pm_setup_regs()
2885 u32 nports = pctrl->data->n_port_pins / RZG2L_PINS_PER_PORT; in rzg2l_pinctrl_pm_setup_pfc()
3083 .n_port_pins = ARRAY_SIZE(r9a07g043_gpio_configs) * RZG2L_PINS_PER_PORT,
3103 .n_port_pins = ARRAY_SIZE(r9a07g044_gpio_configs) * RZG2L_PINS_PER_PORT,
3120 .n_port_pins = ARRAY_SIZE(r9a08g045_gpio_configs) * RZG2L_PINS_PER_PORT,
3136 .n_port_pins = ARRAY_SIZE(r9a09g057_gpio_configs) * RZG2L_PINS_PER_PORT,