127 	struct pinctrl_dev *pctrl;  member
166 static int pm8xxx_mpp_update(struct pm8xxx_mpp *pctrl,  in pm8xxx_mpp_update()  argument
235 	ret = regmap_write(pctrl->regmap, pin->reg, val);  in pm8xxx_mpp_update()
237 		dev_err(pctrl->dev, "failed to write register\n");  in pm8xxx_mpp_update()
244 	struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);  in pm8xxx_get_groups_count()  local
246 	return pctrl->npins;  in pm8xxx_get_groups_count()
261 	struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);  in pm8xxx_get_group_pins()  local
263 	*pins = &pctrl->desc.pins[group].number;  in pm8xxx_get_group_pins()
293 	struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);  in pm8xxx_get_function_groups()  local
296 	*num_groups = pctrl->npins;  in pm8xxx_get_function_groups()
304 	struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);  in pm8xxx_pinmux_set_mux()  local
305 	struct pm8xxx_pin_data *pin = pctrl->desc.pins[group].drv_data;  in pm8xxx_pinmux_set_mux()
308 	pm8xxx_mpp_update(pctrl, pin);  in pm8xxx_pinmux_set_mux()
324 	struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);  in pm8xxx_pin_config_get()  local
325 	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;  in pm8xxx_pin_config_get()
374 	struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);  in pm8xxx_pin_config_set()  local
375 	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;  in pm8xxx_pin_config_set()
417 			dev_err(pctrl->dev,  in pm8xxx_pin_config_set()
424 	pm8xxx_mpp_update(pctrl, pin);  in pm8xxx_pin_config_set()
446 	struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip);  in pm8xxx_mpp_direction_input()  local
447 	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;  in pm8xxx_mpp_direction_input()
461 	pm8xxx_mpp_update(pctrl, pin);  in pm8xxx_mpp_direction_input()
470 	struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip);  in pm8xxx_mpp_direction_output()  local
471 	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;  in pm8xxx_mpp_direction_output()
487 	pm8xxx_mpp_update(pctrl, pin);  in pm8xxx_mpp_direction_output()
494 	struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip);  in pm8xxx_mpp_get()  local
495 	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;  in pm8xxx_mpp_get()
515 	struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip);  in pm8xxx_mpp_set()  local
516 	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;  in pm8xxx_mpp_set()
520 	pm8xxx_mpp_update(pctrl, pin);  in pm8xxx_mpp_set()
545 	struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip);  in pm8xxx_mpp_dbg_show_one()  local
546 	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;  in pm8xxx_mpp_dbg_show_one()
644 static int pm8xxx_pin_populate(struct pm8xxx_mpp *pctrl,  in pm8xxx_pin_populate()  argument
653 	ret = regmap_read(pctrl->regmap, pin->reg, &val);  in pm8xxx_pin_populate()
655 		dev_err(pctrl->dev, "failed to read register\n");  in pm8xxx_pin_populate()
736 	struct pm8xxx_mpp *pctrl = container_of(domain->host_data,  in pm8xxx_mpp_domain_translate()  local
741 	    fwspec->param[0] > pctrl->chip.ngpio)  in pm8xxx_mpp_domain_translate()
824 	struct pm8xxx_mpp *pctrl;  in pm8xxx_mpp_probe()  local
828 	pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL);  in pm8xxx_mpp_probe()
829 	if (!pctrl)  in pm8xxx_mpp_probe()
832 	pctrl->dev = &pdev->dev;  in pm8xxx_mpp_probe()
833 	pctrl->npins = (uintptr_t) device_get_match_data(&pdev->dev);  in pm8xxx_mpp_probe()
835 	pctrl->regmap = dev_get_regmap(pdev->dev.parent, NULL);  in pm8xxx_mpp_probe()
836 	if (!pctrl->regmap) {  in pm8xxx_mpp_probe()
841 	pctrl->desc = pm8xxx_pinctrl_desc;  in pm8xxx_mpp_probe()
842 	pctrl->desc.npins = pctrl->npins;  in pm8xxx_mpp_probe()
845 			    pctrl->desc.npins,  in pm8xxx_mpp_probe()
852 				pctrl->desc.npins,  in pm8xxx_mpp_probe()
858 	for (i = 0; i < pctrl->desc.npins; i++) {  in pm8xxx_mpp_probe()
861 		ret = pm8xxx_pin_populate(pctrl, &pin_data[i]);  in pm8xxx_mpp_probe()
869 	pctrl->desc.pins = pins;  in pm8xxx_mpp_probe()
871 	pctrl->desc.num_custom_params = ARRAY_SIZE(pm8xxx_mpp_bindings);  in pm8xxx_mpp_probe()
872 	pctrl->desc.custom_params = pm8xxx_mpp_bindings;  in pm8xxx_mpp_probe()
874 	pctrl->desc.custom_conf_items = pm8xxx_conf_items;  in pm8xxx_mpp_probe()
877 	pctrl->pctrl = devm_pinctrl_register(&pdev->dev, &pctrl->desc, pctrl);  in pm8xxx_mpp_probe()
878 	if (IS_ERR(pctrl->pctrl)) {  in pm8xxx_mpp_probe()
880 		return PTR_ERR(pctrl->pctrl);  in pm8xxx_mpp_probe()
883 	pctrl->chip = pm8xxx_mpp_template;  in pm8xxx_mpp_probe()
884 	pctrl->chip.base = -1;  in pm8xxx_mpp_probe()
885 	pctrl->chip.parent = &pdev->dev;  in pm8xxx_mpp_probe()
886 	pctrl->chip.of_gpio_n_cells = 2;  in pm8xxx_mpp_probe()
887 	pctrl->chip.label = dev_name(pctrl->dev);  in pm8xxx_mpp_probe()
888 	pctrl->chip.ngpio = pctrl->npins;  in pm8xxx_mpp_probe()
890 	parent_node = of_irq_find_parent(pctrl->dev->of_node);  in pm8xxx_mpp_probe()
899 	girq = &pctrl->chip.irq;  in pm8xxx_mpp_probe()
903 	girq->fwnode = dev_fwnode(pctrl->dev);  in pm8xxx_mpp_probe()
913 	ret = gpiochip_add_data(&pctrl->chip, pctrl);  in pm8xxx_mpp_probe()
919 	ret = gpiochip_add_pin_range(&pctrl->chip,  in pm8xxx_mpp_probe()
920 				     dev_name(pctrl->dev),  in pm8xxx_mpp_probe()
921 				     0, 0, pctrl->chip.ngpio);  in pm8xxx_mpp_probe()
923 		dev_err(pctrl->dev, "failed to add pin range\n");  in pm8xxx_mpp_probe()
927 	platform_set_drvdata(pdev, pctrl);  in pm8xxx_mpp_probe()
934 	gpiochip_remove(&pctrl->chip);  in pm8xxx_mpp_probe()
941 	struct pm8xxx_mpp *pctrl = platform_get_drvdata(pdev);  in pm8xxx_mpp_remove()  local
943 	gpiochip_remove(&pctrl->chip);  in pm8xxx_mpp_remove()