Lines Matching +full:output +full:- +full:ngpios

1 /* SPDX-License-Identifier: GPL-2.0-only */
38  * struct msm_pingroup - Qualcomm pingroup definition
46  * @io_reg:               Offset of the register holding input/output bits for this group.
55  * @oe_bit:               Offset in @ctl_reg for controlling output enable.
57  * @out_bit:              Offset in @io_reg for the output bit value.
118  * struct msm_gpio_wakeirq_map - Map of GPIOs and their wakeup pins
120  * @wakeirq:       The interrupt at the always-on interrupt controller
128  * struct msm_pinctrl_soc_data - Qualcomm pin controller driver configuration
143  * @egpio_func: If non-zero then this SoC supports eGPIO. Even though in
144  *              hardware this is a mux 1-level above the TLMM, we'll treat
158 	unsigned ngpios;  member