Lines Matching +full:gpio +full:- +full:ctrl
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
9 #include <linux/gpio/driver.h>
15 #include <linux/pinctrl/pinconf-generic.h>
19 #include "../pinctrl-utils.h"
21 #include "pinctrl-lpass-lpi.h"
29 struct pinctrl_dev *ctrl; member
44 return ioread32(state->tlmm_base + LPI_TLMM_REG_OFFSET * pin + addr); in lpi_gpio_read()
50 iowrite32(val, state->tlmm_base + LPI_TLMM_REG_OFFSET * pin + addr); in lpi_gpio_write()
67 return pctrl->data->nfunctions; in lpi_gpio_get_functions_count()
75 return pctrl->data->functions[function].name; in lpi_gpio_get_function_name()
85 *groups = pctrl->data->functions[function].groups; in lpi_gpio_get_function_groups()
86 *num_qgroups = pctrl->data->functions[function].ngroups; in lpi_gpio_get_function_groups()
95 const struct lpi_pingroup *g = &pctrl->data->groups[group]; in lpi_gpio_set_mux()
97 int i, pin = g->pin; in lpi_gpio_set_mux()
99 for (i = 0; i < g->nfuncs; i++) { in lpi_gpio_set_mux()
100 if (g->funcs[i] == function) in lpi_gpio_set_mux()
104 if (WARN_ON(i == g->nfuncs)) in lpi_gpio_set_mux()
105 return -EINVAL; in lpi_gpio_set_mux()
107 mutex_lock(&pctrl->lock); in lpi_gpio_set_mux()
111 * If this is the first time muxing to GPIO and the direction is in lpi_gpio_set_mux()
117 !test_and_set_bit(group, pctrl->ever_gpio)) { in lpi_gpio_set_mux()
133 mutex_unlock(&pctrl->lock); in lpi_gpio_set_mux()
149 struct lpi_pinctrl *state = dev_get_drvdata(pctldev->dev); in lpi_config_get()
182 return -EINVAL; in lpi_config_get()
198 dev_err(pctrl->dev, "invalid slew rate %u for pin: %d\n", in lpi_config_set_slew_rate()
200 return -EINVAL; in lpi_config_set_slew_rate()
203 slew_offset = g->slew_offset; in lpi_config_set_slew_rate()
207 if (pctrl->data->flags & LPI_FLAG_SLEW_RATE_SAME_REG) in lpi_config_set_slew_rate()
208 reg = pctrl->tlmm_base + LPI_TLMM_REG_OFFSET * group + LPI_GPIO_CFG_REG; in lpi_config_set_slew_rate()
210 reg = pctrl->slew_base + LPI_SLEW_RATE_CTL_REG; in lpi_config_set_slew_rate()
212 mutex_lock(&pctrl->lock); in lpi_config_set_slew_rate()
219 mutex_unlock(&pctrl->lock); in lpi_config_set_slew_rate()
227 struct lpi_pinctrl *pctrl = dev_get_drvdata(pctldev->dev); in lpi_config_set()
234 g = &pctrl->data->groups[group]; in lpi_config_set()
268 return -EINVAL; in lpi_config_set()
274 * set the pin value before setting output-enable (OE). in lpi_config_set()
281 mutex_lock(&pctrl->lock); in lpi_config_set()
290 mutex_unlock(&pctrl->lock); in lpi_config_set()
308 return lpi_config_set(state->ctrl, pin, &config, 1); in lpi_gpio_direction_input()
319 return lpi_config_set(state->ctrl, pin, &config, 1); in lpi_gpio_direction_output()
337 lpi_config_set(state->ctrl, pin, &config, 1); in lpi_gpio_set()
351 unsigned int gpio) in lpi_gpio_dbg_show_one() argument
368 pctldev = pctldev ? : state->ctrl; in lpi_gpio_dbg_show_one()
369 pindesc = pctldev->desc->pins[offset]; in lpi_gpio_dbg_show_one()
377 seq_printf(s, " %-8s: %-3s %d", pindesc.name, is_out ? "out" : "in", func); in lpi_gpio_dbg_show_one()
384 unsigned int gpio = chip->base; in lpi_gpio_dbg_show() local
387 for (i = 0; i < chip->ngpio; i++, gpio++) { in lpi_gpio_dbg_show()
388 lpi_gpio_dbg_show_one(s, NULL, chip, i, gpio); in lpi_gpio_dbg_show()
411 for (i = 0; i < pctrl->data->npins; i++) { in lpi_build_pin_desc_groups()
412 const struct pinctrl_pin_desc *pin_info = pctrl->desc.pins + i; in lpi_build_pin_desc_groups()
414 ret = pinctrl_generic_add_group(pctrl->ctrl, pin_info->name, in lpi_build_pin_desc_groups()
415 (int *)&pin_info->number, 1, NULL); in lpi_build_pin_desc_groups()
423 for (; i > 0; i--) in lpi_build_pin_desc_groups()
424 pinctrl_generic_remove_group(pctrl->ctrl, i - 1); in lpi_build_pin_desc_groups()
432 struct device *dev = &pdev->dev; in lpi_pinctrl_probe()
438 return -ENOMEM; in lpi_pinctrl_probe()
444 return -EINVAL; in lpi_pinctrl_probe()
446 if (WARN_ON(data->npins > MAX_NR_GPIO)) in lpi_pinctrl_probe()
447 return -EINVAL; in lpi_pinctrl_probe()
449 pctrl->data = data; in lpi_pinctrl_probe()
450 pctrl->dev = &pdev->dev; in lpi_pinctrl_probe()
452 pctrl->clks[0].id = "core"; in lpi_pinctrl_probe()
453 pctrl->clks[1].id = "audio"; in lpi_pinctrl_probe()
455 pctrl->tlmm_base = devm_platform_ioremap_resource(pdev, 0); in lpi_pinctrl_probe()
456 if (IS_ERR(pctrl->tlmm_base)) in lpi_pinctrl_probe()
457 return dev_err_probe(dev, PTR_ERR(pctrl->tlmm_base), in lpi_pinctrl_probe()
460 if (!(data->flags & LPI_FLAG_SLEW_RATE_SAME_REG)) { in lpi_pinctrl_probe()
461 pctrl->slew_base = devm_platform_ioremap_resource(pdev, 1); in lpi_pinctrl_probe()
462 if (IS_ERR(pctrl->slew_base)) in lpi_pinctrl_probe()
463 return dev_err_probe(dev, PTR_ERR(pctrl->slew_base), in lpi_pinctrl_probe()
467 ret = devm_clk_bulk_get_optional(dev, MAX_LPI_NUM_CLKS, pctrl->clks); in lpi_pinctrl_probe()
471 ret = clk_bulk_prepare_enable(MAX_LPI_NUM_CLKS, pctrl->clks); in lpi_pinctrl_probe()
475 pctrl->desc.pctlops = &lpi_gpio_pinctrl_ops; in lpi_pinctrl_probe()
476 pctrl->desc.pmxops = &lpi_gpio_pinmux_ops; in lpi_pinctrl_probe()
477 pctrl->desc.confops = &lpi_gpio_pinconf_ops; in lpi_pinctrl_probe()
478 pctrl->desc.owner = THIS_MODULE; in lpi_pinctrl_probe()
479 pctrl->desc.name = dev_name(dev); in lpi_pinctrl_probe()
480 pctrl->desc.pins = data->pins; in lpi_pinctrl_probe()
481 pctrl->desc.npins = data->npins; in lpi_pinctrl_probe()
482 pctrl->chip = lpi_gpio_template; in lpi_pinctrl_probe()
483 pctrl->chip.parent = dev; in lpi_pinctrl_probe()
484 pctrl->chip.base = -1; in lpi_pinctrl_probe()
485 pctrl->chip.ngpio = data->npins; in lpi_pinctrl_probe()
486 pctrl->chip.label = dev_name(dev); in lpi_pinctrl_probe()
487 pctrl->chip.can_sleep = false; in lpi_pinctrl_probe()
489 mutex_init(&pctrl->lock); in lpi_pinctrl_probe()
491 pctrl->ctrl = devm_pinctrl_register(dev, &pctrl->desc, pctrl); in lpi_pinctrl_probe()
492 if (IS_ERR(pctrl->ctrl)) { in lpi_pinctrl_probe()
493 ret = PTR_ERR(pctrl->ctrl); in lpi_pinctrl_probe()
502 ret = devm_gpiochip_add_data(dev, &pctrl->chip, pctrl); in lpi_pinctrl_probe()
504 dev_err(pctrl->dev, "can't add gpio chip\n"); in lpi_pinctrl_probe()
511 mutex_destroy(&pctrl->lock); in lpi_pinctrl_probe()
512 clk_bulk_disable_unprepare(MAX_LPI_NUM_CLKS, pctrl->clks); in lpi_pinctrl_probe()
523 mutex_destroy(&pctrl->lock); in lpi_pinctrl_remove()
524 clk_bulk_disable_unprepare(MAX_LPI_NUM_CLKS, pctrl->clks); in lpi_pinctrl_remove()
526 for (i = 0; i < pctrl->data->npins; i++) in lpi_pinctrl_remove()
527 pinctrl_generic_remove_group(pctrl->ctrl, i); in lpi_pinctrl_remove()
531 MODULE_DESCRIPTION("QTI LPI GPIO pin control driver");