Lines Matching +full:ebu +full:- +full:xway

1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/drivers/pinctrl/pinmux-xway.c
4 * based on linux/drivers/pinctrl/pinmux-pxa910.c
21 #include "pinctrl-lantiq.h"
110 /* --------- ase related code --------- */
116 MFP_XWAY(GPIO1, GPIO, STP, DFE, EBU),
118 MFP_XWAY(GPIO3, GPIO, STP, EPHY, EBU),
126 MFP_XWAY(GPIO11, GPIO, EBU, CGU, JTAG),
127 MFP_XWAY(GPIO12, GPIO, EBU, MII, SDIO),
128 MFP_XWAY(GPIO13, GPIO, EBU, MII, CGU),
129 MFP_XWAY(GPIO14, GPIO, EBU, SPI, CGU),
130 MFP_XWAY(GPIO15, GPIO, EBU, SPI, SDIO),
134 MFP_XWAY(GPIO19, GPIO, EBU, MII, SDIO),
135 MFP_XWAY(GPIO20, GPIO, EBU, MII, SDIO),
136 MFP_XWAY(GPIO21, GPIO, EBU, MII, EBU2),
137 MFP_XWAY(GPIO22, GPIO, EBU, MII, CGU),
138 MFP_XWAY(GPIO23, GPIO, EBU, MII, CGU),
139 MFP_XWAY(GPIO24, GPIO, EBU, EBU2, MDIO),
140 MFP_XWAY(GPIO25, GPIO, EBU, MII, GPT),
141 MFP_XWAY(GPIO26, GPIO, EBU, MII, SDIO),
142 MFP_XWAY(GPIO27, GPIO, EBU, NONE, MDIO),
143 MFP_XWAY(GPIO28, GPIO, MII, EBU, SDIO),
144 MFP_XWAY(GPIO29, GPIO, EBU, MII, EXIN),
238 /* --------- danube related code --------- */
256 MFP_XWAY(GPIO13, GPIO, EBU, SPI, MII),
264 MFP_XWAY(GPIO21, GPIO, PCI, EBU, GPT),
266 MFP_XWAY(GPIO23, GPIO, EBU, PCI, STP),
267 MFP_XWAY(GPIO24, GPIO, EBU, TDM, PCI),
269 MFP_XWAY(GPIO26, GPIO, EBU, TDM, SDIO),
274 MFP_XWAY(GPIO31, GPIO, EBU, PCI, MII),
335 GRP_MUX("ebu a23", EBU, danube_pins_ebu_a23),
336 GRP_MUX("ebu a24", EBU, danube_pins_ebu_a24),
337 GRP_MUX("ebu a25", EBU, danube_pins_ebu_a25),
338 GRP_MUX("ebu clk", EBU, danube_pins_ebu_clk),
339 GRP_MUX("ebu cs1", EBU, danube_pins_ebu_cs1),
340 GRP_MUX("ebu wait", EBU, danube_pins_ebu_wait),
341 GRP_MUX("nand ale", EBU, danube_pins_nand_ale),
342 GRP_MUX("nand cs1", EBU, danube_pins_nand_cs1),
343 GRP_MUX("nand cle", EBU, danube_pins_nand_cle),
386 static const char * const danube_ebu_grps[] = {"ebu a23", "ebu a24",
387 "ebu a25", "ebu cs1",
388 "ebu wait", "ebu clk",
409 {"ebu", ARRAY_AND_SIZE(danube_ebu_grps)},
413 /* --------- xrx100 related code --------- */
431 MFP_XWAY(GPIO13, GPIO, EBU, SPI, NONE),
438 MFP_XWAY(GPIO20, GPIO, NONE, SDIO, EBU),
439 MFP_XWAY(GPIO21, GPIO, PCI, EBU, GPT),
440 MFP_XWAY(GPIO22, GPIO, SPI, NONE, EBU),
441 MFP_XWAY(GPIO23, GPIO, EBU, PCI, STP),
442 MFP_XWAY(GPIO24, GPIO, EBU, TDM, PCI),
444 MFP_XWAY(GPIO26, GPIO, EBU, TDM, SDIO),
449 MFP_XWAY(GPIO31, GPIO, EBU, PCI, NONE),
450 MFP_XWAY(GPIO32, GPIO, MII, NONE, EBU),
451 MFP_XWAY(GPIO33, GPIO, MII, NONE, EBU),
466 MFP_XWAY(GPIO48, GPIO, EBU, NONE, NONE),
467 MFP_XWAY(GPIO49, GPIO, EBU, NONE, NONE),
542 GRP_MUX("ebu a23", EBU, xrx100_pins_ebu_a23),
543 GRP_MUX("ebu a24", EBU, xrx100_pins_ebu_a24),
544 GRP_MUX("ebu a25", EBU, xrx100_pins_ebu_a25),
545 GRP_MUX("ebu clk", EBU, xrx100_pins_ebu_clk),
546 GRP_MUX("ebu cs1", EBU, xrx100_pins_ebu_cs1),
547 GRP_MUX("ebu wait", EBU, xrx100_pins_ebu_wait),
548 GRP_MUX("nand ale", EBU, xrx100_pins_nand_ale),
549 GRP_MUX("nand cs1", EBU, xrx100_pins_nand_cs1),
550 GRP_MUX("nand cle", EBU, xrx100_pins_nand_cle),
551 GRP_MUX("nand rdy", EBU, xrx100_pins_nand_rdy),
552 GRP_MUX("nand rd", EBU, xrx100_pins_nand_rd),
597 static const char * const xrx100_ebu_grps[] = {"ebu a23", "ebu a24",
598 "ebu a25", "ebu cs1",
599 "ebu wait", "ebu clk",
621 {"ebu", ARRAY_AND_SIZE(xrx100_ebu_grps)},
626 /* --------- xrx200 related code --------- */
644 MFP_XWAY(GPIO13, GPIO, EBU, SPI, NONE),
651 MFP_XWAY(GPIO20, GPIO, NONE, SDIO, EBU),
652 MFP_XWAY(GPIO21, GPIO, PCI, EBU, GPT),
653 MFP_XWAY(GPIO22, GPIO, SPI, CGU, EBU),
654 MFP_XWAY(GPIO23, GPIO, EBU, PCI, STP),
655 MFP_XWAY(GPIO24, GPIO, EBU, TDM, PCI),
657 MFP_XWAY(GPIO26, GPIO, EBU, TDM, SDIO),
662 MFP_XWAY(GPIO31, GPIO, EBU, PCI, NONE),
663 MFP_XWAY(GPIO32, GPIO, MII, NONE, EBU),
664 MFP_XWAY(GPIO33, GPIO, MII, NONE, EBU),
679 MFP_XWAY(GPIO48, GPIO, EBU, NONE, NONE),
680 MFP_XWAY(GPIO49, GPIO, EBU, NONE, NONE),
770 GRP_MUX("ebu a23", EBU, xrx200_pins_ebu_a23),
771 GRP_MUX("ebu a24", EBU, xrx200_pins_ebu_a24),
772 GRP_MUX("ebu a25", EBU, xrx200_pins_ebu_a25),
773 GRP_MUX("ebu clk", EBU, xrx200_pins_ebu_clk),
774 GRP_MUX("ebu cs1", EBU, xrx200_pins_ebu_cs1),
775 GRP_MUX("ebu wait", EBU, xrx200_pins_ebu_wait),
776 GRP_MUX("nand ale", EBU, xrx200_pins_nand_ale),
777 GRP_MUX("nand cs1", EBU, xrx200_pins_nand_cs1),
778 GRP_MUX("nand cle", EBU, xrx200_pins_nand_cle),
779 GRP_MUX("nand rdy", EBU, xrx200_pins_nand_rdy),
780 GRP_MUX("nand rd", EBU, xrx200_pins_nand_rd),
843 static const char * const xrx200_ebu_grps[] = {"ebu a23", "ebu a24",
844 "ebu a25", "ebu cs1",
845 "ebu wait", "ebu clk",
876 {"ebu", ARRAY_AND_SIZE(xrx200_ebu_grps)},
882 /* --------- xrx300 related code --------- */
900 MFP_XWAY(GPIO13, GPIO, EBU, NONE, NONE),
910 MFP_XWAY(GPIO23, GPIO, EBU, NONE, NONE),
911 MFP_XWAY(GPIO24, GPIO, EBU, NONE, NONE),
935 MFP_XWAY(GPIO48, GPIO, EBU, NONE, NONE),
936 MFP_XWAY(GPIO49, GPIO, EBU, NONE, NONE),
937 MFP_XWAY(GPIO50, GPIO, EBU, NONE, NONE),
938 MFP_XWAY(GPIO51, GPIO, EBU, NONE, NONE),
939 MFP_XWAY(GPIO52, GPIO, EBU, NONE, NONE),
940 MFP_XWAY(GPIO53, GPIO, EBU, NONE, NONE),
941 MFP_XWAY(GPIO54, GPIO, EBU, NONE, NONE),
942 MFP_XWAY(GPIO55, GPIO, EBU, NONE, NONE),
943 MFP_XWAY(GPIO56, GPIO, EBU, NONE, NONE),
944 MFP_XWAY(GPIO57, GPIO, EBU, NONE, NONE),
945 MFP_XWAY(GPIO58, GPIO, EBU, TDM, NONE),
946 MFP_XWAY(GPIO59, GPIO, EBU, NONE, NONE),
947 MFP_XWAY(GPIO60, GPIO, EBU, NONE, NONE),
948 MFP_XWAY(GPIO61, GPIO, EBU, NONE, NONE),
1019 GRP_MUX("nand ale", EBU, xrx300_pins_nand_ale),
1020 GRP_MUX("nand cs1", EBU, xrx300_pins_nand_cs1),
1021 GRP_MUX("nand cle", EBU, xrx300_pins_nand_cle),
1022 GRP_MUX("nand rdy", EBU, xrx300_pins_nand_rdy),
1023 GRP_MUX("nand rd", EBU, xrx300_pins_nand_rd),
1024 GRP_MUX("nand d1", EBU, xrx300_pins_nand_d1),
1025 GRP_MUX("nand d0", EBU, xrx300_pins_nand_d0),
1026 GRP_MUX("nand d2", EBU, xrx300_pins_nand_d2),
1027 GRP_MUX("nand d7", EBU, xrx300_pins_nand_d7),
1028 GRP_MUX("nand d6", EBU, xrx300_pins_nand_d6),
1029 GRP_MUX("nand d5", EBU, xrx300_pins_nand_d5),
1030 GRP_MUX("nand d4", EBU, xrx300_pins_nand_d4),
1031 GRP_MUX("nand d3", EBU, xrx300_pins_nand_d3),
1032 GRP_MUX("nand cs0", EBU, xrx300_pins_nand_cs0),
1033 GRP_MUX("nand wr", EBU, xrx300_pins_nand_wr),
1034 GRP_MUX("nand wp", EBU, xrx300_pins_nand_wp),
1035 GRP_MUX("nand se", EBU, xrx300_pins_nand_se),
1089 {"ebu", ARRAY_AND_SIZE(xrx300_ebu_grps)},
1095 /* --------- pinconf related code --------- */
1112 !gpio_getbit(info->membase[0], reg, PORT_PIN(pin))); in xway_pinconf_get()
1120 if (!gpio_getbit(info->membase[0], reg, PORT_PIN(pin))) { in xway_pinconf_get()
1129 if (!gpio_getbit(info->membase[0], reg, PORT_PIN(pin))) in xway_pinconf_get()
1138 gpio_getbit(info->membase[0], reg, PORT_PIN(pin))); in xway_pinconf_get()
1141 dev_err(pctldev->dev, "Invalid config param %04x\n", param); in xway_pinconf_get()
1142 return -ENOTSUPP; in xway_pinconf_get()
1170 gpio_setbit(info->membase[0], in xway_pinconf_set()
1174 gpio_clearbit(info->membase[0], in xway_pinconf_set()
1185 gpio_clearbit(info->membase[0], in xway_pinconf_set()
1190 gpio_setbit(info->membase[0], reg, PORT_PIN(pin)); in xway_pinconf_set()
1197 gpio_clearbit(info->membase[0], in xway_pinconf_set()
1201 gpio_setbit(info->membase[0], in xway_pinconf_set()
1205 dev_err(pctldev->dev, in xway_pinconf_set()
1212 gpio_clearbit(info->membase[0], in xway_pinconf_set()
1216 gpio_setbit(info->membase[0], in xway_pinconf_set()
1222 dev_err(pctldev->dev, in xway_pinconf_set()
1224 return -ENOTSUPP; in xway_pinconf_set()
1239 for (i = 0; i < info->grps[selector].npins && !ret; i++) in xway_pinconf_group_set()
1241 info->grps[selector].pins[i], in xway_pinconf_group_set()
1270 gpio_setbit(info->membase[0], GPIO_ALT0(pin), PORT_PIN(pin)); in xway_mux_apply()
1272 gpio_clearbit(info->membase[0], GPIO_ALT0(pin), PORT_PIN(pin)); in xway_mux_apply()
1275 gpio_setbit(info->membase[0], alt1_reg, PORT_PIN(pin)); in xway_mux_apply()
1277 gpio_clearbit(info->membase[0], alt1_reg, PORT_PIN(pin)); in xway_mux_apply()
1284 {"lantiq,open-drain", LTQ_PINCONF_PARAM_OPEN_DRAIN},
1295 /* --------- gpio_chip related code --------- */
1298 struct ltq_pinmux_info *info = dev_get_drvdata(chip->parent); in xway_gpio_set()
1301 gpio_setbit(info->membase[0], GPIO_OUT(pin), PORT_PIN(pin)); in xway_gpio_set()
1303 gpio_clearbit(info->membase[0], GPIO_OUT(pin), PORT_PIN(pin)); in xway_gpio_set()
1308 struct ltq_pinmux_info *info = dev_get_drvdata(chip->parent); in xway_gpio_get()
1310 return !!gpio_getbit(info->membase[0], GPIO_IN(pin), PORT_PIN(pin)); in xway_gpio_get()
1315 struct ltq_pinmux_info *info = dev_get_drvdata(chip->parent); in xway_gpio_dir_in()
1317 gpio_clearbit(info->membase[0], GPIO_DIR(pin), PORT_PIN(pin)); in xway_gpio_dir_in()
1324 struct ltq_pinmux_info *info = dev_get_drvdata(chip->parent); in xway_gpio_dir_out()
1327 gpio_setbit(info->membase[0], GPIO3_OD, PORT_PIN(pin)); in xway_gpio_dir_out()
1329 gpio_setbit(info->membase[0], GPIO_OD(pin), PORT_PIN(pin)); in xway_gpio_dir_out()
1330 gpio_setbit(info->membase[0], GPIO_DIR(pin), PORT_PIN(pin)); in xway_gpio_dir_out()
1342 struct ltq_pinmux_info *info = dev_get_drvdata(chip->parent); in xway_gpio_to_irq()
1345 for (i = 0; i < info->num_exin; i++) in xway_gpio_to_irq()
1346 if (info->exin[i] == offset) in xway_gpio_to_irq()
1349 return -1; in xway_gpio_to_irq()
1353 .label = "gpio-xway",
1361 .base = -1,
1365 /* --------- register the pinctrl layer --------- */
1377 /* XWAY AMAZON Family */
1389 /* XWAY DANUBE Family */
1401 /* XWAY xRX100 Family */
1413 /* XWAY xRX200 Family */
1425 /* XWAY xRX300 Family */
1438 .name = "XWAY GPIO",
1443 { .compatible = "lantiq,ase-pinctrl", .data = &ase_pinctrl},
1444 { .compatible = "lantiq,danube-pinctrl", .data = &danube_pinctrl},
1445 { .compatible = "lantiq,xrx100-pinctrl", .data = &xrx100_pinctrl},
1446 { .compatible = "lantiq,xrx200-pinctrl", .data = &xrx200_pinctrl},
1447 { .compatible = "lantiq,xrx300-pinctrl", .data = &xrx300_pinctrl},
1462 xway_soc = device_get_match_data(&pdev->dev); in pinmux_xway_probe()
1467 xway_chip.ngpio = xway_soc->pin_count; in pinmux_xway_probe()
1470 xway_info.pads = devm_kcalloc(&pdev->dev, in pinmux_xway_probe()
1474 return -ENOMEM; in pinmux_xway_probe()
1477 char *name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "io%d", i); in pinmux_xway_probe()
1480 return -ENOMEM; in pinmux_xway_probe()
1488 xway_pctrl_desc.name = dev_name(&pdev->dev); in pinmux_xway_probe()
1493 xway_info.mfp = xway_soc->mfp; in pinmux_xway_probe()
1494 xway_info.grps = xway_soc->grps; in pinmux_xway_probe()
1495 xway_info.num_grps = xway_soc->num_grps; in pinmux_xway_probe()
1496 xway_info.funcs = xway_soc->funcs; in pinmux_xway_probe()
1497 xway_info.num_funcs = xway_soc->num_funcs; in pinmux_xway_probe()
1498 xway_info.exin = xway_soc->exin; in pinmux_xway_probe()
1499 xway_info.num_exin = xway_soc->num_exin; in pinmux_xway_probe()
1504 dev_err(&pdev->dev, "Failed to register pinctrl driver\n"); in pinmux_xway_probe()
1509 xway_chip.parent = &pdev->dev; in pinmux_xway_probe()
1511 ret = devm_gpiochip_add_data(&pdev->dev, &xway_chip, NULL); in pinmux_xway_probe()
1513 dev_err(&pdev->dev, "Failed to register gpio chip\n"); in pinmux_xway_probe()
1518 * For DeviceTree-supported systems, the gpio core checks the in pinmux_xway_probe()
1519 * pinctrl's device node for the "gpio-ranges" property. in pinmux_xway_probe()
1524 * files which don't set the "gpio-ranges" property or systems that in pinmux_xway_probe()
1527 if (!of_property_read_bool(pdev->dev.of_node, "gpio-ranges")) { in pinmux_xway_probe()
1534 dev_info(&pdev->dev, "Init done\n"); in pinmux_xway_probe()
1541 .name = "pinctrl-xway",