Lines Matching +full:bank +full:- +full:number

1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2020-2021 Rockchip Electronics Co. Ltd.
8 * With some ideas taken from pinctrl-samsung:
14 * and pinctrl-at91:
15 * Copyright (C) 2011-2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
243 * @offset: if initialized to -1 it will be autocalculated, by specifying
276 * @offset: if initialized to -1 it will be autocalculated, by specifying
289 * @dev: the pinctrl device bind to the bank
290 * @reg_base: register base of the gpio bank
292 * @clk: clock of the gpio bank
294 * @irq: interrupt of the gpio bank
296 * @pin_base: first pin number
297 * @nr_pins: number of pins in this bank
298 * @name: name of the bank
299 * @bank_num: number of the bank, to account for holes
300 * @iomux: array describing the 4 iomux sources of the bank
301 * @drv: array describing the 4 drive strength sources of the bank
302 * @pull_type: array describing the 4 pull type sources of the bank
304 * @of_node: dt node of this bank
306 * @domain: irqdomain of the gpio bank
309 * @slock: spinlock for the gpio bank
312 * @route_mask: bits describing the routing pins of per bank
313 * @deferred_output: gpio output settings to be done after gpio bank probed
349 * @num: bank number.
350 * @pin: pin number.
371 * @bank_num: bank number.
402 int (*pull_calc_reg)(struct rockchip_pin_bank *bank,
405 int (*drv_calc_reg)(struct rockchip_pin_bank *bank,
408 int (*schmitt_calc_reg)(struct rockchip_pin_bank *bank,
432 * @npins: number of pins included in this group.
446 * @ngroups: number of groups included in @groups.