95 	struct pistachio_pinctrl *pctl;  member
832 static inline u32 pctl_readl(struct pistachio_pinctrl *pctl, u32 reg)  in pctl_readl()  argument
834 	return readl(pctl->base + reg);  in pctl_readl()
837 static inline void pctl_writel(struct pistachio_pinctrl *pctl, u32 val, u32 reg)  in pctl_writel()  argument
839 	writel(val, pctl->base + reg);  in pctl_writel()
882 	struct pistachio_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);  in pistachio_pinctrl_get_groups_count()  local
884 	return pctl->ngroups;  in pistachio_pinctrl_get_groups_count()
890 	struct pistachio_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);  in pistachio_pinctrl_get_group_name()  local
892 	return pctl->groups[group].name;  in pistachio_pinctrl_get_group_name()
900 	struct pistachio_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);  in pistachio_pinctrl_get_group_pins()  local
902 	*pins = &pctl->groups[group].pin;  in pistachio_pinctrl_get_group_pins()
918 	struct pistachio_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);  in pistachio_pinmux_get_functions_count()  local
920 	return pctl->nfunctions;  in pistachio_pinmux_get_functions_count()
926 	struct pistachio_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);  in pistachio_pinmux_get_function_name()  local
928 	return pctl->functions[func].name;  in pistachio_pinmux_get_function_name()
936 	struct pistachio_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);  in pistachio_pinmux_get_function_groups()  local
938 	*groups = pctl->functions[func].groups;  in pistachio_pinmux_get_function_groups()
939 	*num_groups = pctl->functions[func].ngroups;  in pistachio_pinmux_get_function_groups()
947 	struct pistachio_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);  in pistachio_pinmux_enable()  local
948 	const struct pistachio_pin_group *pg = &pctl->groups[group];  in pistachio_pinmux_enable()
949 	const struct pistachio_function *pf = &pctl->functions[func];  in pistachio_pinmux_enable()
960 			dev_err(pctl->dev, "Cannot mux pin %u to function %u\n",  in pistachio_pinmux_enable()
965 		val = pctl_readl(pctl, pg->mux_reg);  in pistachio_pinmux_enable()
968 		pctl_writel(pctl, val, pg->mux_reg);  in pistachio_pinmux_enable()
978 			val = pctl_readl(pctl, pf->scenario_reg);  in pistachio_pinmux_enable()
981 			pctl_writel(pctl, val, pf->scenario_reg);  in pistachio_pinmux_enable()
985 	range = pinctrl_find_gpio_range_from_pin(pctl->pctldev, pg->pin);  in pistachio_pinmux_enable()
1002 	struct pistachio_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);  in pistachio_pinconf_get()  local
1008 		val = pctl_readl(pctl, PADS_SCHMITT_EN_REG(pin));  in pistachio_pinconf_get()
1012 		val = pctl_readl(pctl, PADS_PU_PD_REG(pin)) >>  in pistachio_pinconf_get()
1017 		val = pctl_readl(pctl, PADS_PU_PD_REG(pin)) >>  in pistachio_pinconf_get()
1022 		val = pctl_readl(pctl, PADS_PU_PD_REG(pin)) >>  in pistachio_pinconf_get()
1027 		val = pctl_readl(pctl, PADS_PU_PD_REG(pin)) >>  in pistachio_pinconf_get()
1032 		val = pctl_readl(pctl, PADS_SLEW_RATE_REG(pin));  in pistachio_pinconf_get()
1036 		val = pctl_readl(pctl, PADS_DRIVE_STRENGTH_REG(pin)) >>  in pistachio_pinconf_get()
1055 		dev_dbg(pctl->dev, "Property %u not supported\n", param);  in pistachio_pinconf_get()
1067 	struct pistachio_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);  in pistachio_pinconf_set()  local
1078 			val = pctl_readl(pctl, PADS_SCHMITT_EN_REG(pin));  in pistachio_pinconf_set()
1083 			pctl_writel(pctl, val, PADS_SCHMITT_EN_REG(pin));  in pistachio_pinconf_set()
1086 			val = pctl_readl(pctl, PADS_PU_PD_REG(pin));  in pistachio_pinconf_set()
1089 			pctl_writel(pctl, val, PADS_PU_PD_REG(pin));  in pistachio_pinconf_set()
1092 			val = pctl_readl(pctl, PADS_PU_PD_REG(pin));  in pistachio_pinconf_set()
1095 			pctl_writel(pctl, val, PADS_PU_PD_REG(pin));  in pistachio_pinconf_set()
1098 			val = pctl_readl(pctl, PADS_PU_PD_REG(pin));  in pistachio_pinconf_set()
1101 			pctl_writel(pctl, val, PADS_PU_PD_REG(pin));  in pistachio_pinconf_set()
1104 			val = pctl_readl(pctl, PADS_PU_PD_REG(pin));  in pistachio_pinconf_set()
1107 			pctl_writel(pctl, val, PADS_PU_PD_REG(pin));  in pistachio_pinconf_set()
1110 			val = pctl_readl(pctl, PADS_SLEW_RATE_REG(pin));  in pistachio_pinconf_set()
1115 			pctl_writel(pctl, val, PADS_SLEW_RATE_REG(pin));  in pistachio_pinconf_set()
1118 			val = pctl_readl(pctl, PADS_DRIVE_STRENGTH_REG(pin));  in pistachio_pinconf_set()
1135 				dev_err(pctl->dev,  in pistachio_pinconf_set()
1141 			pctl_writel(pctl, val, PADS_DRIVE_STRENGTH_REG(pin));  in pistachio_pinconf_set()
1144 			dev_err(pctl->dev, "Property %u not supported\n",  in pistachio_pinconf_set()
1363 static int pistachio_gpio_register(struct pistachio_pinctrl *pctl)  in pistachio_gpio_register()  argument
1369 	for (i = 0; i < pctl->nbanks; i++) {  in pistachio_gpio_register()
1375 		child = device_get_named_child_node(pctl->dev, child_name);  in pistachio_gpio_register()
1377 			dev_err(pctl->dev, "No node for bank %u\n", i);  in pistachio_gpio_register()
1384 			dev_err(pctl->dev,  in pistachio_gpio_register()
1393 			dev_err(pctl->dev, "Failed to retrieve IRQ for bank %u\n", i);  in pistachio_gpio_register()
1398 			dev_err(pctl->dev, "No IRQ for bank %u\n", i);  in pistachio_gpio_register()
1404 		bank = &pctl->gpio_banks[i];  in pistachio_gpio_register()
1405 		bank->pctl = pctl;  in pistachio_gpio_register()
1406 		bank->base = pctl->base + GPIO_BANK_BASE(i);  in pistachio_gpio_register()
1408 		bank->gpio_chip.parent = pctl->dev;  in pistachio_gpio_register()
1415 		girq->parents = devm_kcalloc(pctl->dev, 1,  in pistachio_gpio_register()
1428 			dev_err(pctl->dev, "Failed to add GPIO chip %u: %d\n",  in pistachio_gpio_register()
1434 					     dev_name(pctl->dev), 0,  in pistachio_gpio_register()
1437 			dev_err(pctl->dev, "Failed to add GPIO range %u: %d\n",  in pistachio_gpio_register()
1447 		bank = &pctl->gpio_banks[i - 1];  in pistachio_gpio_register()
1460 	struct pistachio_pinctrl *pctl;  in pistachio_pinctrl_probe()  local
1462 	pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);  in pistachio_pinctrl_probe()
1463 	if (!pctl)  in pistachio_pinctrl_probe()
1465 	pctl->dev = &pdev->dev;  in pistachio_pinctrl_probe()
1466 	dev_set_drvdata(&pdev->dev, pctl);  in pistachio_pinctrl_probe()
1468 	pctl->base = devm_platform_ioremap_resource(pdev, 0);  in pistachio_pinctrl_probe()
1469 	if (IS_ERR(pctl->base))  in pistachio_pinctrl_probe()
1470 		return PTR_ERR(pctl->base);  in pistachio_pinctrl_probe()
1472 	pctl->pins = pistachio_pins;  in pistachio_pinctrl_probe()
1473 	pctl->npins = ARRAY_SIZE(pistachio_pins);  in pistachio_pinctrl_probe()
1474 	pctl->functions = pistachio_functions;  in pistachio_pinctrl_probe()
1475 	pctl->nfunctions = ARRAY_SIZE(pistachio_functions);  in pistachio_pinctrl_probe()
1476 	pctl->groups = pistachio_groups;  in pistachio_pinctrl_probe()
1477 	pctl->ngroups = ARRAY_SIZE(pistachio_groups);  in pistachio_pinctrl_probe()
1478 	pctl->gpio_banks = pistachio_gpio_banks;  in pistachio_pinctrl_probe()
1479 	pctl->nbanks = ARRAY_SIZE(pistachio_gpio_banks);  in pistachio_pinctrl_probe()
1481 	pistachio_pinctrl_desc.pins = pctl->pins;  in pistachio_pinctrl_probe()
1482 	pistachio_pinctrl_desc.npins = pctl->npins;  in pistachio_pinctrl_probe()
1484 	pctl->pctldev = devm_pinctrl_register(&pdev->dev, &pistachio_pinctrl_desc,  in pistachio_pinctrl_probe()
1485 					      pctl);  in pistachio_pinctrl_probe()
1486 	if (IS_ERR(pctl->pctldev)) {  in pistachio_pinctrl_probe()
1488 		return PTR_ERR(pctl->pctldev);  in pistachio_pinctrl_probe()
1491 	return pistachio_gpio_register(pctl);  in pistachio_pinctrl_probe()