Lines Matching refs:keembay_write_reg
878 static inline void keembay_write_reg(u32 val, void __iomem *base, unsigned int pin) in keembay_write_reg() function
885 keembay_write_reg(val, base, pin / KEEMBAY_GPIO_MAX_PER_REG); in keembay_write_gpio_reg()
899 keembay_write_reg(val, kpc->base1 + KEEMBAY_GPIO_MODE, pin); in keembay_gpio_invert()
907 keembay_write_reg(val, kpc->base1 + KEEMBAY_GPIO_MODE, pin); in keembay_gpio_restore_default()
953 keembay_write_reg(val, kpc->base1 + KEEMBAY_GPIO_MODE, pin); in keembay_set_mux()
971 keembay_write_reg(val, kpc->base1 + KEEMBAY_GPIO_MODE, pin); in keembay_pinconf_set_pull()
995 keembay_write_reg(val, kpc->base1 + KEEMBAY_GPIO_MODE, pin); in keembay_pinconf_set_drive()
1017 keembay_write_reg(val, kpc->base1 + KEEMBAY_GPIO_MODE, pin); in keembay_pinconf_set_slew_rate()
1039 keembay_write_reg(val, kpc->base1 + KEEMBAY_GPIO_MODE, pin); in keembay_pinconf_set_schmitt()
1220 keembay_write_reg(val, kpc->base1 + KEEMBAY_GPIO_MODE, pin); in keembay_gpio_set_direction_in()
1233 keembay_write_reg(val, kpc->base1 + KEEMBAY_GPIO_MODE, pin); in keembay_gpio_set_direction_out()
1297 keembay_write_reg(val, kpc->base1 + KEEMBAY_GPIO_INT_CFG, src); in keembay_gpio_clear_irq()
1349 keembay_write_reg(reg, kpc->base1 + KEEMBAY_GPIO_INT_CFG, src); in keembay_gpio_set_irq()