64 #define MAX_LINE		(MAX_BANK * BANK_SZ)  macro
156 	DECLARE_BITMAP(irq_mask, MAX_LINE);
157 	DECLARE_BITMAP(irq_trig_raise, MAX_LINE);
158 	DECLARE_BITMAP(irq_trig_fall, MAX_LINE);
159 	DECLARE_BITMAP(irq_trig_low, MAX_LINE);
160 	DECLARE_BITMAP(irq_trig_high, MAX_LINE);
161 	DECLARE_BITMAP(push_pull, MAX_LINE);
162 	DECLARE_BITMAP(shiftmask, MAX_LINE);
612 	DECLARE_BITMAP(tmask, MAX_LINE);  in cy8c95x0_write_regs_mask()
613 	DECLARE_BITMAP(tval, MAX_LINE);  in cy8c95x0_write_regs_mask()
620 	bitmap_andnot(tmask, mask, chip->shiftmask, MAX_LINE);  in cy8c95x0_write_regs_mask()
621 	bitmap_shift_left(tmask, tmask, 4, MAX_LINE);  in cy8c95x0_write_regs_mask()
624 	bitmap_andnot(tval, val, chip->shiftmask, MAX_LINE);  in cy8c95x0_write_regs_mask()
625 	bitmap_shift_left(tval, tval, 4, MAX_LINE);  in cy8c95x0_write_regs_mask()
651 	DECLARE_BITMAP(tmask, MAX_LINE);  in cy8c95x0_read_regs_mask()
652 	DECLARE_BITMAP(tval, MAX_LINE);  in cy8c95x0_read_regs_mask()
653 	DECLARE_BITMAP(tmp, MAX_LINE);  in cy8c95x0_read_regs_mask()
660 	bitmap_andnot(tmask, mask, chip->shiftmask, MAX_LINE);  in cy8c95x0_read_regs_mask()
661 	bitmap_shift_left(tmask, tmask, 4, MAX_LINE);  in cy8c95x0_read_regs_mask()
664 	bitmap_andnot(tval, val, chip->shiftmask, MAX_LINE);  in cy8c95x0_read_regs_mask()
665 	bitmap_shift_left(tval, tval, 4, MAX_LINE);  in cy8c95x0_read_regs_mask()
684 	bitmap_shift_right(tmp, tval, 4, MAX_LINE);  in cy8c95x0_read_regs_mask()
685 	bitmap_replace(val, tmp, tval, chip->shiftmask, MAX_LINE);  in cy8c95x0_read_regs_mask()
995 	DECLARE_BITMAP(ones, MAX_LINE);  in cy8c95x0_irq_bus_sync_unlock()
996 	DECLARE_BITMAP(irq_mask, MAX_LINE);  in cy8c95x0_irq_bus_sync_unlock()
997 	DECLARE_BITMAP(reg_direction, MAX_LINE);  in cy8c95x0_irq_bus_sync_unlock()
999 	bitmap_fill(ones, MAX_LINE);  in cy8c95x0_irq_bus_sync_unlock()
1005 	bitmap_or(irq_mask, chip->irq_mask, reg_direction, MAX_LINE);  in cy8c95x0_irq_bus_sync_unlock()
1006 	bitmap_complement(irq_mask, irq_mask, MAX_LINE);  in cy8c95x0_irq_bus_sync_unlock()
1072 	DECLARE_BITMAP(ones, MAX_LINE);  in cy8c95x0_irq_pending()
1073 	DECLARE_BITMAP(cur_stat, MAX_LINE);  in cy8c95x0_irq_pending()
1074 	DECLARE_BITMAP(new_stat, MAX_LINE);  in cy8c95x0_irq_pending()
1075 	DECLARE_BITMAP(trigger, MAX_LINE);  in cy8c95x0_irq_pending()
1077 	bitmap_fill(ones, MAX_LINE);  in cy8c95x0_irq_pending()
1089 		       cur_stat, MAX_LINE);  in cy8c95x0_irq_pending()
1091 	bitmap_and(pending, new_stat, trigger, MAX_LINE);  in cy8c95x0_irq_pending()
1093 	return !bitmap_empty(pending, MAX_LINE);  in cy8c95x0_irq_pending()
1100 	DECLARE_BITMAP(pending, MAX_LINE);  in cy8c95x0_irq_handler()
1109 	for_each_set_bit(level, pending, MAX_LINE) {  in cy8c95x0_irq_handler()
1168 	DECLARE_BITMAP(mask, MAX_LINE);  in cy8c95x0_pin_dbg_show()
1169 	DECLARE_BITMAP(pwm, MAX_LINE);  in cy8c95x0_pin_dbg_show()
1171 	bitmap_zero(mask, MAX_LINE);  in cy8c95x0_pin_dbg_show()
1339 	DECLARE_BITMAP(pending_irqs, MAX_LINE);  in cy8c95x0_irq_setup()
1344 	bitmap_zero(pending_irqs, MAX_LINE);  in cy8c95x0_irq_setup()
1354 	bitmap_fill(chip->irq_mask, MAX_LINE);  in cy8c95x0_irq_setup()
1514 	bitmap_zero(chip->push_pull, MAX_LINE);  in cy8c95x0_probe()
1515 	bitmap_zero(chip->shiftmask, MAX_LINE);  in cy8c95x0_probe()