190 	enum at91_mux (*get_periph)(void __iomem *pio, unsigned mask);
191 	void (*mux_A_periph)(void __iomem *pio, unsigned mask);
192 	void (*mux_B_periph)(void __iomem *pio, unsigned mask);
193 	void (*mux_C_periph)(void __iomem *pio, unsigned mask);
194 	void (*mux_D_periph)(void __iomem *pio, unsigned mask);
195 	bool (*get_deglitch)(void __iomem *pio, unsigned pin);
196 	void (*set_deglitch)(void __iomem *pio, unsigned mask, bool is_on);
197 	bool (*get_debounce)(void __iomem *pio, unsigned pin, u32 *div);
198 	void (*set_debounce)(void __iomem *pio, unsigned mask, bool is_on, u32 div);
199 	bool (*get_pulldown)(void __iomem *pio, unsigned pin);
200 	void (*set_pulldown)(void __iomem *pio, unsigned mask, bool is_on);
201 	bool (*get_schmitt_trig)(void __iomem *pio, unsigned pin);
202 	void (*disable_schmitt_trig)(void __iomem *pio, unsigned mask);
203 	unsigned (*get_drivestrength)(void __iomem *pio, unsigned pin);
204 	void (*set_drivestrength)(void __iomem *pio, unsigned pin,
206 	unsigned (*get_slewrate)(void __iomem *pio, unsigned pin);
207 	void (*set_slewrate)(void __iomem *pio, unsigned pin, u32 slewrate);
403 static void at91_mux_disable_interrupt(void __iomem *pio, unsigned mask)  in at91_mux_disable_interrupt()  argument
405 	writel_relaxed(mask, pio + PIO_IDR);  in at91_mux_disable_interrupt()
408 static unsigned at91_mux_get_pullup(void __iomem *pio, unsigned pin)  in at91_mux_get_pullup()  argument
410 	return !((readl_relaxed(pio + PIO_PUSR) >> pin) & 0x1);  in at91_mux_get_pullup()
413 static void at91_mux_set_pullup(void __iomem *pio, unsigned mask, bool on)  in at91_mux_set_pullup()  argument
416 		writel_relaxed(mask, pio + PIO_PPDDR);  in at91_mux_set_pullup()
418 	writel_relaxed(mask, pio + (on ? PIO_PUER : PIO_PUDR));  in at91_mux_set_pullup()
421 static bool at91_mux_get_output(void __iomem *pio, unsigned int pin, bool *val)  in at91_mux_get_output()  argument
423 	*val = (readl_relaxed(pio + PIO_ODSR) >> pin) & 0x1;  in at91_mux_get_output()
424 	return (readl_relaxed(pio + PIO_OSR) >> pin) & 0x1;  in at91_mux_get_output()
427 static void at91_mux_set_output(void __iomem *pio, unsigned int mask,  in at91_mux_set_output()  argument
430 	writel_relaxed(mask, pio + (val ? PIO_SODR : PIO_CODR));  in at91_mux_set_output()
431 	writel_relaxed(mask, pio + (is_on ? PIO_OER : PIO_ODR));  in at91_mux_set_output()
434 static unsigned at91_mux_get_multidrive(void __iomem *pio, unsigned pin)  in at91_mux_get_multidrive()  argument
436 	return (readl_relaxed(pio + PIO_MDSR) >> pin) & 0x1;  in at91_mux_get_multidrive()
439 static void at91_mux_set_multidrive(void __iomem *pio, unsigned mask, bool on)  in at91_mux_set_multidrive()  argument
441 	writel_relaxed(mask, pio + (on ? PIO_MDER : PIO_MDDR));  in at91_mux_set_multidrive()
444 static void at91_mux_set_A_periph(void __iomem *pio, unsigned mask)  in at91_mux_set_A_periph()  argument
446 	writel_relaxed(mask, pio + PIO_ASR);  in at91_mux_set_A_periph()
449 static void at91_mux_set_B_periph(void __iomem *pio, unsigned mask)  in at91_mux_set_B_periph()  argument
451 	writel_relaxed(mask, pio + PIO_BSR);  in at91_mux_set_B_periph()
454 static void at91_mux_pio3_set_A_periph(void __iomem *pio, unsigned mask)  in at91_mux_pio3_set_A_periph()  argument
457 	writel_relaxed(readl_relaxed(pio + PIO_ABCDSR1) & ~mask,  in at91_mux_pio3_set_A_periph()
458 						pio + PIO_ABCDSR1);  in at91_mux_pio3_set_A_periph()
459 	writel_relaxed(readl_relaxed(pio + PIO_ABCDSR2) & ~mask,  in at91_mux_pio3_set_A_periph()
460 						pio + PIO_ABCDSR2);  in at91_mux_pio3_set_A_periph()
463 static void at91_mux_pio3_set_B_periph(void __iomem *pio, unsigned mask)  in at91_mux_pio3_set_B_periph()  argument
465 	writel_relaxed(readl_relaxed(pio + PIO_ABCDSR1) | mask,  in at91_mux_pio3_set_B_periph()
466 						pio + PIO_ABCDSR1);  in at91_mux_pio3_set_B_periph()
467 	writel_relaxed(readl_relaxed(pio + PIO_ABCDSR2) & ~mask,  in at91_mux_pio3_set_B_periph()
468 						pio + PIO_ABCDSR2);  in at91_mux_pio3_set_B_periph()
471 static void at91_mux_pio3_set_C_periph(void __iomem *pio, unsigned mask)  in at91_mux_pio3_set_C_periph()  argument
473 	writel_relaxed(readl_relaxed(pio + PIO_ABCDSR1) & ~mask, pio + PIO_ABCDSR1);  in at91_mux_pio3_set_C_periph()
474 	writel_relaxed(readl_relaxed(pio + PIO_ABCDSR2) | mask, pio + PIO_ABCDSR2);  in at91_mux_pio3_set_C_periph()
477 static void at91_mux_pio3_set_D_periph(void __iomem *pio, unsigned mask)  in at91_mux_pio3_set_D_periph()  argument
479 	writel_relaxed(readl_relaxed(pio + PIO_ABCDSR1) | mask, pio + PIO_ABCDSR1);  in at91_mux_pio3_set_D_periph()
480 	writel_relaxed(readl_relaxed(pio + PIO_ABCDSR2) | mask, pio + PIO_ABCDSR2);  in at91_mux_pio3_set_D_periph()
483 static enum at91_mux at91_mux_pio3_get_periph(void __iomem *pio, unsigned mask)  in at91_mux_pio3_get_periph()  argument
487 	if (readl_relaxed(pio + PIO_PSR) & mask)  in at91_mux_pio3_get_periph()
490 	select = !!(readl_relaxed(pio + PIO_ABCDSR1) & mask);  in at91_mux_pio3_get_periph()
491 	select |= (!!(readl_relaxed(pio + PIO_ABCDSR2) & mask) << 1);  in at91_mux_pio3_get_periph()
496 static enum at91_mux at91_mux_get_periph(void __iomem *pio, unsigned mask)  in at91_mux_get_periph()  argument
500 	if (readl_relaxed(pio + PIO_PSR) & mask)  in at91_mux_get_periph()
503 	select = readl_relaxed(pio + PIO_ABSR) & mask;  in at91_mux_get_periph()
508 static bool at91_mux_get_deglitch(void __iomem *pio, unsigned pin)  in at91_mux_get_deglitch()  argument
510 	return (readl_relaxed(pio + PIO_IFSR) >> pin) & 0x1;  in at91_mux_get_deglitch()
513 static void at91_mux_set_deglitch(void __iomem *pio, unsigned mask, bool is_on)  in at91_mux_set_deglitch()  argument
515 	writel_relaxed(mask, pio + (is_on ? PIO_IFER : PIO_IFDR));  in at91_mux_set_deglitch()
518 static bool at91_mux_pio3_get_deglitch(void __iomem *pio, unsigned pin)  in at91_mux_pio3_get_deglitch()  argument
520 	if ((readl_relaxed(pio + PIO_IFSR) >> pin) & 0x1)  in at91_mux_pio3_get_deglitch()
521 		return !((readl_relaxed(pio + PIO_IFSCSR) >> pin) & 0x1);  in at91_mux_pio3_get_deglitch()
526 static void at91_mux_pio3_set_deglitch(void __iomem *pio, unsigned mask, bool is_on)  in at91_mux_pio3_set_deglitch()  argument
529 		writel_relaxed(mask, pio + PIO_IFSCDR);  in at91_mux_pio3_set_deglitch()
530 	at91_mux_set_deglitch(pio, mask, is_on);  in at91_mux_pio3_set_deglitch()
533 static bool at91_mux_pio3_get_debounce(void __iomem *pio, unsigned pin, u32 *div)  in at91_mux_pio3_get_debounce()  argument
535 	*div = readl_relaxed(pio + PIO_SCDR);  in at91_mux_pio3_get_debounce()
537 	return ((readl_relaxed(pio + PIO_IFSR) >> pin) & 0x1) &&  in at91_mux_pio3_get_debounce()
538 	       ((readl_relaxed(pio + PIO_IFSCSR) >> pin) & 0x1);  in at91_mux_pio3_get_debounce()
541 static void at91_mux_pio3_set_debounce(void __iomem *pio, unsigned mask,  in at91_mux_pio3_set_debounce()  argument
545 		writel_relaxed(mask, pio + PIO_IFSCER);  in at91_mux_pio3_set_debounce()
546 		writel_relaxed(div & PIO_SCDR_DIV, pio + PIO_SCDR);  in at91_mux_pio3_set_debounce()
547 		writel_relaxed(mask, pio + PIO_IFER);  in at91_mux_pio3_set_debounce()
549 		writel_relaxed(mask, pio + PIO_IFSCDR);  in at91_mux_pio3_set_debounce()
552 static bool at91_mux_pio3_get_pulldown(void __iomem *pio, unsigned pin)  in at91_mux_pio3_get_pulldown()  argument
554 	return !((readl_relaxed(pio + PIO_PPDSR) >> pin) & 0x1);  in at91_mux_pio3_get_pulldown()
557 static void at91_mux_pio3_set_pulldown(void __iomem *pio, unsigned mask, bool is_on)  in at91_mux_pio3_set_pulldown()  argument
560 		writel_relaxed(mask, pio + PIO_PUDR);  in at91_mux_pio3_set_pulldown()
562 	writel_relaxed(mask, pio + (is_on ? PIO_PPDER : PIO_PPDDR));  in at91_mux_pio3_set_pulldown()
565 static void at91_mux_pio3_disable_schmitt_trig(void __iomem *pio, unsigned mask)  in at91_mux_pio3_disable_schmitt_trig()  argument
567 	writel_relaxed(readl_relaxed(pio + PIO_SCHMITT) | mask, pio + PIO_SCHMITT);  in at91_mux_pio3_disable_schmitt_trig()
570 static bool at91_mux_pio3_get_schmitt_trig(void __iomem *pio, unsigned pin)  in at91_mux_pio3_get_schmitt_trig()  argument
572 	return (readl_relaxed(pio + PIO_SCHMITT) >> pin) & 0x1;  in at91_mux_pio3_get_schmitt_trig()
584 static unsigned at91_mux_sama5d3_get_drivestrength(void __iomem *pio,  in at91_mux_sama5d3_get_drivestrength()  argument
587 	unsigned tmp = read_drive_strength(pio +  in at91_mux_sama5d3_get_drivestrength()
598 static unsigned at91_mux_sam9x5_get_drivestrength(void __iomem *pio,  in at91_mux_sam9x5_get_drivestrength()  argument
601 	unsigned tmp = read_drive_strength(pio +  in at91_mux_sam9x5_get_drivestrength()
611 static unsigned at91_mux_sam9x60_get_drivestrength(void __iomem *pio,  in at91_mux_sam9x60_get_drivestrength()  argument
614 	unsigned tmp = readl_relaxed(pio + SAM9X60_PIO_DRIVER1);  in at91_mux_sam9x60_get_drivestrength()
622 static unsigned at91_mux_sam9x60_get_slewrate(void __iomem *pio, unsigned pin)  in at91_mux_sam9x60_get_slewrate()  argument
624 	unsigned tmp = readl_relaxed(pio + SAM9X60_PIO_SLEWR);  in at91_mux_sam9x60_get_slewrate()
643 static void at91_mux_sama5d3_set_drivestrength(void __iomem *pio, unsigned pin,  in at91_mux_sama5d3_set_drivestrength()  argument
651 	set_drive_strength(pio + sama5d3_get_drive_register(pin), pin, setting);  in at91_mux_sama5d3_set_drivestrength()
654 static void at91_mux_sam9x5_set_drivestrength(void __iomem *pio, unsigned pin,  in at91_mux_sam9x5_set_drivestrength()  argument
665 	set_drive_strength(pio + at91sam9x5_get_drive_register(pin), pin,  in at91_mux_sam9x5_set_drivestrength()
669 static void at91_mux_sam9x60_set_drivestrength(void __iomem *pio, unsigned pin,  in at91_mux_sam9x60_set_drivestrength()  argument
679 	tmp = readl_relaxed(pio + SAM9X60_PIO_DRIVER1);  in at91_mux_sam9x60_set_drivestrength()
687 	writel_relaxed(tmp, pio + SAM9X60_PIO_DRIVER1);  in at91_mux_sam9x60_set_drivestrength()
690 static void at91_mux_sam9x60_set_slewrate(void __iomem *pio, unsigned pin,  in at91_mux_sam9x60_set_slewrate()  argument
698 	tmp = readl_relaxed(pio + SAM9X60_PIO_SLEWR);  in at91_mux_sam9x60_set_slewrate()
705 	writel_relaxed(tmp, pio + SAM9X60_PIO_SLEWR);  in at91_mux_sam9x60_set_slewrate()
831 static void at91_mux_gpio_disable(void __iomem *pio, unsigned mask)  in at91_mux_gpio_disable()  argument
833 	writel_relaxed(mask, pio + PIO_PDR);  in at91_mux_gpio_disable()
836 static void at91_mux_gpio_enable(void __iomem *pio, unsigned mask, bool input)  in at91_mux_gpio_enable()  argument
838 	writel_relaxed(mask, pio + PIO_PER);  in at91_mux_gpio_enable()
839 	writel_relaxed(mask, pio + (input ? PIO_ODR : PIO_OER));  in at91_mux_gpio_enable()
851 	void __iomem *pio;  in at91_pmx_set()  local
868 		pio = pin_to_controller(info, pin->bank);  in at91_pmx_set()
870 		if (!pio)  in at91_pmx_set()
874 		at91_mux_disable_interrupt(pio, mask);  in at91_pmx_set()
877 			at91_mux_gpio_enable(pio, mask, 1);  in at91_pmx_set()
880 			info->ops->mux_A_periph(pio, mask);  in at91_pmx_set()
883 			info->ops->mux_B_periph(pio, mask);  in at91_pmx_set()
888 			info->ops->mux_C_periph(pio, mask);  in at91_pmx_set()
893 			info->ops->mux_D_periph(pio, mask);  in at91_pmx_set()
897 			at91_mux_gpio_disable(pio, mask);  in at91_pmx_set()
985 	void __iomem *pio;  in at91_pinconf_get()  local
992 	pio = pin_to_controller(info, pin_to_bank(pin_id));  in at91_pinconf_get()
994 	if (!pio)  in at91_pinconf_get()
999 	if (at91_mux_get_multidrive(pio, pin))  in at91_pinconf_get()
1002 	if (at91_mux_get_pullup(pio, pin))  in at91_pinconf_get()
1005 	if (info->ops->get_deglitch && info->ops->get_deglitch(pio, pin))  in at91_pinconf_get()
1007 	if (info->ops->get_debounce && info->ops->get_debounce(pio, pin, &div))  in at91_pinconf_get()
1009 	if (info->ops->get_pulldown && info->ops->get_pulldown(pio, pin))  in at91_pinconf_get()
1011 	if (info->ops->get_schmitt_trig && info->ops->get_schmitt_trig(pio, pin))  in at91_pinconf_get()
1014 		*config |= (info->ops->get_drivestrength(pio, pin)  in at91_pinconf_get()
1017 		*config |= (info->ops->get_slewrate(pio, pin) << SLEWRATE_SHIFT);  in at91_pinconf_get()
1018 	if (at91_mux_get_output(pio, pin, &out))  in at91_pinconf_get()
1030 	void __iomem *pio;  in at91_pinconf_set()  local
1041 		pio = pin_to_controller(info, pin_to_bank(pin_id));  in at91_pinconf_set()
1043 		if (!pio)  in at91_pinconf_set()
1052 		at91_mux_set_output(pio, mask, config & OUTPUT,  in at91_pinconf_set()
1054 		at91_mux_set_pullup(pio, mask, config & PULL_UP);  in at91_pinconf_set()
1055 		at91_mux_set_multidrive(pio, mask, config & MULTI_DRIVE);  in at91_pinconf_set()
1057 			info->ops->set_deglitch(pio, mask, config & DEGLITCH);  in at91_pinconf_set()
1059 			info->ops->set_debounce(pio, mask, config & DEBOUNCE,  in at91_pinconf_set()
1062 			info->ops->set_pulldown(pio, mask, config & PULL_DOWN);  in at91_pinconf_set()
1064 			info->ops->disable_schmitt_trig(pio, mask);  in at91_pinconf_set()
1066 			info->ops->set_drivestrength(pio, pin,  in at91_pinconf_set()
1070 			info->ops->set_slewrate(pio, pin,  in at91_pinconf_set()
1420 	void __iomem *pio = at91_gpio->regbase;  in at91_gpio_get_direction()  local
1424 	osr = readl_relaxed(pio + PIO_OSR);  in at91_gpio_get_direction()
1434 	void __iomem *pio = at91_gpio->regbase;  in at91_gpio_direction_input()  local
1437 	writel_relaxed(mask, pio + PIO_ODR);  in at91_gpio_direction_input()
1444 	void __iomem *pio = at91_gpio->regbase;  in at91_gpio_get()  local
1448 	pdsr = readl_relaxed(pio + PIO_PDSR);  in at91_gpio_get()
1456 	void __iomem *pio = at91_gpio->regbase;  in at91_gpio_set()  local
1459 	writel_relaxed(mask, pio + (val ? PIO_SODR : PIO_CODR));  in at91_gpio_set()
1466 	void __iomem *pio = at91_gpio->regbase;  in at91_gpio_set_multiple()  local
1473 	writel_relaxed(set_mask, pio + PIO_SODR);  in at91_gpio_set_multiple()
1474 	writel_relaxed(clear_mask, pio + PIO_CODR);  in at91_gpio_set_multiple()
1481 	void __iomem *pio = at91_gpio->regbase;  in at91_gpio_direction_output()  local
1484 	writel_relaxed(mask, pio + (val ? PIO_SODR : PIO_CODR));  in at91_gpio_direction_output()
1485 	writel_relaxed(mask, pio + PIO_OER);  in at91_gpio_direction_output()
1496 	void __iomem *pio = at91_gpio->regbase;  in at91_gpio_dbg_show()  local
1502 		mode = at91_gpio->ops->get_periph(pio, mask);  in at91_gpio_dbg_show()
1508 				      readl_relaxed(pio + PIO_OSR) & mask ?  in at91_gpio_dbg_show()
1511 				      readl_relaxed(pio + PIO_PDSR) & mask ?  in at91_gpio_dbg_show()
1554 	void __iomem	*pio = at91_gpio->regbase;  in gpio_irq_mask()  local
1560 	if (pio)  in gpio_irq_mask()
1561 		writel_relaxed(mask, pio + PIO_IDR);  in gpio_irq_mask()
1567 	void __iomem	*pio = at91_gpio->regbase;  in gpio_irq_unmask()  local
1573 	if (pio)  in gpio_irq_unmask()
1574 		writel_relaxed(mask, pio + PIO_IER);  in gpio_irq_unmask()
1592 	void __iomem	*pio = at91_gpio->regbase;  in alt_gpio_irq_type()  local
1598 		writel_relaxed(mask, pio + PIO_ESR);  in alt_gpio_irq_type()
1599 		writel_relaxed(mask, pio + PIO_REHLSR);  in alt_gpio_irq_type()
1603 		writel_relaxed(mask, pio + PIO_ESR);  in alt_gpio_irq_type()
1604 		writel_relaxed(mask, pio + PIO_FELLSR);  in alt_gpio_irq_type()
1608 		writel_relaxed(mask, pio + PIO_LSR);  in alt_gpio_irq_type()
1609 		writel_relaxed(mask, pio + PIO_FELLSR);  in alt_gpio_irq_type()
1613 		writel_relaxed(mask, pio + PIO_LSR);  in alt_gpio_irq_type()
1614 		writel_relaxed(mask, pio + PIO_REHLSR);  in alt_gpio_irq_type()
1622 		writel_relaxed(mask, pio + PIO_AIMDR);  in alt_gpio_irq_type()
1631 	writel_relaxed(mask, pio + PIO_AIMER);  in alt_gpio_irq_type()
1659 	void __iomem *pio = at91_chip->regbase;  in at91_gpio_suspend()  local
1661 	at91_chip->backups = readl_relaxed(pio + PIO_IMR);  in at91_gpio_suspend()
1662 	writel_relaxed(at91_chip->backups, pio + PIO_IDR);  in at91_gpio_suspend()
1663 	writel_relaxed(at91_chip->wakeups, pio + PIO_IER);  in at91_gpio_suspend()
1677 	void __iomem *pio = at91_chip->regbase;  in at91_gpio_resume()  local
1682 	writel_relaxed(at91_chip->wakeups, pio + PIO_IDR);  in at91_gpio_resume()
1683 	writel_relaxed(at91_chip->backups, pio + PIO_IER);  in at91_gpio_resume()
1693 	void __iomem	*pio = at91_gpio->regbase;  in gpio_irq_handler()  local
1703 		isr = readl_relaxed(pio + PIO_ISR) & readl_relaxed(pio + PIO_IMR);  in gpio_irq_handler()
1708 			pio = at91_gpio->regbase;  in gpio_irq_handler()