60 	void __iomem		*gpio_base;  member
138 	iowrite32(BIT(bit), pctrl->gpio_base + WPCM450_GPEVST);  in wpcm450_gpio_irq_ack()
156 	even = ioread32(pctrl->gpio_base + WPCM450_GPEVEN);  in wpcm450_gpio_irq_mask()
158 	iowrite32(even, pctrl->gpio_base + WPCM450_GPEVEN);  in wpcm450_gpio_irq_mask()
180 	even = ioread32(pctrl->gpio_base + WPCM450_GPEVEN);  in wpcm450_gpio_irq_unmask()
182 	iowrite32(even, pctrl->gpio_base + WPCM450_GPEVEN);  in wpcm450_gpio_irq_unmask()
195 	void __iomem *reg = gpio->pctrl->gpio_base + gpio->bank->datain;  in wpcm450_gpio_get()
229 			evpol = ioread32(pctrl->gpio_base + WPCM450_GPEVPOL);  in wpcm450_gpio_fix_evpol()
231 			iowrite32(evpol, pctrl->gpio_base + WPCM450_GPEVPOL);  in wpcm450_gpio_fix_evpol()
254 	evtype = ioread32(pctrl->gpio_base + WPCM450_GPEVTYPE);  in wpcm450_gpio_set_irq_type()
255 	evpol = ioread32(pctrl->gpio_base + WPCM450_GPEVPOL);  in wpcm450_gpio_set_irq_type()
281 	iowrite32(evtype, pctrl->gpio_base + WPCM450_GPEVTYPE);  in wpcm450_gpio_set_irq_type()
282 	iowrite32(evpol, pctrl->gpio_base + WPCM450_GPEVPOL);  in wpcm450_gpio_set_irq_type()
285 	iowrite32(BIT(bit), pctrl->gpio_base + WPCM450_GPEVST);  in wpcm450_gpio_set_irq_type()
319 	pending = ioread32(pctrl->gpio_base + WPCM450_GPEVST);  in wpcm450_gpio_irqhandler()
320 	pending &= ioread32(pctrl->gpio_base + WPCM450_GPEVEN);  in wpcm450_gpio_irqhandler()
938 		reg = ioread32(pctrl->gpio_base + WPCM450_GPEVDBNC);  in wpcm450_config_get()
966 		reg = ioread32(pctrl->gpio_base + WPCM450_GPEVDBNC);  in wpcm450_config_set_one()
968 		iowrite32(reg, pctrl->gpio_base + WPCM450_GPEVDBNC);  in wpcm450_config_set_one()
1031 	pctrl->gpio_base = devm_platform_ioremap_resource(pdev, 0);  in wpcm450_gpio_register()
1032 	if (IS_ERR(pctrl->gpio_base))  in wpcm450_gpio_register()
1033 		return dev_err_probe(dev, PTR_ERR(pctrl->gpio_base),  in wpcm450_gpio_register()
1064 		dat = pctrl->gpio_base + bank->datain;  in wpcm450_gpio_register()
1066 			set = pctrl->gpio_base + bank->dataout;  in wpcm450_gpio_register()
1067 			dirout = pctrl->gpio_base + bank->cfg0;  in wpcm450_gpio_register()