Lines Matching +full:pinctrl +full:- +full:pin +full:- +full:array

1 /* SPDX-License-Identifier: GPL-2.0 */
34 * struct abx500_function - ABx500 pinctrl mux function
35 * @name: The name of the function, exported to pinctrl core.
36 * @groups: An array of pin groups that may select this function.
46 * struct abx500_pingroup - describes a ABx500 pin group
47 * @name: the name of this specific pin group
48 * @pins: an array of discrete physical pins used in this group, taken
49 * from the driver-local pin enumeration space
50 * @num_pins: the number of pins in this group array, i.e. the number of
51 * elements in .pins so we can iterate over that array
62 #define ALTERNATE_FUNCTIONS(pin, sel_bit, alt1, alt2, alta, altb, altc) \ argument
64 .pin_number = pin, \
73 #define UNUSED -1
76 * @pin_number: The pin number
109 * struct abx500_gpio_irq_cluster - indicates GPIOs which are interrupt
111 * @start: The pin number of the first pin interrupt capable
112 * @end: The pin number of the last pin interrupt capable
116 * read-in values into the cluster information table
126 * struct abx500_pinrange - map pin numbers to GPIO offsets
128 * identical to the offset into the local pin numberspace
130 * @altfunc: altfunc setting to be used to enable GPIO on a pin in
142 * struct abx500_pinctrl_soc_data - ABx500 pin controller per-SoC configuration
143 * @gpio_ranges: An array of GPIO ranges for this SoC
145 * @pins: An array describing all pins the pin controller affects.
147 * array, and be numbered identically to the GPIO controller's
152 * @groups: An array describing all pin groups the pin SoC supports.
154 * @alternate_functions: array describing pins which supports alternate and
156 * @gpio_irq_cluster: An array of GPIO interrupt capable for this SoC