pinctrl/mediatek/pinctrl-mt8516.c

1 // SPDX-License-Identifier: GPL-2.0
7 #include <dt-bindings/pinctrl/mt65xx.h>
14 #include "pinctrl-mtk-common.h"
15 #include "pinctrl-mtk-mt8516.h"
18 	/* 0E4E8SR 4/8/12/16 */
20 	/* 0E2E4SR  2/4/6/8 */
21 	MTK_DRV_GRP(2, 8, 1, 2, 2),
22 	/* E8E4E2  2/4/6/8/10/12/14/16 */
36 	MTK_PIN_DRV_GRP(8, 0xd00, 4, 0),
40 	MTK_PIN_DRV_GRP(11, 0xd00, 8, 0),
41 	MTK_PIN_DRV_GRP(12, 0xd00, 8, 0),
42 	MTK_PIN_DRV_GRP(13, 0xd00, 8, 0),
44 	MTK_PIN_DRV_GRP(14, 0xd00, 12, 2),
45 	MTK_PIN_DRV_GRP(15, 0xd00, 12, 2),
46 	MTK_PIN_DRV_GRP(16, 0xd00, 12, 2),
47 	MTK_PIN_DRV_GRP(17, 0xd00, 12, 2),
53 	MTK_PIN_DRV_GRP(21, 0xd00, 12, 2),
54 	MTK_PIN_DRV_GRP(22, 0xd00, 12, 2),
55 	MTK_PIN_DRV_GRP(23, 0xd00, 12, 2),
57 	MTK_PIN_DRV_GRP(24, 0xd00, 8, 0),
58 	MTK_PIN_DRV_GRP(25, 0xd00, 8, 0),
66 	MTK_PIN_DRV_GRP(31, 0xd10, 8, 1),
67 	MTK_PIN_DRV_GRP(32, 0xd10, 8, 1),
68 	MTK_PIN_DRV_GRP(33, 0xd10, 8, 1),
70 	MTK_PIN_DRV_GRP(34, 0xd10, 12, 0),
71 	MTK_PIN_DRV_GRP(35, 0xd10, 12, 0),
80 	MTK_PIN_DRV_GRP(41, 0xd20, 8, 1),
81 	MTK_PIN_DRV_GRP(42, 0xd20, 8, 1),
82 	MTK_PIN_DRV_GRP(43, 0xd20, 8, 1),
84 	MTK_PIN_DRV_GRP(44, 0xd20, 12, 1),
85 	MTK_PIN_DRV_GRP(45, 0xd20, 12, 1),
86 	MTK_PIN_DRV_GRP(46, 0xd20, 12, 1),
87 	MTK_PIN_DRV_GRP(47, 0xd20, 12, 1),
94 	MTK_PIN_DRV_GRP(54, 0xd30, 8, 1),
96 	MTK_PIN_DRV_GRP(55, 0xd30, 12, 1),
97 	MTK_PIN_DRV_GRP(56, 0xd30, 12, 1),
98 	MTK_PIN_DRV_GRP(57, 0xd30, 12, 1),
100 	MTK_PIN_DRV_GRP(62, 0xd40, 8, 1),
101 	MTK_PIN_DRV_GRP(63, 0xd40, 8, 1),
102 	MTK_PIN_DRV_GRP(64, 0xd40, 8, 1),
103 	MTK_PIN_DRV_GRP(65, 0xd40, 8, 1),
104 	MTK_PIN_DRV_GRP(66, 0xd40, 8, 1),
105 	MTK_PIN_DRV_GRP(67, 0xd40, 8, 1),
107 	MTK_PIN_DRV_GRP(68, 0xd40, 12, 2),
116 	MTK_PIN_DRV_GRP(100, 0xd50, 8, 1),
117 	MTK_PIN_DRV_GRP(101, 0xd50, 8, 1),
118 	MTK_PIN_DRV_GRP(102, 0xd50, 8, 1),
119 	MTK_PIN_DRV_GRP(103, 0xd50, 8, 1),
121 	MTK_PIN_DRV_GRP(104, 0xd50, 12, 2),
137 	MTK_PIN_DRV_GRP(115, 0xd60, 12, 2),
139 	MTK_PIN_DRV_GRP(116, 0xd60, 8, 2),
148 	MTK_PIN_PUPD_SPEC_SR(14, 0xe50, 14, 13, 12),
151 	MTK_PIN_PUPD_SPEC_SR(17, 0xe60, 10, 9, 8),
153 	MTK_PIN_PUPD_SPEC_SR(21, 0xe60, 14, 13, 12),
162 	MTK_PIN_PUPD_SPEC_SR(68, 0xe50, 10, 9, 8),
165 	MTK_PIN_PUPD_SPEC_SR(71, 0xe40, 10, 9, 8),
166 	MTK_PIN_PUPD_SPEC_SR(72, 0xe40, 14, 13, 12),
170 	MTK_PIN_PUPD_SPEC_SR(105, 0xe30, 14, 13, 12),
171 	MTK_PIN_PUPD_SPEC_SR(106, 0xe20, 14, 13, 12),
174 	MTK_PIN_PUPD_SPEC_SR(109, 0xe30, 10, 9, 8),
175 	MTK_PIN_PUPD_SPEC_SR(110, 0xe10, 14, 13, 12),
176 	MTK_PIN_PUPD_SPEC_SR(111, 0xe10, 10, 9, 8),
179 	MTK_PIN_PUPD_SPEC_SR(114, 0xe20, 10, 9, 8),
182 	MTK_PIN_PUPD_SPEC_SR(117, 0xe00, 14, 13, 12),
183 	MTK_PIN_PUPD_SPEC_SR(118, 0xe00, 10, 9, 8),
191 	MTK_PIN_IES_SMT_SPEC(11, 13, 0x900, 12),
195 	MTK_PIN_IES_SMT_SPEC(24, 25, 0x900, 12),
217 	MTK_PIN_IES_SMT_SPEC(104, 104, 0x920, 12),
224 	MTK_PIN_IES_SMT_SPEC(111, 111, 0x920, 8),
240 	MTK_PIN_IES_SMT_SPEC(11, 13, 0xA00, 12),
244 	MTK_PIN_IES_SMT_SPEC(24, 25, 0xA00, 12),
267 	MTK_PIN_IES_SMT_SPEC(104, 104, 0xA20, 12),
274 	MTK_PIN_IES_SMT_SPEC(111, 111, 0xA20, 8),
326 	{ .compatible = "mediatek,mt8516-pinctrl", .data = &mt8516_pinctrl_data },
335 		.name = "mediatek-mt8516-pinctrl",