Lines Matching full:using

22 	  allows configuring of SoC pins and using them as GPIOs.
30 	  using them as GPIOs.
46 	  of Intel PCH pins and using them as GPIOs. Currently the following
56 	  of Intel Alder Lake PCH pins and using them as GPIOs.
63 	  configuring of SoC pins and using them as GPIOs.
70 	  of Intel Cannon Lake PCH pins and using them as GPIOs.
77 	  of Intel Cedar Fork PCH pins and using them as GPIOs.
84 	  of Intel Denverton SoC pins and using them as GPIOs.
91 	  of Intel Elkhart Lake SoC pins and using them as GPIOs.
98 	  of Intel Emmitsburg pins and using them as GPIOs.
105 	  of Intel Gemini Lake SoC pins and using them as GPIOs.
112 	  of Intel Ice Lake PCH pins and using them as GPIOs.
119 	  of Intel Jasper Lake PCH pins and using them as GPIOs.
126 	  of Intel Lakefield SoC pins and using them as GPIOs.
133 	  of Intel Lewisburg pins and using them as GPIOs.
140 	  of Intel Meteor Lake pins and using them as GPIOs.
149 	  using them as GPIOs.
157 	  using them as GPIOs.
164 	  of Intel Tiger Lake PCH pins and using them as GPIOs.