pinctrl/aspeed/pinctrl-aspeed-g6.c

349 #define B24 39  macro
350 SIG_EXPR_LIST_DECL_SESG(B24, NRTS4, NRTS4, SIG_DESC_SET(SCU414, 7));
351 SIG_EXPR_LIST_DECL_SESG(B24, RGMII4RXD3, RGMII4, SIG_DESC_SET(SCU4B4, 7),
353 SIG_EXPR_LIST_DECL_SESG(B24, RMII4RXER, RMII4, SIG_DESC_SET(SCU4B4, 7),
355 PIN_DECL_3(B24, GPIOE7, NRTS4, RGMII4RXD3, RMII4RXER);
356 FUNC_GROUP_DECL(NRTS4, B24);
359 		B24);
360 GROUP_DECL(RMII4, F24, E23, E24, E25, C25, C24, B26, B25, B24);
361 GROUP_DECL(NCSI4, E23, E24, E25, C25, C24, B26, B25, B24);
1761 	ASPEED_PINCTRL_PIN(B24),
2615 	{ PIN_CONFIG_POWER_SOURCE,   { F24, B24 }, SCU458, BIT_MASK(5)},
2616 	{ PIN_CONFIG_DRIVE_STRENGTH, { F24, B24 }, SCU458, GENMASK(3, 2)},