1 // SPDX-License-Identifier: GPL-2.0+
6  * Author: David Liu <liuwei@actions-semi.com>
18 #define MUX_PG(group_name, reg, shift, width)				\  argument
27 		.mfpctl_width = width,					\
28 		.drv_reg = -1,						\
29 		.drv_shift = -1,					\
30 		.drv_width = -1,					\
31 		.sr_reg = -1,						\
32 		.sr_shift = -1,						\
33 		.sr_width = -1,						\
36 #define DRV_PG(group_name, reg, shift, width)				\  argument
41 		.mfpctl_reg  = -1,					\
42 		.mfpctl_shift = -1,					\
43 		.mfpctl_width = -1,					\
46 		.drv_width = width,					\
47 		.sr_reg = -1,						\
48 		.sr_shift = -1,						\
49 		.sr_width = -1,						\
52 #define SR_PG(group_name, reg, shift, width)				\  argument
57 		.mfpctl_reg  = -1,					\
58 		.mfpctl_shift = -1,					\
59 		.mfpctl_width = -1,					\
60 		.drv_reg = -1,						\
61 		.drv_shift = -1,					\
62 		.drv_width = -1,					\
65 		.sr_width = width,					\
80 		.width = pull_wdt,			\
91 		.width = st_wdt,			\
155 /* GPIO CTRL Bit Definition */
160 /* GPIO TYPE Bit Definition */
168  * struct owl_pullctl - Actions pad pull control register
171  * @width: width of the register
176 	unsigned int width;  member
180  * struct owl_st - Actions pad schmitt trigger enable register
183  * @width: width of the register
188 	unsigned int width;  member
192  * struct owl_pingroup - Actions pingroup definition
200  * @mfpctl_width: multiplexing control register width
203  * @drv_width: driver control register width
206  * @sr_width: slew rate control register width
229  * struct owl_padinfo - Actions pinctrl pad info
241  * struct owl_pinmux_func - Actions pinctrl mux functions
253  * struct owl_gpio_port - Actions GPIO port info
254  * @offset: offset of the GPIO port.
255  * @pins: number of pins belongs to the GPIO port.
278  * struct owl_pinctrl_soc_data - Actions pin controller driver configuration
287  * @ports: array describing all GPIO ports of this SoC.
288  * @nports: number of GPIO ports in this SoC.