Lines Matching refs:XUSB_PADCTL_UPHY_PLL_S0_CTL2

235 #define XUSB_PADCTL_UPHY_PLL_S0_CTL2 0x864  macro
732 	value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_S0_CTL2);  in tegra210_sata_uphy_enable()
737 	padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_S0_CTL2);  in tegra210_sata_uphy_enable()
750 	value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_S0_CTL2);  in tegra210_sata_uphy_enable()
752 	padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_S0_CTL2);  in tegra210_sata_uphy_enable()
805 	value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_S0_CTL2);  in tegra210_sata_uphy_enable()
807 	padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_S0_CTL2);  in tegra210_sata_uphy_enable()
812 		value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_S0_CTL2);  in tegra210_sata_uphy_enable()
824 	value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_S0_CTL2);  in tegra210_sata_uphy_enable()
826 	padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_S0_CTL2);  in tegra210_sata_uphy_enable()
831 		value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_S0_CTL2);  in tegra210_sata_uphy_enable()
911 	value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_S0_CTL2);  in tegra210_sata_uphy_enable()
913 	padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_S0_CTL2);  in tegra210_sata_uphy_enable()