Lines Matching refs:XUSB_PADCTL_UPHY_PLL_S0_CTL1

233 #define XUSB_PADCTL_UPHY_PLL_S0_CTL1 0x860  macro
746 	value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_S0_CTL1);  in tegra210_sata_uphy_enable()
748 	padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_S0_CTL1);  in tegra210_sata_uphy_enable()
775 	value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_S0_CTL1);  in tegra210_sata_uphy_enable()
788 	padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_S0_CTL1);  in tegra210_sata_uphy_enable()
790 	value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_S0_CTL1);  in tegra210_sata_uphy_enable()
792 	padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_S0_CTL1);  in tegra210_sata_uphy_enable()
794 	value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_S0_CTL1);  in tegra210_sata_uphy_enable()
797 	padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_S0_CTL1);  in tegra210_sata_uphy_enable()
843 	value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_S0_CTL1);  in tegra210_sata_uphy_enable()
845 	padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_S0_CTL1);  in tegra210_sata_uphy_enable()
850 		value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_S0_CTL1);  in tegra210_sata_uphy_enable()
907 	value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_S0_CTL1);  in tegra210_sata_uphy_enable()
909 	padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_S0_CTL1);  in tegra210_sata_uphy_enable()