Lines Matching +full:usb2 +full:- +full:3
1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2016-2022, NVIDIA CORPORATION. All rights reserved.
21 #define HS_CURR_LEVEL_PADX_SHIFT(x) ((x) ? (11 + (x - 1) * 6) : 0)
63 #define SSPX_ELPG_CLAMP_EN(x) BIT(0 + (x) * 3)
64 #define SSPX_ELPG_CLAMP_EN_EARLY(x) BIT(1 + (x) * 3)
65 #define SSPX_ELPG_VCORE_DOWN(x) BIT(2 + (x) * 3)
81 #define TERM_RANGE_ADJ(x) (((x) & 0xf) << 3)
100 #define HSIC_PD_TX_STROBE BIT(3)
129 #define CLR_WAKE_ALARM BIT(3)
133 #define HSIC_CLR_WAKE_ALARM BIT(3)
141 #define UTMI_RST SPEED(3)
155 #define FAKE_USBON_EN BIT(3)
159 #define FAKE_DATA_EN BIT(3)
207 #define RPU_DATA0_A BIT(3)
225 #define FSLS_USE_XUSB_AO BIT(3)
280 writel(value, priv->ao_regs + offset); in ao_writel()
285 return readl(priv->ao_regs + offset); in ao_readl()
299 struct tegra_xusb_usb2_lane *usb2; in tegra186_usb2_lane_probe() local
302 usb2 = kzalloc(sizeof(*usb2), GFP_KERNEL); in tegra186_usb2_lane_probe()
303 if (!usb2) in tegra186_usb2_lane_probe()
304 return ERR_PTR(-ENOMEM); in tegra186_usb2_lane_probe()
306 INIT_LIST_HEAD(&usb2->base.list); in tegra186_usb2_lane_probe()
307 usb2->base.soc = &pad->soc->lanes[index]; in tegra186_usb2_lane_probe()
308 usb2->base.index = index; in tegra186_usb2_lane_probe()
309 usb2->base.pad = pad; in tegra186_usb2_lane_probe()
310 usb2->base.np = np; in tegra186_usb2_lane_probe()
312 err = tegra_xusb_lane_parse_dt(&usb2->base, np); in tegra186_usb2_lane_probe()
314 kfree(usb2); in tegra186_usb2_lane_probe()
318 return &usb2->base; in tegra186_usb2_lane_probe()
323 struct tegra_xusb_usb2_lane *usb2 = to_usb2_lane(lane); in tegra186_usb2_lane_remove() local
325 kfree(usb2); in tegra186_usb2_lane_remove()
331 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_enable_phy_sleepwalk()
333 unsigned int index = lane->index; in tegra186_utmi_enable_phy_sleepwalk()
336 mutex_lock(&padctl->lock); in tegra186_utmi_enable_phy_sleepwalk()
407 * as well as capture the configuration of the USB2.0 pad in tegra186_utmi_enable_phy_sleepwalk()
413 /* setup the pull-ups and pull-downs of the signals during the four in tegra186_utmi_enable_phy_sleepwalk()
424 /* J state: D+/D- = high/low, K state: D+/D- = low/high */ in tegra186_utmi_enable_phy_sleepwalk()
428 if (padctl->soc->supports_lp_cfg_en) in tegra186_utmi_enable_phy_sleepwalk()
433 /* J state: D+/D- = low/high, K state: D+/D- = high/low */ in tegra186_utmi_enable_phy_sleepwalk()
437 if (padctl->soc->supports_lp_cfg_en) in tegra186_utmi_enable_phy_sleepwalk()
455 /* switch the electric control of the USB2.0 pad to XUSB_AO */ in tegra186_utmi_enable_phy_sleepwalk()
472 mutex_unlock(&padctl->lock); in tegra186_utmi_enable_phy_sleepwalk()
479 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_disable_phy_sleepwalk()
481 unsigned int index = lane->index; in tegra186_utmi_disable_phy_sleepwalk()
484 mutex_lock(&padctl->lock); in tegra186_utmi_disable_phy_sleepwalk()
491 /* switch the electric control of the USB2.0 pad to XUSB vcore logic */ in tegra186_utmi_disable_phy_sleepwalk()
503 if (padctl->soc->supports_lp_cfg_en) { in tegra186_utmi_disable_phy_sleepwalk()
520 mutex_unlock(&padctl->lock); in tegra186_utmi_disable_phy_sleepwalk()
527 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_enable_phy_wake()
528 unsigned int index = lane->index; in tegra186_utmi_enable_phy_wake()
531 mutex_lock(&padctl->lock); in tegra186_utmi_enable_phy_wake()
545 mutex_unlock(&padctl->lock); in tegra186_utmi_enable_phy_wake()
552 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_disable_phy_wake()
553 unsigned int index = lane->index; in tegra186_utmi_disable_phy_wake()
556 mutex_lock(&padctl->lock); in tegra186_utmi_disable_phy_wake()
570 mutex_unlock(&padctl->lock); in tegra186_utmi_disable_phy_wake()
577 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_phy_remote_wake_detected()
578 unsigned int index = lane->index; in tegra186_utmi_phy_remote_wake_detected()
602 struct device *dev = padctl->dev; in tegra186_utmi_bias_pad_power_on()
606 mutex_lock(&padctl->lock); in tegra186_utmi_bias_pad_power_on()
608 if (priv->bias_pad_enable++ > 0) { in tegra186_utmi_bias_pad_power_on()
609 mutex_unlock(&padctl->lock); in tegra186_utmi_bias_pad_power_on()
613 err = clk_prepare_enable(priv->usb2_trk_clk); in tegra186_utmi_bias_pad_power_on()
615 dev_warn(dev, "failed to enable USB2 trk clock: %d\n", err); in tegra186_utmi_bias_pad_power_on()
627 value |= HS_SQUELCH_LEVEL(priv->calib.hs_squelch); in tegra186_utmi_bias_pad_power_on()
636 if (padctl->soc->poll_trk_completed) { in tegra186_utmi_bias_pad_power_on()
643 dev_warn(dev, "failed to poll USB2 trk completed: %d\n", err); in tegra186_utmi_bias_pad_power_on()
653 if (padctl->soc->trk_hw_mode) { in tegra186_utmi_bias_pad_power_on()
659 clk_disable_unprepare(priv->usb2_trk_clk); in tegra186_utmi_bias_pad_power_on()
662 mutex_unlock(&padctl->lock); in tegra186_utmi_bias_pad_power_on()
670 mutex_lock(&padctl->lock); in tegra186_utmi_bias_pad_power_off()
672 if (WARN_ON(priv->bias_pad_enable == 0)) { in tegra186_utmi_bias_pad_power_off()
673 mutex_unlock(&padctl->lock); in tegra186_utmi_bias_pad_power_off()
677 if (--priv->bias_pad_enable > 0) { in tegra186_utmi_bias_pad_power_off()
678 mutex_unlock(&padctl->lock); in tegra186_utmi_bias_pad_power_off()
686 if (padctl->soc->trk_hw_mode) { in tegra186_utmi_bias_pad_power_off()
690 clk_disable_unprepare(priv->usb2_trk_clk); in tegra186_utmi_bias_pad_power_off()
693 mutex_unlock(&padctl->lock); in tegra186_utmi_bias_pad_power_off()
699 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_pad_power_on()
701 struct device *dev = padctl->dev; in tegra186_utmi_pad_power_on()
702 unsigned int index = lane->index; in tegra186_utmi_pad_power_on()
710 dev_err(dev, "no port found for USB2 lane %u\n", index); in tegra186_utmi_pad_power_on()
732 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_pad_power_down()
733 unsigned int index = lane->index; in tegra186_utmi_pad_power_down()
739 dev_dbg(padctl->dev, "power down UTMI pad %u\n", index); in tegra186_utmi_pad_power_down()
759 dev_dbg(padctl->dev, "%s vbus override\n", status ? "set" : "clear"); in tegra186_xusb_padctl_vbus_override()
781 dev_dbg(padctl->dev, "%s id override\n", status ? "set" : "clear"); in tegra186_xusb_padctl_id_override()
810 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_phy_set_mode()
812 lane->index); in tegra186_utmi_phy_set_mode()
815 mutex_lock(&padctl->lock); in tegra186_utmi_phy_set_mode()
817 dev_dbg(&port->base.dev, "%s: mode %d", __func__, mode); in tegra186_utmi_phy_set_mode()
823 err = regulator_enable(port->supply); in tegra186_utmi_phy_set_mode()
832 if (regulator_is_enabled(port->supply)) in tegra186_utmi_phy_set_mode()
833 regulator_disable(port->supply); in tegra186_utmi_phy_set_mode()
840 mutex_unlock(&padctl->lock); in tegra186_utmi_phy_set_mode()
848 struct tegra_xusb_usb2_lane *usb2 = to_usb2_lane(lane); in tegra186_utmi_phy_power_on() local
849 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_phy_power_on()
852 unsigned int index = lane->index; in tegra186_utmi_phy_power_on()
853 struct device *dev = padctl->dev; in tegra186_utmi_phy_power_on()
858 dev_err(dev, "no port found for USB2 lane %u\n", index); in tegra186_utmi_phy_power_on()
859 return -ENODEV; in tegra186_utmi_phy_power_on()
870 if (port->mode == USB_DR_MODE_UNKNOWN) in tegra186_utmi_phy_power_on()
872 else if (port->mode == USB_DR_MODE_PERIPHERAL) in tegra186_utmi_phy_power_on()
874 else if (port->mode == USB_DR_MODE_HOST) in tegra186_utmi_phy_power_on()
876 else if (port->mode == USB_DR_MODE_OTG) in tegra186_utmi_phy_power_on()
886 if (usb2->hs_curr_level_offset) { in tegra186_utmi_phy_power_on()
889 hs_current_level = (int)priv->calib.hs_curr_level[index] + in tegra186_utmi_phy_power_on()
890 usb2->hs_curr_level_offset; in tegra186_utmi_phy_power_on()
899 value |= HS_CURR_LEVEL(priv->calib.hs_curr_level[index]); in tegra186_utmi_phy_power_on()
906 value |= TERM_RANGE_ADJ(priv->calib.hs_term_range_adj); in tegra186_utmi_phy_power_on()
908 value |= RPD_CTRL(priv->calib.rpd_ctrl); in tegra186_utmi_phy_power_on()
926 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_phy_init()
928 unsigned int index = lane->index; in tegra186_utmi_phy_init()
929 struct device *dev = padctl->dev; in tegra186_utmi_phy_init()
934 dev_err(dev, "no port found for USB2 lane %u\n", index); in tegra186_utmi_phy_init()
935 return -ENODEV; in tegra186_utmi_phy_init()
938 if (port->supply && port->mode == USB_DR_MODE_HOST) { in tegra186_utmi_phy_init()
939 err = regulator_enable(port->supply); in tegra186_utmi_phy_init()
953 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_utmi_phy_exit()
955 unsigned int index = lane->index; in tegra186_utmi_phy_exit()
956 struct device *dev = padctl->dev; in tegra186_utmi_phy_exit()
961 dev_err(dev, "no port found for USB2 lane %u\n", index); in tegra186_utmi_phy_exit()
962 return -ENODEV; in tegra186_utmi_phy_exit()
965 if (port->supply && port->mode == USB_DR_MODE_HOST) { in tegra186_utmi_phy_exit()
966 err = regulator_disable(port->supply); in tegra186_utmi_phy_exit()
992 struct tegra_xusb_usb2_pad *usb2; in tegra186_usb2_pad_probe() local
996 usb2 = kzalloc(sizeof(*usb2), GFP_KERNEL); in tegra186_usb2_pad_probe()
997 if (!usb2) in tegra186_usb2_pad_probe()
998 return ERR_PTR(-ENOMEM); in tegra186_usb2_pad_probe()
1000 pad = &usb2->base; in tegra186_usb2_pad_probe()
1001 pad->ops = &tegra186_usb2_lane_ops; in tegra186_usb2_pad_probe()
1002 pad->soc = soc; in tegra186_usb2_pad_probe()
1006 kfree(usb2); in tegra186_usb2_pad_probe()
1010 priv->usb2_trk_clk = devm_clk_get(&pad->dev, "trk"); in tegra186_usb2_pad_probe()
1011 if (IS_ERR(priv->usb2_trk_clk)) { in tegra186_usb2_pad_probe()
1012 err = PTR_ERR(priv->usb2_trk_clk); in tegra186_usb2_pad_probe()
1013 dev_dbg(&pad->dev, "failed to get usb2 trk clock: %d\n", err); in tegra186_usb2_pad_probe()
1021 dev_set_drvdata(&pad->dev, pad); in tegra186_usb2_pad_probe()
1026 device_unregister(&pad->dev); in tegra186_usb2_pad_probe()
1033 struct tegra_xusb_usb2_pad *usb2 = to_usb2_pad(pad); in tegra186_usb2_pad_remove() local
1035 kfree(usb2); in tegra186_usb2_pad_remove()
1059 return tegra_xusb_find_lane(port->padctl, "usb2", port->index); in tegra186_usb2_port_map()
1080 return ERR_PTR(-ENOMEM); in tegra186_usb3_lane_probe()
1082 INIT_LIST_HEAD(&usb3->base.list); in tegra186_usb3_lane_probe()
1083 usb3->base.soc = &pad->soc->lanes[index]; in tegra186_usb3_lane_probe()
1084 usb3->base.index = index; in tegra186_usb3_lane_probe()
1085 usb3->base.pad = pad; in tegra186_usb3_lane_probe()
1086 usb3->base.np = np; in tegra186_usb3_lane_probe()
1088 err = tegra_xusb_lane_parse_dt(&usb3->base, np); in tegra186_usb3_lane_probe()
1094 return &usb3->base; in tegra186_usb3_lane_probe()
1107 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_usb3_enable_phy_sleepwalk()
1108 unsigned int index = lane->index; in tegra186_usb3_enable_phy_sleepwalk()
1111 mutex_lock(&padctl->lock); in tegra186_usb3_enable_phy_sleepwalk()
1125 mutex_unlock(&padctl->lock); in tegra186_usb3_enable_phy_sleepwalk()
1132 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_usb3_disable_phy_sleepwalk()
1133 unsigned int index = lane->index; in tegra186_usb3_disable_phy_sleepwalk()
1136 mutex_lock(&padctl->lock); in tegra186_usb3_disable_phy_sleepwalk()
1148 mutex_unlock(&padctl->lock); in tegra186_usb3_disable_phy_sleepwalk()
1155 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_usb3_enable_phy_wake()
1156 unsigned int index = lane->index; in tegra186_usb3_enable_phy_wake()
1159 mutex_lock(&padctl->lock); in tegra186_usb3_enable_phy_wake()
1173 mutex_unlock(&padctl->lock); in tegra186_usb3_enable_phy_wake()
1180 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_usb3_disable_phy_wake()
1181 unsigned int index = lane->index; in tegra186_usb3_disable_phy_wake()
1184 mutex_lock(&padctl->lock); in tegra186_usb3_disable_phy_wake()
1198 mutex_unlock(&padctl->lock); in tegra186_usb3_disable_phy_wake()
1205 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_usb3_phy_remote_wake_detected()
1206 unsigned int index = lane->index; in tegra186_usb3_phy_remote_wake_detected()
1238 return tegra_xusb_find_lane(port->padctl, "usb3", port->index); in tegra186_usb3_port_map()
1251 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_usb3_phy_power_on()
1253 struct tegra_xusb_usb2_port *usb2; in tegra186_usb3_phy_power_on() local
1254 unsigned int index = lane->index; in tegra186_usb3_phy_power_on()
1255 struct device *dev = padctl->dev; in tegra186_usb3_phy_power_on()
1261 return -ENODEV; in tegra186_usb3_phy_power_on()
1264 usb2 = tegra_xusb_find_usb2_port(padctl, port->port); in tegra186_usb3_phy_power_on()
1265 if (!usb2) { in tegra186_usb3_phy_power_on()
1268 return -ENODEV; in tegra186_usb3_phy_power_on()
1271 mutex_lock(&padctl->lock); in tegra186_usb3_phy_power_on()
1276 if (usb2->mode == USB_DR_MODE_UNKNOWN) in tegra186_usb3_phy_power_on()
1278 else if (usb2->mode == USB_DR_MODE_PERIPHERAL) in tegra186_usb3_phy_power_on()
1280 else if (usb2->mode == USB_DR_MODE_HOST) in tegra186_usb3_phy_power_on()
1282 else if (usb2->mode == USB_DR_MODE_OTG) in tegra186_usb3_phy_power_on()
1287 if (padctl->soc->supports_gen2 && port->disable_gen2) { in tegra186_usb3_phy_power_on()
1312 mutex_unlock(&padctl->lock); in tegra186_usb3_phy_power_on()
1320 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra186_usb3_phy_power_off()
1322 unsigned int index = lane->index; in tegra186_usb3_phy_power_off()
1323 struct device *dev = padctl->dev; in tegra186_usb3_phy_power_off()
1329 return -ENODEV; in tegra186_usb3_phy_power_off()
1332 mutex_lock(&padctl->lock); in tegra186_usb3_phy_power_off()
1350 mutex_unlock(&padctl->lock); in tegra186_usb3_phy_power_off()
1384 return ERR_PTR(-ENOMEM); in tegra186_usb3_pad_probe()
1386 pad = &usb3->base; in tegra186_usb3_pad_probe()
1387 pad->ops = &tegra186_usb3_lane_ops; in tegra186_usb3_pad_probe()
1388 pad->soc = soc; in tegra186_usb3_pad_probe()
1400 dev_set_drvdata(&pad->dev, pad); in tegra186_usb3_pad_probe()
1405 device_unregister(&pad->dev); in tegra186_usb3_pad_probe()
1412 struct tegra_xusb_usb2_pad *usb2 = to_usb2_pad(pad); in tegra186_usb3_pad_remove() local
1414 kfree(usb2); in tegra186_usb3_pad_remove()
1429 struct device *dev = padctl->base.dev; in tegra186_xusb_read_fuse_calibration()
1434 count = padctl->base.soc->ports.usb2.count; in tegra186_xusb_read_fuse_calibration()
1438 return -ENOMEM; in tegra186_xusb_read_fuse_calibration()
1451 padctl->calib.hs_curr_level = level; in tegra186_xusb_read_fuse_calibration()
1453 padctl->calib.hs_squelch = (value >> HS_SQUELCH_SHIFT) & in tegra186_xusb_read_fuse_calibration()
1455 padctl->calib.hs_term_range_adj = (value >> HS_TERM_RANGE_ADJ_SHIFT) & in tegra186_xusb_read_fuse_calibration()
1466 padctl->calib.rpd_ctrl = (value >> RPD_CTRL_SHIFT) & RPD_CTRL_MASK; in tegra186_xusb_read_fuse_calibration()
1482 return ERR_PTR(-ENOMEM); in tegra186_xusb_padctl_probe()
1484 priv->base.dev = dev; in tegra186_xusb_padctl_probe()
1485 priv->base.soc = soc; in tegra186_xusb_padctl_probe()
1488 priv->ao_regs = devm_ioremap_resource(dev, res); in tegra186_xusb_padctl_probe()
1489 if (IS_ERR(priv->ao_regs)) in tegra186_xusb_padctl_probe()
1490 return ERR_CAST(priv->ao_regs); in tegra186_xusb_padctl_probe()
1496 return &priv->base; in tegra186_xusb_padctl_probe()
1503 priv->context.vbus_id = padctl_readl(padctl, USB2_VBUS_ID); in tegra186_xusb_padctl_save()
1504 priv->context.usb2_pad_mux = padctl_readl(padctl, XUSB_PADCTL_USB2_PAD_MUX); in tegra186_xusb_padctl_save()
1505 priv->context.usb2_port_cap = padctl_readl(padctl, XUSB_PADCTL_USB2_PORT_CAP); in tegra186_xusb_padctl_save()
1506 priv->context.ss_port_cap = padctl_readl(padctl, XUSB_PADCTL_SS_PORT_CAP); in tegra186_xusb_padctl_save()
1513 padctl_writel(padctl, priv->context.usb2_pad_mux, XUSB_PADCTL_USB2_PAD_MUX); in tegra186_xusb_padctl_restore()
1514 padctl_writel(padctl, priv->context.usb2_port_cap, XUSB_PADCTL_USB2_PORT_CAP); in tegra186_xusb_padctl_restore()
1515 padctl_writel(padctl, priv->context.ss_port_cap, XUSB_PADCTL_SS_PORT_CAP); in tegra186_xusb_padctl_restore()
1516 padctl_writel(padctl, priv->context.vbus_id, USB2_VBUS_ID); in tegra186_xusb_padctl_restore()
1549 "avdd-pll-erefeut",
1550 "avdd-usb",
1551 "vclamp-usb",
1552 "vddio-hsic",
1556 TEGRA186_LANE("usb2-0", 0, 0, 0, usb2),
1557 TEGRA186_LANE("usb2-1", 0, 0, 0, usb2),
1558 TEGRA186_LANE("usb2-2", 0, 0, 0, usb2),
1562 .name = "usb2",
1569 TEGRA186_LANE("usb3-0", 0, 0, 0, usb3),
1570 TEGRA186_LANE("usb3-1", 0, 0, 0, usb3),
1571 TEGRA186_LANE("usb3-2", 0, 0, 0, usb3),
1593 .usb2 = {
1595 .count = 3,
1605 .count = 3,
1618 "avdd-usb",
1619 "vclamp-usb",
1623 TEGRA186_LANE("usb2-0", 0, 0, 0, usb2),
1624 TEGRA186_LANE("usb2-1", 0, 0, 0, usb2),
1625 TEGRA186_LANE("usb2-2", 0, 0, 0, usb2),
1626 TEGRA186_LANE("usb2-3", 0, 0, 0, usb2),
1630 .name = "usb2",
1637 TEGRA186_LANE("usb3-0", 0, 0, 0, usb3),
1638 TEGRA186_LANE("usb3-1", 0, 0, 0, usb3),
1639 TEGRA186_LANE("usb3-2", 0, 0, 0, usb3),
1640 TEGRA186_LANE("usb3-3", 0, 0, 0, usb3),
1659 .usb2 = {
1680 .usb2 = {