1 // SPDX-License-Identifier: GPL-2.0+
3  * DPHY TX driver for the StarFive JH7110 SoC
19 #include <linux/phy/phy-mipi-dphy.h>
212 static void stf_dphy_hw_reset(struct stf_dphy *dphy, int assert)  in stf_dphy_hw_reset()  argument
218 	       dphy->topsys + STF_DPHY_APBIFSAIF_SYSCFG(100));  in stf_dphy_hw_reset()
221 		rc = readl_poll_timeout_atomic(dphy->topsys +  in stf_dphy_hw_reset()
227 			dev_err(dphy->dev, "MIPI dphy-tx # PLL Locked\n");  in stf_dphy_hw_reset()
233 	struct stf_dphy *dphy = phy_get_drvdata(phy);  in stf_dphy_configure()  local
234 	const struct stf_dphy_info *info = dphy->info;  in stf_dphy_configure()
237 	u32 bitrate = opts->mipi_dphy.hs_clk_rate;  in stf_dphy_configure()
242 		bitrate += alignment - (bitrate % alignment);  in stf_dphy_configure()
246 	tmp = readl(dphy->topsys + STF_DPHY_APBIFSAIF_SYSCFG(100));  in stf_dphy_configure()
249 	writel(tmp, dphy->topsys + STF_DPHY_APBIFSAIF_SYSCFG(100));  in stf_dphy_configure()
253 	       dphy->topsys + STF_DPHY_APBIFSAIF_SYSCFG(8));  in stf_dphy_configure()
261 	       dphy->topsys + STF_DPHY_APBIFSAIF_SYSCFG(12));  in stf_dphy_configure()
265 	       dphy->topsys + STF_DPHY_APBIFSAIF_SYSCFG(16));  in stf_dphy_configure()
270 	       FIELD_PREP(STF_DPHY_CFG_L0_SWAP_SEL, info->maps[0]) |  in stf_dphy_configure()
271 	       FIELD_PREP(STF_DPHY_CFG_L1_SWAP_SEL, info->maps[1]) |  in stf_dphy_configure()
272 	       FIELD_PREP(STF_DPHY_CFG_L2_SWAP_SEL, info->maps[2]) |  in stf_dphy_configure()
273 	       FIELD_PREP(STF_DPHY_CFG_L3_SWAP_SEL, info->maps[3]) |  in stf_dphy_configure()
274 	       FIELD_PREP(STF_DPHY_CFG_L4_SWAP_SEL, info->maps[4]),  in stf_dphy_configure()
275 	       dphy->topsys + STF_DPHY_APBIFSAIF_SYSCFG(0));  in stf_dphy_configure()
279 	       dphy->topsys + STF_DPHY_APBIFSAIF_SYSCFG(28));  in stf_dphy_configure()
285 	       dphy->topsys + STF_DPHY_APBIFSAIF_SYSCFG(24));  in stf_dphy_configure()
291 	       dphy->topsys + STF_DPHY_APBIFSAIF_SYSCFG(20));  in stf_dphy_configure()
294 	       dphy->topsys + STF_DPHY_APBIFSAIF_SYSCFG(40));  in stf_dphy_configure()
300 	       dphy->topsys + STF_DPHY_APBIFSAIF_SYSCFG(36));  in stf_dphy_configure()
306 	       dphy->topsys + STF_DPHY_APBIFSAIF_SYSCFG(32));  in stf_dphy_configure()
313 	struct stf_dphy *dphy = phy_get_drvdata(phy);  in stf_dphy_init()  local
316 	stf_dphy_hw_reset(dphy, 1);  in stf_dphy_init()
320 	       dphy->topsys + STF_DPHY_APBIFSAIF_SYSCFG(48));  in stf_dphy_init()
323 	       dphy->topsys + STF_DPHY_APBIFSAIF_SYSCFG(44));  in stf_dphy_init()
325 	ret = clk_prepare_enable(dphy->txesc_clk);  in stf_dphy_init()
327 		dev_err(dphy->dev, "Failed to prepare/enable txesc_clk\n");  in stf_dphy_init()
331 	ret = reset_control_deassert(dphy->sys_rst);  in stf_dphy_init()
333 		dev_err(dphy->dev, "Failed to deassert sys_rst\n");  in stf_dphy_init()
342 	struct stf_dphy *dphy = phy_get_drvdata(phy);  in stf_dphy_exit()  local
345 	ret = reset_control_assert(dphy->sys_rst);  in stf_dphy_exit()
347 		dev_err(dphy->dev, "Failed to assert sys_rst\n");  in stf_dphy_exit()
351 	clk_disable_unprepare(dphy->txesc_clk);  in stf_dphy_exit()
353 	stf_dphy_hw_reset(dphy, 0);  in stf_dphy_exit()
360 	struct stf_dphy *dphy = phy_get_drvdata(phy);  in stf_dphy_power_on()  local
362 	return pm_runtime_resume_and_get(dphy->dev);  in stf_dphy_power_on()
369 		return -EINVAL;  in stf_dphy_validate()
376 	struct stf_dphy *dphy = phy_get_drvdata(phy);  in stf_dphy_power_off()  local
378 	return pm_runtime_put_sync(dphy->dev);  in stf_dphy_power_off()
394 	struct stf_dphy *dphy;  in stf_dphy_probe()  local
396 	dphy = devm_kzalloc(&pdev->dev, sizeof(*dphy), GFP_KERNEL);  in stf_dphy_probe()
397 	if (!dphy)  in stf_dphy_probe()
398 		return -ENOMEM;  in stf_dphy_probe()
400 	dphy->info = of_device_get_match_data(&pdev->dev);  in stf_dphy_probe()
402 	dphy->dev = &pdev->dev;  in stf_dphy_probe()
403 	dev_set_drvdata(&pdev->dev, dphy);  in stf_dphy_probe()
405 	dphy->topsys = devm_platform_ioremap_resource(pdev, 0);  in stf_dphy_probe()
406 	if (IS_ERR(dphy->topsys))  in stf_dphy_probe()
407 		return PTR_ERR(dphy->topsys);  in stf_dphy_probe()
409 	pm_runtime_enable(&pdev->dev);  in stf_dphy_probe()
411 	dphy->txesc_clk = devm_clk_get(&pdev->dev, "txesc");  in stf_dphy_probe()
412 	if (IS_ERR(dphy->txesc_clk))  in stf_dphy_probe()
413 		return dev_err_probe(&pdev->dev, PTR_ERR(dphy->txesc_clk),  in stf_dphy_probe()
416 	dphy->sys_rst = devm_reset_control_get_exclusive(&pdev->dev, "sys");  in stf_dphy_probe()
417 	if (IS_ERR(dphy->sys_rst))  in stf_dphy_probe()
418 		return dev_err_probe(&pdev->dev, PTR_ERR(dphy->sys_rst),  in stf_dphy_probe()
421 	dphy->phy = devm_phy_create(&pdev->dev, NULL, &stf_dphy_ops);  in stf_dphy_probe()
422 	if (IS_ERR(dphy->phy))  in stf_dphy_probe()
423 		return dev_err_probe(&pdev->dev, PTR_ERR(dphy->phy),  in stf_dphy_probe()
426 	phy_set_drvdata(dphy->phy, dphy);  in stf_dphy_probe()
428 	phy_provider = devm_of_phy_provider_register(&pdev->dev, of_phy_simple_xlate);  in stf_dphy_probe()
430 		return dev_err_probe(&pdev->dev, PTR_ERR(phy_provider),  in stf_dphy_probe()
442 		.compatible = "starfive,jh7110-dphy-tx",
451 		.name	= "starfive-dphy-tx",
460 MODULE_DESCRIPTION("StarFive JH7110 DPHY TX driver");