Lines Matching refs:MIPHY_CONF
66 #define MIPHY_CONF 0x0f macro
413 writeb_relaxed(0x00, base + MIPHY_CONF); in miphy28lp_pll_calibration()
434 writeb_relaxed(gen->bank, base + MIPHY_CONF); in miphy28lp_sata_config_gen()
461 writeb_relaxed(gen->bank, base + MIPHY_CONF); in miphy28lp_pcie_config_gen()
539 writeb_relaxed(0x00, base + MIPHY_CONF); in miphy28_usb3_miphy_reset()
542 writeb_relaxed(0x00, base + MIPHY_CONF); in miphy28_usb3_miphy_reset()
545 writeb_relaxed(0x00, base + MIPHY_CONF); in miphy28_usb3_miphy_reset()
567 writeb_relaxed(val, base + MIPHY_CONF); in miphy_sata_tune_ssc()
605 writeb_relaxed(val, base + MIPHY_CONF); in miphy_pcie_tune_ssc()
725 writeb_relaxed(0x00, base + MIPHY_CONF); in miphy28lp_configure_usb3()
762 writeb_relaxed(0x00, base + MIPHY_CONF); in miphy28lp_configure_usb3()