Lines Matching +full:hs +full:- +full:phy
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 * chromeos-4.4 branch.
14 * Jacob Chen <jacob2.chen@rock-chips.com>
15 * Shunqian Zheng <zhengsq@rock-chips.com>
24 #include <linux/phy/phy.h>
25 #include <linux/phy/phy-mipi-dphy.h>
64 "dphy-ref",
65 "dphy-cfg",
110 { .offset = _offset, .mask = BIT(_width) - 1, .shift = _shift, }
162 const struct dphy_reg *reg = &priv->drv_data->regs[index]; in rk_dphy_write_grf()
164 unsigned int val = (value << reg->shift) | in rk_dphy_write_grf()
165 (reg->mask << (reg->shift + 16)); in rk_dphy_write_grf()
167 if (WARN_ON(!reg->offset)) in rk_dphy_write_grf()
169 regmap_write(priv->grf, reg->offset, val); in rk_dphy_write_grf()
198 GENMASK(priv->config.lanes - 1, 0)); in rk_dphy_enable()
208 /* HS hsfreq_range & lane 0 settle bypass */ in rk_dphy_enable()
210 /* HS RX Control of lane0 */ in rk_dphy_enable()
211 rk_dphy_write(priv, LANE0_HS_RX_CONTROL, priv->hsfreq << 1); in rk_dphy_enable()
212 /* HS RX Control of lane1 */ in rk_dphy_enable()
213 rk_dphy_write(priv, LANE1_HS_RX_CONTROL, priv->hsfreq << 1); in rk_dphy_enable()
214 /* HS RX Control of lane2 */ in rk_dphy_enable()
215 rk_dphy_write(priv, LANE2_HS_RX_CONTROL, priv->hsfreq << 1); in rk_dphy_enable()
216 /* HS RX Control of lane3 */ in rk_dphy_enable()
217 rk_dphy_write(priv, LANE3_HS_RX_CONTROL, priv->hsfreq << 1); in rk_dphy_enable()
218 /* HS RX Data Lanes Settle State Time Control */ in rk_dphy_enable()
226 static int rk_dphy_configure(struct phy *phy, union phy_configure_opts *opts) in rk_dphy_configure() argument
228 struct rk_dphy *priv = phy_get_drvdata(phy); in rk_dphy_configure()
229 const struct rk_dphy_drv_data *drv_data = priv->drv_data; in rk_dphy_configure()
230 struct phy_configure_opts_mipi_dphy *config = &opts->mipi_dphy; in rk_dphy_configure()
241 data_rate_mbps = div_u64(config->hs_clk_rate, 1000 * 1000); in rk_dphy_configure()
243 dev_dbg(priv->dev, "lanes %d - data_rate_mbps %llu\n", in rk_dphy_configure()
244 config->lanes, data_rate_mbps); in rk_dphy_configure()
245 for (i = 0; i < drv_data->num_hsfreq_ranges; i++) { in rk_dphy_configure()
246 if (drv_data->hsfreq_ranges[i].range_h >= data_rate_mbps) { in rk_dphy_configure()
247 hsfreq = drv_data->hsfreq_ranges[i].cfg_bit; in rk_dphy_configure()
252 return -EINVAL; in rk_dphy_configure()
254 priv->hsfreq = hsfreq; in rk_dphy_configure()
255 priv->config = *config; in rk_dphy_configure()
259 static int rk_dphy_power_on(struct phy *phy) in rk_dphy_power_on() argument
261 struct rk_dphy *priv = phy_get_drvdata(phy); in rk_dphy_power_on()
264 ret = clk_bulk_enable(priv->drv_data->num_clks, priv->clks); in rk_dphy_power_on()
273 static int rk_dphy_power_off(struct phy *phy) in rk_dphy_power_off() argument
275 struct rk_dphy *priv = phy_get_drvdata(phy); in rk_dphy_power_off()
278 clk_bulk_disable(priv->drv_data->num_clks, priv->clks); in rk_dphy_power_off()
282 static int rk_dphy_init(struct phy *phy) in rk_dphy_init() argument
284 struct rk_dphy *priv = phy_get_drvdata(phy); in rk_dphy_init()
286 return clk_bulk_prepare(priv->drv_data->num_clks, priv->clks); in rk_dphy_init()
289 static int rk_dphy_exit(struct phy *phy) in rk_dphy_exit() argument
291 struct rk_dphy *priv = phy_get_drvdata(phy); in rk_dphy_exit()
293 clk_bulk_unprepare(priv->drv_data->num_clks, priv->clks); in rk_dphy_exit()
316 .compatible = "rockchip,rk3399-mipi-dphy-rx0",
325 struct device *dev = &pdev->dev; in rk_dphy_probe()
326 struct device_node *np = dev->of_node; in rk_dphy_probe()
330 struct phy *phy; in rk_dphy_probe() local
334 if (!dev->parent || !dev->parent->of_node) in rk_dphy_probe()
335 return -ENODEV; in rk_dphy_probe()
339 return -ENOMEM; in rk_dphy_probe()
340 priv->dev = dev; in rk_dphy_probe()
342 priv->grf = syscon_node_to_regmap(dev->parent->of_node); in rk_dphy_probe()
343 if (IS_ERR(priv->grf)) { in rk_dphy_probe()
345 return -ENODEV; in rk_dphy_probe()
349 priv->drv_data = drv_data; in rk_dphy_probe()
350 priv->clks = devm_kcalloc(&pdev->dev, drv_data->num_clks, in rk_dphy_probe()
351 sizeof(*priv->clks), GFP_KERNEL); in rk_dphy_probe()
352 if (!priv->clks) in rk_dphy_probe()
353 return -ENOMEM; in rk_dphy_probe()
354 for (i = 0; i < drv_data->num_clks; i++) in rk_dphy_probe()
355 priv->clks[i].id = drv_data->clks[i]; in rk_dphy_probe()
356 ret = devm_clk_bulk_get(&pdev->dev, drv_data->num_clks, priv->clks); in rk_dphy_probe()
360 phy = devm_phy_create(dev, np, &rk_dphy_ops); in rk_dphy_probe()
361 if (IS_ERR(phy)) { in rk_dphy_probe()
362 dev_err(dev, "failed to create phy\n"); in rk_dphy_probe()
363 return PTR_ERR(phy); in rk_dphy_probe()
365 phy_set_drvdata(phy, priv); in rk_dphy_probe()
375 .name = "rockchip-mipi-dphy-rx0",