1 // SPDX-License-Identifier: GPL-2.0+
3  * Mediatek MT7621 PCI PHY Driver
7 #include <dt-bindings/phy/phy.h>
66  * struct mt7621_pci_phy - Mt7621 Pcie PHY core
95 	 * pci setup. Avoid to mask 'set' before set value to 'val'  in mt7621_phy_rmw()
98 	regmap_read(phy->regmap, reg, &val);  in mt7621_phy_rmw()
101 	regmap_write(phy->regmap, reg, val);  in mt7621_phy_rmw()
109 	if (phy->has_dual_port) {  in mt7621_bypass_pipe_rst()
119 	struct device *dev = phy->dev;  in mt7621_set_phy_for_ssc()
122 	clk_rate = clk_get_rate(phy->sys_clk);  in mt7621_set_phy_for_ssc()
124 		return -EINVAL;  in mt7621_set_phy_for_ssc()
137 	if (phy->has_dual_port) {  in mt7621_set_phy_for_ssc()
143 		/* Set Pre-divider ratio (for host mode) */  in mt7621_set_phy_for_ssc()
214 	if (mphy->bypass_pipe_rst)  in mt7621_pci_phy_init()
228 	if (mphy->has_dual_port) {  in mt7621_pci_phy_power_on()
244 	if (mphy->has_dual_port) {  in mt7621_pci_phy_power_off()
270 	if (WARN_ON(args->args[0] >= MAX_PHYS))  in mt7621_pcie_phy_of_xlate()
271 		return ERR_PTR(-ENODEV);  in mt7621_pcie_phy_of_xlate()
273 	mt7621_phy->has_dual_port = args->args[0];  in mt7621_pcie_phy_of_xlate()
276 		mt7621_phy->port_base, mt7621_phy->has_dual_port);  in mt7621_pcie_phy_of_xlate()
278 	return mt7621_phy->phy;  in mt7621_pcie_phy_of_xlate()
282 	{ .soc_id = "mt7621", .revision = "E2" },
295 	struct device *dev = &pdev->dev;  in mt7621_pci_phy_probe()
302 		return -ENOMEM;  in mt7621_pci_phy_probe()
306 		phy->bypass_pipe_rst = true;  in mt7621_pci_phy_probe()
308 	phy->dev = dev;  in mt7621_pci_phy_probe()
311 	phy->port_base = devm_platform_ioremap_resource(pdev, 0);  in mt7621_pci_phy_probe()
312 	if (IS_ERR(phy->port_base)) {  in mt7621_pci_phy_probe()
314 		return PTR_ERR(phy->port_base);  in mt7621_pci_phy_probe()
317 	phy->regmap = devm_regmap_init_mmio(phy->dev, phy->port_base,  in mt7621_pci_phy_probe()
319 	if (IS_ERR(phy->regmap))  in mt7621_pci_phy_probe()
320 		return PTR_ERR(phy->regmap);  in mt7621_pci_phy_probe()
322 	phy->phy = devm_phy_create(dev, dev->of_node, &mt7621_pci_phy_ops);  in mt7621_pci_phy_probe()
323 	if (IS_ERR(phy->phy)) {  in mt7621_pci_phy_probe()
325 		return PTR_ERR(phy->phy);  in mt7621_pci_phy_probe()
328 	phy->sys_clk = devm_clk_get(dev, NULL);  in mt7621_pci_phy_probe()
329 	if (IS_ERR(phy->sys_clk)) {  in mt7621_pci_phy_probe()
331 		return PTR_ERR(phy->sys_clk);  in mt7621_pci_phy_probe()
334 	phy_set_drvdata(phy->phy, phy);  in mt7621_pci_phy_probe()
342 	{ .compatible = "mediatek,mt7621-pci-phy" },
350 		.name = "mt7621-pci-phy",
358 MODULE_DESCRIPTION("MediaTek MT7621 PCIe PHY driver");