21 #define HSIO_SD_CFG_PHY_RESET_SET(x)\  argument
23 #define HSIO_SD_CFG_PHY_RESET_GET(x)\  argument
27 #define HSIO_SD_CFG_TX_RESET_SET(x)\  argument
29 #define HSIO_SD_CFG_TX_RESET_GET(x)\  argument
33 #define HSIO_SD_CFG_TX_RATE_SET(x)\  argument
35 #define HSIO_SD_CFG_TX_RATE_GET(x)\  argument
39 #define HSIO_SD_CFG_TX_INVERT_SET(x)\  argument
41 #define HSIO_SD_CFG_TX_INVERT_GET(x)\  argument
45 #define HSIO_SD_CFG_TX_EN_SET(x)\  argument
47 #define HSIO_SD_CFG_TX_EN_GET(x)\  argument
51 #define HSIO_SD_CFG_TX_DATA_EN_SET(x)\  argument
53 #define HSIO_SD_CFG_TX_DATA_EN_GET(x)\  argument
57 #define HSIO_SD_CFG_TX_CM_EN_SET(x)\  argument
59 #define HSIO_SD_CFG_TX_CM_EN_GET(x)\  argument
63 #define HSIO_SD_CFG_LANE_10BIT_SEL_SET(x)\  argument
65 #define HSIO_SD_CFG_LANE_10BIT_SEL_GET(x)\  argument
69 #define HSIO_SD_CFG_RX_TERM_EN_SET(x)\  argument
71 #define HSIO_SD_CFG_RX_TERM_EN_GET(x)\  argument
75 #define HSIO_SD_CFG_RX_RESET_SET(x)\  argument
77 #define HSIO_SD_CFG_RX_RESET_GET(x)\  argument
81 #define HSIO_SD_CFG_RX_RATE_SET(x)\  argument
83 #define HSIO_SD_CFG_RX_RATE_GET(x)\  argument
87 #define HSIO_SD_CFG_RX_PLL_EN_SET(x)\  argument
89 #define HSIO_SD_CFG_RX_PLL_EN_GET(x)\  argument
93 #define HSIO_SD_CFG_RX_INVERT_SET(x)\  argument
95 #define HSIO_SD_CFG_RX_INVERT_GET(x)\  argument
99 #define HSIO_SD_CFG_RX_DATA_EN_SET(x)\  argument
101 #define HSIO_SD_CFG_RX_DATA_EN_GET(x)\  argument
105 #define HSIO_SD_CFG_LANE_LOOPBK_EN_SET(x)\  argument
107 #define HSIO_SD_CFG_LANE_LOOPBK_EN_GET(x)\  argument
114 #define HSIO_MPLL_CFG_REF_SSP_EN_SET(x)\  argument
116 #define HSIO_MPLL_CFG_REF_SSP_EN_GET(x)\  argument
120 #define HSIO_MPLL_CFG_REF_CLKDIV2_SET(x)\  argument
122 #define HSIO_MPLL_CFG_REF_CLKDIV2_GET(x)\  argument
126 #define HSIO_MPLL_CFG_MPLL_EN_SET(x)\  argument
128 #define HSIO_MPLL_CFG_MPLL_EN_GET(x)\  argument
132 #define HSIO_MPLL_CFG_MPLL_MULTIPLIER_SET(x)\  argument
134 #define HSIO_MPLL_CFG_MPLL_MULTIPLIER_GET(x)\  argument
141 #define HSIO_SD_STAT_MPLL_STATE_SET(x)\  argument
143 #define HSIO_SD_STAT_MPLL_STATE_GET(x)\  argument
147 #define HSIO_SD_STAT_TX_STATE_SET(x)\  argument
149 #define HSIO_SD_STAT_TX_STATE_GET(x)\  argument
153 #define HSIO_SD_STAT_TX_CM_STATE_SET(x)\  argument
155 #define HSIO_SD_STAT_TX_CM_STATE_GET(x)\  argument
159 #define HSIO_SD_STAT_RX_PLL_STATE_SET(x)\  argument
161 #define HSIO_SD_STAT_RX_PLL_STATE_GET(x)\  argument
168 #define HSIO_HW_CFG_RGMII_1_CFG_SET(x)\  argument
170 #define HSIO_HW_CFG_RGMII_1_CFG_GET(x)\  argument
174 #define HSIO_HW_CFG_RGMII_0_CFG_SET(x)\  argument
176 #define HSIO_HW_CFG_RGMII_0_CFG_GET(x)\  argument
180 #define HSIO_HW_CFG_RGMII_ENA_SET(x)\  argument
182 #define HSIO_HW_CFG_RGMII_ENA_GET(x)\  argument
186 #define HSIO_HW_CFG_SD6G_0_CFG_SET(x)\  argument
188 #define HSIO_HW_CFG_SD6G_0_CFG_GET(x)\  argument
192 #define HSIO_HW_CFG_SD6G_1_CFG_SET(x)\  argument
194 #define HSIO_HW_CFG_SD6G_1_CFG_GET(x)\  argument
198 #define HSIO_HW_CFG_GMII_ENA_SET(x)\  argument
200 #define HSIO_HW_CFG_GMII_ENA_GET(x)\  argument
204 #define HSIO_HW_CFG_QSGMII_ENA_SET(x)\  argument
206 #define HSIO_HW_CFG_QSGMII_ENA_GET(x)\  argument
213 #define HSIO_RGMII_CFG_TX_CLK_CFG_SET(x)\  argument
215 #define HSIO_RGMII_CFG_TX_CLK_CFG_GET(x)\  argument
219 #define HSIO_RGMII_CFG_RGMII_TX_RST_SET(x)\  argument
221 #define HSIO_RGMII_CFG_RGMII_TX_RST_GET(x)\  argument
225 #define HSIO_RGMII_CFG_RGMII_RX_RST_SET(x)\  argument
227 #define HSIO_RGMII_CFG_RGMII_RX_RST_GET(x)\  argument
234 #define HSIO_DLL_CFG_DELAY_ENA_SET(x)\  argument
236 #define HSIO_DLL_CFG_DELAY_ENA_GET(x)\  argument
240 #define HSIO_DLL_CFG_DLL_ENA_SET(x)\  argument
242 #define HSIO_DLL_CFG_DLL_ENA_GET(x)\  argument
246 #define HSIO_DLL_CFG_DLL_RST_SET(x)\  argument
248 #define HSIO_DLL_CFG_DLL_RST_GET(x)\  argument