700 	struct mtk_phy_instance *instance)  in hs_slew_rate_calibrate()  argument
702 	struct u2phy_banks *u2_banks = &instance->u2_banks;  in hs_slew_rate_calibrate()
714 	if (instance->eye_src)  in hs_slew_rate_calibrate()
729 		tmp |= FIELD_PREP(P2F_RG_MONCLK_SEL, instance->index >> 1);  in hs_slew_rate_calibrate()
758 		instance->index, fm_out, calibration_val,  in hs_slew_rate_calibrate()
770 	struct mtk_phy_instance *instance)  in u3_phy_instance_init()  argument
772 	struct u3phy_banks *u3_banks = &instance->u3_banks;  in u3_phy_instance_init()
776 	if (instance->type_force_mode) {  in u3_phy_instance_init()
815 	dev_dbg(tphy->dev, "%s(%d)\n", __func__, instance->index);  in u3_phy_instance_init()
819 	struct mtk_phy_instance *instance)  in u2_phy_pll_26m_set()  argument
821 	struct u2phy_banks *u2_banks = &instance->u2_banks;  in u2_phy_pll_26m_set()
838 	struct mtk_phy_instance *instance)  in u2_phy_instance_init()  argument
840 	struct u2phy_banks *u2_banks = &instance->u2_banks;  in u2_phy_instance_init()
842 	u32 index = instance->index;  in u2_phy_instance_init()
878 	u2_phy_pll_26m_set(tphy, instance);  in u2_phy_instance_init()
884 	struct mtk_phy_instance *instance)  in u2_phy_instance_power_on()  argument
886 	struct u2phy_banks *u2_banks = &instance->u2_banks;  in u2_phy_instance_power_on()
888 	u32 index = instance->index;  in u2_phy_instance_power_on()
906 	struct mtk_phy_instance *instance)  in u2_phy_instance_power_off()  argument
908 	struct u2phy_banks *u2_banks = &instance->u2_banks;  in u2_phy_instance_power_off()
910 	u32 index = instance->index;  in u2_phy_instance_power_off()
929 	struct mtk_phy_instance *instance)  in u2_phy_instance_exit()  argument
931 	struct u2phy_banks *u2_banks = &instance->u2_banks;  in u2_phy_instance_exit()
933 	u32 index = instance->index;  in u2_phy_instance_exit()
943 				     struct mtk_phy_instance *instance,  in u2_phy_instance_set_mode()  argument
946 	struct u2phy_banks *u2_banks = &instance->u2_banks;  in u2_phy_instance_set_mode()
968 	struct mtk_phy_instance *instance)  in pcie_phy_instance_init()  argument
970 	struct u3phy_banks *u3_banks = &instance->u3_banks;  in pcie_phy_instance_init()
1014 	dev_dbg(tphy->dev, "%s(%d)\n", __func__, instance->index);  in pcie_phy_instance_init()
1018 	struct mtk_phy_instance *instance)  in pcie_phy_instance_power_on()  argument
1020 	struct u3phy_banks *bank = &instance->u3_banks;  in pcie_phy_instance_power_on()
1030 	struct mtk_phy_instance *instance)  in pcie_phy_instance_power_off()  argument
1033 	struct u3phy_banks *bank = &instance->u3_banks;  in pcie_phy_instance_power_off()
1043 	struct mtk_phy_instance *instance)  in sata_phy_instance_init()  argument
1045 	struct u3phy_banks *u3_banks = &instance->u3_banks;  in sata_phy_instance_init()
1084 	dev_dbg(tphy->dev, "%s(%d)\n", __func__, instance->index);  in sata_phy_instance_init()
1088 			      struct mtk_phy_instance *instance)  in phy_v1_banks_init()  argument
1090 	struct u2phy_banks *u2_banks = &instance->u2_banks;  in phy_v1_banks_init()
1091 	struct u3phy_banks *u3_banks = &instance->u3_banks;  in phy_v1_banks_init()
1093 	switch (instance->type) {  in phy_v1_banks_init()
1097 		u2_banks->com = instance->port_base + SSUSB_SIFSLV_V1_U2PHY_COM;  in phy_v1_banks_init()
1103 		u3_banks->phyd = instance->port_base + SSUSB_SIFSLV_V1_U3PHYD;  in phy_v1_banks_init()
1104 		u3_banks->phya = instance->port_base + SSUSB_SIFSLV_V1_U3PHYA;  in phy_v1_banks_init()
1107 		u3_banks->phyd = instance->port_base + SSUSB_SIFSLV_V1_U3PHYD;  in phy_v1_banks_init()
1116 			      struct mtk_phy_instance *instance)  in phy_v2_banks_init()  argument
1118 	struct u2phy_banks *u2_banks = &instance->u2_banks;  in phy_v2_banks_init()
1119 	struct u3phy_banks *u3_banks = &instance->u3_banks;  in phy_v2_banks_init()
1121 	switch (instance->type) {  in phy_v2_banks_init()
1123 		u2_banks->misc = instance->port_base + SSUSB_SIFSLV_V2_MISC;  in phy_v2_banks_init()
1124 		u2_banks->fmreg = instance->port_base + SSUSB_SIFSLV_V2_U2FREQ;  in phy_v2_banks_init()
1125 		u2_banks->com = instance->port_base + SSUSB_SIFSLV_V2_U2PHY_COM;  in phy_v2_banks_init()
1129 		u3_banks->spllc = instance->port_base + SSUSB_SIFSLV_V2_SPLLC;  in phy_v2_banks_init()
1130 		u3_banks->chip = instance->port_base + SSUSB_SIFSLV_V2_CHIP;  in phy_v2_banks_init()
1131 		u3_banks->phyd = instance->port_base + SSUSB_SIFSLV_V2_U3PHYD;  in phy_v2_banks_init()
1132 		u3_banks->phya = instance->port_base + SSUSB_SIFSLV_V2_U3PHYA;  in phy_v2_banks_init()
1141 				struct mtk_phy_instance *instance)  in phy_parse_property()  argument
1143 	struct device *dev = &instance->phy->dev;  in phy_parse_property()
1145 	if (instance->type == PHY_TYPE_USB3)  in phy_parse_property()
1146 		instance->type_force_mode = device_property_read_bool(dev, "mediatek,force-mode");  in phy_parse_property()
1148 	if (instance->type != PHY_TYPE_USB2)  in phy_parse_property()
1151 	instance->bc12_en = device_property_read_bool(dev, "mediatek,bc12");  in phy_parse_property()
1153 				 &instance->eye_src);  in phy_parse_property()
1155 				 &instance->eye_vrt);  in phy_parse_property()
1157 				 &instance->eye_term);  in phy_parse_property()
1159 				 &instance->intr);  in phy_parse_property()
1161 				 &instance->discth);  in phy_parse_property()
1163 				 &instance->pre_emphasis);  in phy_parse_property()
1165 		instance->bc12_en, instance->eye_src,  in phy_parse_property()
1166 		instance->eye_vrt, instance->eye_term,  in phy_parse_property()
1167 		instance->intr, instance->discth);  in phy_parse_property()
1168 	dev_dbg(dev, "pre-emp:%d\n", instance->pre_emphasis);  in phy_parse_property()
1172 			     struct mtk_phy_instance *instance)  in u2_phy_props_set()  argument
1174 	struct u2phy_banks *u2_banks = &instance->u2_banks;  in u2_phy_props_set()
1177 	if (instance->bc12_en) /* BC1.2 path Enable */  in u2_phy_props_set()
1180 	if (tphy->pdata->version < MTK_PHY_V3 && instance->eye_src)  in u2_phy_props_set()
1182 				     instance->eye_src);  in u2_phy_props_set()
1184 	if (instance->eye_vrt)  in u2_phy_props_set()
1186 				     instance->eye_vrt);  in u2_phy_props_set()
1188 	if (instance->eye_term)  in u2_phy_props_set()
1190 				     instance->eye_term);  in u2_phy_props_set()
1192 	if (instance->intr) {  in u2_phy_props_set()
1198 				     instance->intr);  in u2_phy_props_set()
1201 	if (instance->discth)  in u2_phy_props_set()
1203 				     instance->discth);  in u2_phy_props_set()
1205 	if (instance->pre_emphasis)  in u2_phy_props_set()
1207 				     instance->pre_emphasis);  in u2_phy_props_set()
1211 static int phy_type_syscon_get(struct mtk_phy_instance *instance,  in phy_type_syscon_get()  argument
1226 	instance->type_sw_reg = args.args[0];  in phy_type_syscon_get()
1227 	instance->type_sw_index = args.args[1] & 0x3; /* <=3 */  in phy_type_syscon_get()
1228 	instance->type_sw = syscon_node_to_regmap(args.np);  in phy_type_syscon_get()
1230 	dev_info(&instance->phy->dev, "type_sw - reg %#x, index %d\n",  in phy_type_syscon_get()
1231 		 instance->type_sw_reg, instance->type_sw_index);  in phy_type_syscon_get()
1233 	return PTR_ERR_OR_ZERO(instance->type_sw);  in phy_type_syscon_get()
1236 static int phy_type_set(struct mtk_phy_instance *instance)  in phy_type_set()  argument
1241 	if (!instance->type_sw)  in phy_type_set()
1244 	switch (instance->type) {  in phy_type_set()
1262 	offset = instance->type_sw_index * BITS_PER_BYTE;  in phy_type_set()
1263 	regmap_update_bits(instance->type_sw, instance->type_sw_reg,  in phy_type_set()
1269 static int phy_efuse_get(struct mtk_tphy *tphy, struct mtk_phy_instance *instance)  in phy_efuse_get()  argument
1271 	struct device *dev = &instance->phy->dev;  in phy_efuse_get()
1276 		instance->efuse_sw_en = 0;  in phy_efuse_get()
1281 	instance->efuse_sw_en = device_property_read_bool(dev, "nvmem-cells");  in phy_efuse_get()
1282 	if (!instance->efuse_sw_en)  in phy_efuse_get()
1285 	switch (instance->type) {  in phy_efuse_get()
1287 		ret = nvmem_cell_read_variable_le_u32(dev, "intr", &instance->efuse_intr);  in phy_efuse_get()
1294 		if (!instance->efuse_intr) {  in phy_efuse_get()
1296 			instance->efuse_sw_en = 0;  in phy_efuse_get()
1300 		dev_dbg(dev, "u2 efuse - intr %x\n", instance->efuse_intr);  in phy_efuse_get()
1305 		ret = nvmem_cell_read_variable_le_u32(dev, "intr", &instance->efuse_intr);  in phy_efuse_get()
1311 		ret = nvmem_cell_read_variable_le_u32(dev, "rx_imp", &instance->efuse_rx_imp);  in phy_efuse_get()
1317 		ret = nvmem_cell_read_variable_le_u32(dev, "tx_imp", &instance->efuse_tx_imp);  in phy_efuse_get()
1324 		if (!instance->efuse_intr &&  in phy_efuse_get()
1325 		    !instance->efuse_rx_imp &&  in phy_efuse_get()
1326 		    !instance->efuse_tx_imp) {  in phy_efuse_get()
1328 			instance->efuse_sw_en = 0;  in phy_efuse_get()
1333 			instance->efuse_intr, instance->efuse_rx_imp,instance->efuse_tx_imp);  in phy_efuse_get()
1336 		dev_err(dev, "no sw efuse for type %d\n", instance->type);  in phy_efuse_get()
1343 static void phy_efuse_set(struct mtk_phy_instance *instance)  in phy_efuse_set()  argument
1345 	struct device *dev = &instance->phy->dev;  in phy_efuse_set()
1346 	struct u2phy_banks *u2_banks = &instance->u2_banks;  in phy_efuse_set()
1347 	struct u3phy_banks *u3_banks = &instance->u3_banks;  in phy_efuse_set()
1349 	if (!instance->efuse_sw_en)  in phy_efuse_set()
1352 	switch (instance->type) {  in phy_efuse_set()
1357 				     instance->efuse_intr);  in phy_efuse_set()
1364 				    instance->efuse_tx_imp);  in phy_efuse_set()
1368 				    instance->efuse_rx_imp);  in phy_efuse_set()
1372 				    instance->efuse_intr);  in phy_efuse_set()
1375 		dev_warn(dev, "no sw efuse for type %d\n", instance->type);  in phy_efuse_set()
1382 	struct mtk_phy_instance *instance = phy_get_drvdata(phy);  in mtk_phy_init()  local
1386 	ret = clk_bulk_prepare_enable(TPHY_CLKS_CNT, instance->clks);  in mtk_phy_init()
1390 	phy_efuse_set(instance);  in mtk_phy_init()
1392 	switch (instance->type) {  in mtk_phy_init()
1394 		u2_phy_instance_init(tphy, instance);  in mtk_phy_init()
1395 		u2_phy_props_set(tphy, instance);  in mtk_phy_init()
1398 		u3_phy_instance_init(tphy, instance);  in mtk_phy_init()
1401 		pcie_phy_instance_init(tphy, instance);  in mtk_phy_init()
1404 		sata_phy_instance_init(tphy, instance);  in mtk_phy_init()
1411 		clk_bulk_disable_unprepare(TPHY_CLKS_CNT, instance->clks);  in mtk_phy_init()
1420 	struct mtk_phy_instance *instance = phy_get_drvdata(phy);  in mtk_phy_power_on()  local
1423 	if (instance->type == PHY_TYPE_USB2) {  in mtk_phy_power_on()
1424 		u2_phy_instance_power_on(tphy, instance);  in mtk_phy_power_on()
1425 		hs_slew_rate_calibrate(tphy, instance);  in mtk_phy_power_on()
1426 	} else if (instance->type == PHY_TYPE_PCIE) {  in mtk_phy_power_on()
1427 		pcie_phy_instance_power_on(tphy, instance);  in mtk_phy_power_on()
1435 	struct mtk_phy_instance *instance = phy_get_drvdata(phy);  in mtk_phy_power_off()  local
1438 	if (instance->type == PHY_TYPE_USB2)  in mtk_phy_power_off()
1439 		u2_phy_instance_power_off(tphy, instance);  in mtk_phy_power_off()
1440 	else if (instance->type == PHY_TYPE_PCIE)  in mtk_phy_power_off()
1441 		pcie_phy_instance_power_off(tphy, instance);  in mtk_phy_power_off()
1448 	struct mtk_phy_instance *instance = phy_get_drvdata(phy);  in mtk_phy_exit()  local
1451 	if (instance->type == PHY_TYPE_USB2)  in mtk_phy_exit()
1452 		u2_phy_instance_exit(tphy, instance);  in mtk_phy_exit()
1454 	clk_bulk_disable_unprepare(TPHY_CLKS_CNT, instance->clks);  in mtk_phy_exit()
1460 	struct mtk_phy_instance *instance = phy_get_drvdata(phy);  in mtk_phy_set_mode()  local
1463 	if (instance->type == PHY_TYPE_USB2)  in mtk_phy_set_mode()
1464 		u2_phy_instance_set_mode(tphy, instance, mode);  in mtk_phy_set_mode()
1473 	struct mtk_phy_instance *instance = NULL;  in mtk_phy_xlate()  local
1485 			instance = tphy->phys[index];  in mtk_phy_xlate()
1489 	if (!instance) {  in mtk_phy_xlate()
1494 	instance->type = args->args[0];  in mtk_phy_xlate()
1495 	if (!(instance->type == PHY_TYPE_USB2 ||  in mtk_phy_xlate()
1496 	      instance->type == PHY_TYPE_USB3 ||  in mtk_phy_xlate()
1497 	      instance->type == PHY_TYPE_PCIE ||  in mtk_phy_xlate()
1498 	      instance->type == PHY_TYPE_SATA ||  in mtk_phy_xlate()
1499 	      instance->type == PHY_TYPE_SGMII)) {  in mtk_phy_xlate()
1500 		dev_err(dev, "unsupported device type: %d\n", instance->type);  in mtk_phy_xlate()
1506 		phy_v1_banks_init(tphy, instance);  in mtk_phy_xlate()
1510 		phy_v2_banks_init(tphy, instance);  in mtk_phy_xlate()
1517 	ret = phy_efuse_get(tphy, instance);  in mtk_phy_xlate()
1521 	phy_parse_property(tphy, instance);  in mtk_phy_xlate()
1522 	phy_type_set(instance);  in mtk_phy_xlate()
1523 	phy_debugfs_init(instance);  in mtk_phy_xlate()
1525 	return instance->phy;  in mtk_phy_xlate()
1626 		struct mtk_phy_instance *instance;  in mtk_tphy_probe()  local
1632 		instance = devm_kzalloc(dev, sizeof(*instance), GFP_KERNEL);  in mtk_tphy_probe()
1633 		if (!instance)  in mtk_tphy_probe()
1636 		tphy->phys[port] = instance;  in mtk_tphy_probe()
1652 		instance->port_base = devm_ioremap_resource(subdev, &res);  in mtk_tphy_probe()
1653 		if (IS_ERR(instance->port_base))  in mtk_tphy_probe()
1654 			return PTR_ERR(instance->port_base);  in mtk_tphy_probe()
1656 		instance->phy = phy;  in mtk_tphy_probe()
1657 		instance->index = port;  in mtk_tphy_probe()
1658 		phy_set_drvdata(phy, instance);  in mtk_tphy_probe()
1661 		clks = instance->clks;  in mtk_tphy_probe()
1668 		retval = phy_type_syscon_get(instance, child_np);  in mtk_tphy_probe()