299 	void __iomem *fmreg;  member
703 	void __iomem *fmreg = u2_banks->fmreg;  in hs_slew_rate_calibrate()  local
722 	mtk_phy_set_bits(fmreg + U3P_U2FREQ_FMMONR1, P2F_RG_FRCK_EN);  in hs_slew_rate_calibrate()
725 	tmp = readl(fmreg + U3P_U2FREQ_FMCR0);  in hs_slew_rate_calibrate()
731 	writel(tmp, fmreg + U3P_U2FREQ_FMCR0);  in hs_slew_rate_calibrate()
734 	mtk_phy_set_bits(fmreg + U3P_U2FREQ_FMCR0, P2F_RG_FREQDET_EN);  in hs_slew_rate_calibrate()
737 	readl_poll_timeout(fmreg + U3P_U2FREQ_FMMONR1, tmp,  in hs_slew_rate_calibrate()
740 	fm_out = readl(fmreg + U3P_U2FREQ_VALUE);  in hs_slew_rate_calibrate()
743 	mtk_phy_clear_bits(fmreg + U3P_U2FREQ_FMCR0, P2F_RG_FREQDET_EN);  in hs_slew_rate_calibrate()
746 	mtk_phy_clear_bits(fmreg + U3P_U2FREQ_FMMONR1, P2F_RG_FRCK_EN);  in hs_slew_rate_calibrate()
1096 		u2_banks->fmreg = tphy->sif_base + SSUSB_SIFSLV_V1_U2FREQ;  in phy_v1_banks_init()
1124 		u2_banks->fmreg = instance->port_base + SSUSB_SIFSLV_V2_U2FREQ;  in phy_v2_banks_init()