Lines Matching +full:300 +full:ma
313 * data channel bias 24mA, clock channel bias 20mA in mtk_hdmi_pll_drv_setting()
314 * pixel clk >= HD, 74.175MHZ <= pixel clk <= 300MHZ: in mtk_hdmi_pll_drv_setting()
316 * data channel 20mA, clock channel 16mA in mtk_hdmi_pll_drv_setting()
318 * data channel & clock channel bias 10mA in mtk_hdmi_pll_drv_setting()
321 /* 3G < data rate <= 6G, 300M < tmds rate <= 594M */ in mtk_hdmi_pll_drv_setting()
322 if (tmds_clk > 300 * MEGA && tmds_clk <= 594 * MEGA) { in mtk_hdmi_pll_drv_setting()
323 data_channel_bias = 0x3c; /* 24mA */ in mtk_hdmi_pll_drv_setting()
324 clk_channel_bias = 0x34; /* 20mA */ in mtk_hdmi_pll_drv_setting()
327 } else if (((u64)pixel_clk * 1000) >= 74175 * MEGA && pixel_clk <= 300 * MEGA) { in mtk_hdmi_pll_drv_setting()
328 data_channel_bias = 0x34; /* 20mA */ in mtk_hdmi_pll_drv_setting()
329 clk_channel_bias = 0x2c; /* 16mA */ in mtk_hdmi_pll_drv_setting()
333 data_channel_bias = 0x14; /* 10mA */ in mtk_hdmi_pll_drv_setting()
334 clk_channel_bias = 0x14; /* 10mA */ in mtk_hdmi_pll_drv_setting()