Lines Matching +full:4 +full:- +full:lane

1 // SPDX-License-Identifier: GPL-2.0
47 struct a38x_comphy_lane lane[MAX_A38X_COMPHY]; member
52 * row index = serdes lane,
57 { 4, 5, 0 },
58 { 0, 4, 0 },
59 { 0, 0, 4 },
64 static void a38x_set_conf(struct a38x_comphy_lane *lane, bool enable) in a38x_set_conf() argument
66 struct a38x_comphy *priv = lane->priv; in a38x_set_conf()
69 if (priv->conf) { in a38x_set_conf()
70 conf = readl_relaxed(priv->conf); in a38x_set_conf()
72 conf |= BIT(lane->port); in a38x_set_conf()
74 conf &= ~BIT(lane->port); in a38x_set_conf()
75 writel(conf, priv->conf); in a38x_set_conf()
79 static void a38x_comphy_set_reg(struct a38x_comphy_lane *lane, in a38x_comphy_set_reg() argument
84 val = readl_relaxed(lane->base + offset) & ~mask; in a38x_comphy_set_reg()
85 writel(val | value, lane->base + offset); in a38x_comphy_set_reg()
88 static void a38x_comphy_set_speed(struct a38x_comphy_lane *lane, in a38x_comphy_set_speed() argument
91 a38x_comphy_set_reg(lane, COMPHY_CFG1, in a38x_comphy_set_speed()
97 static int a38x_comphy_poll(struct a38x_comphy_lane *lane, in a38x_comphy_poll() argument
103 ret = readl_relaxed_poll_timeout_atomic(lane->base + offset, val, in a38x_comphy_poll()
108 dev_err(lane->priv->dev, in a38x_comphy_poll()
109 "comphy%u: timed out waiting for status\n", lane->n); in a38x_comphy_poll()
120 struct a38x_comphy_lane *lane = phy_get_drvdata(phy); in a38x_comphy_set_mode() local
125 return -EINVAL; in a38x_comphy_set_mode()
138 return -EINVAL; in a38x_comphy_set_mode()
141 a38x_set_conf(lane, false); in a38x_comphy_set_mode()
143 a38x_comphy_set_speed(lane, gen, gen); in a38x_comphy_set_mode()
145 ret = a38x_comphy_poll(lane, COMPHY_STAT1, in a38x_comphy_set_mode()
152 a38x_set_conf(lane, true); in a38x_comphy_set_mode()
165 struct a38x_comphy_lane *lane; in a38x_comphy_xlate() local
169 if (WARN_ON(args->args[0] >= MAX_A38X_PORTS)) in a38x_comphy_xlate()
170 return ERR_PTR(-EINVAL); in a38x_comphy_xlate()
176 lane = phy_get_drvdata(phy); in a38x_comphy_xlate()
177 if (lane->port >= 0) in a38x_comphy_xlate()
178 return ERR_PTR(-EBUSY); in a38x_comphy_xlate()
180 lane->port = args->args[0]; in a38x_comphy_xlate()
182 val = readl_relaxed(lane->priv->base + COMPHY_SELECTOR); in a38x_comphy_xlate()
183 val = (val >> (4 * lane->n)) & 0xf; in a38x_comphy_xlate()
185 if (!gbe_mux[lane->n][lane->port] || in a38x_comphy_xlate()
186 val != gbe_mux[lane->n][lane->port]) { in a38x_comphy_xlate()
187 dev_warn(lane->priv->dev, in a38x_comphy_xlate()
188 "comphy%u: not configured for GBE\n", lane->n); in a38x_comphy_xlate()
189 phy = ERR_PTR(-EINVAL); in a38x_comphy_xlate()
203 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); in a38x_comphy_probe()
205 return -ENOMEM; in a38x_comphy_probe()
211 priv->dev = &pdev->dev; in a38x_comphy_probe()
212 priv->base = base; in a38x_comphy_probe()
217 priv->conf = devm_ioremap_resource(&pdev->dev, res); in a38x_comphy_probe()
218 if (IS_ERR(priv->conf)) in a38x_comphy_probe()
219 return PTR_ERR(priv->conf); in a38x_comphy_probe()
222 for_each_available_child_of_node(pdev->dev.of_node, child) { in a38x_comphy_probe()
229 dev_err(&pdev->dev, "missing 'reg' property (%d)\n", in a38x_comphy_probe()
234 if (val >= MAX_A38X_COMPHY || priv->lane[val].base) { in a38x_comphy_probe()
235 dev_err(&pdev->dev, "invalid 'reg' property\n"); in a38x_comphy_probe()
239 phy = devm_phy_create(&pdev->dev, child, &a38x_comphy_ops); in a38x_comphy_probe()
245 priv->lane[val].base = base + 0x28 * val; in a38x_comphy_probe()
246 priv->lane[val].priv = priv; in a38x_comphy_probe()
247 priv->lane[val].n = val; in a38x_comphy_probe()
248 priv->lane[val].port = -1; in a38x_comphy_probe()
249 phy_set_drvdata(phy, &priv->lane[val]); in a38x_comphy_probe()
252 dev_set_drvdata(&pdev->dev, priv); in a38x_comphy_probe()
254 provider = devm_of_phy_provider_register(&pdev->dev, a38x_comphy_xlate); in a38x_comphy_probe()
260 { .compatible = "marvell,armada-380-comphy" },
268 .name = "armada-38x-comphy",