21 #define SCTRL_SCDEEPSLEEPED		(0x0)
24 #define PERI_CRG_PEREN0			(0x00)
25 #define PERI_CRG_PERDIS0		(0x04)
26 #define PERI_CRG_PEREN4			(0x40)
27 #define PERI_CRG_PERDIS4		(0x44)
28 #define PERI_CRG_PERRSTEN4		(0x90)
29 #define PERI_CRG_PERRSTDIS4		(0x94)
30 #define PERI_CRG_ISODIS			(0x148)
31 #define PERI_CRG_PEREN6			(0x410)
32 #define PERI_CRG_PERDIS6		(0x414)
38 #define PCTRL_PERI_CTRL3		(0x10)
42 #define PCTRL_PERI_CTRL24		(0x64)
45 #define USB3OTG_CTRL0			(0x00)
46 #define USB3OTG_CTRL3			(0x0c)
47 #define USB3OTG_CTRL4			(0x10)
48 #define USB3OTG_CTRL5			(0x14)
49 #define USB3OTG_CTRL7			(0x1c)
50 #define USB_MISC_CFG50			(0x50)
51 #define USB_MISC_CFG54			(0x54)
52 #define USB_MISC_CFG58			(0x58)
53 #define USB_MISC_CFG5C			(0x5c)
54 #define USB_MISC_CFGA0			(0xa0)
55 #define TCA_CLK_RST			(0x200)
56 #define TCA_INTR_EN			(0x204)
57 #define TCA_INTR_STS			(0x208)
58 #define TCA_GCFG			(0x210)
59 #define TCA_TCPC			(0x214)
60 #define TCA_SYSMODE_CFG			(0x218)
61 #define TCA_VBUS_CTRL			(0x240)
69 #define CTRL5_USB2_SIDDQ		BIT(0)
97 #define CFGA0_USB2PHY_POR		BIT(0)
100 #define INTR_EN_XA_ACK_EVT_EN		BIT(0)
103 #define CLK_RST_SUSPEND_CLK_EN		BIT(0)
106 #define GCFG_OP_MODE			GENMASK(1, 0)
107 #define GCFG_OP_MODE_CTRL_SYNC_MODE	BIT(0)
111 #define TCPC_MUX_CONTROL_MASK		GENMASK(1, 0)
112 #define TCPC_MUX_CONTROL_USB31		BIT(0)
117 #define VBUS_CTRL_VBUSVALID_OVERRD	GENMASK(1, 0)
119 #define KIRIN970_USB_DEFAULT_PHY_PARAM	(0xfdfee4)
120 #define KIRIN970_USB_DEFAULT_PHY_VBOOST	(0x5)
122 #define TX_VBOOST_LVL_REG		(0xf)
153 				  CFG54_USB31PHY_CR_CLK, 0);  in hi3670_phy_cr_clk()
181 				  CFG54_USB31PHY_CR_RD_EN | CFG54_USB31PHY_CR_WR_EN, 0);  in hi3670_phy_cr_start()
190 	while (retry-- > 0) {  in hi3670_phy_cr_wait_ack()
195 			return 0;  in hi3670_phy_cr_wait_ack()
226 	for (i = 0; i < 100; i++) {  in hi3670_phy_cr_read()
240 	ret = hi3670_phy_cr_start(usb31misc, 0);  in hi3670_phy_cr_read()
254 	return 0;  in hi3670_phy_cr_read()
262 	for (i = 0; i < 100; i++) {  in hi3670_phy_cr_write()
301 	while (retry-- > 0) {  in hi3670_phy_set_params()
337 	if ((reg & USB_CLK_SELECTED) == 0)  in hi3670_is_abbclk_selected()
363 					 PCTRL_PERI_CTRL24, mask, 0);  in hi3670_config_phy_clock()
368 					 CFGA0_USB2PHY_REFCLK_SELECT, 0);  in hi3670_config_phy_clock()
381 		return 0;  in hi3670_config_phy_clock()
410 	return 0;  in hi3670_config_phy_clock()
421 	ret = regmap_write(priv->usb31misc, TCA_INTR_STS, 0xffff);  in hi3670_config_tca()
431 	ret = regmap_update_bits(priv->usb31misc, TCA_CLK_RST, mask, 0);  in hi3670_config_tca()
442 				 SYSMODE_CFG_TYPEC_DISABLE, 0);  in hi3670_config_tca()
460 	return 0;  in hi3670_config_tca()
475 	ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFGA0, val, 0);  in hi3670_phy_init()
485 				 CTRL5_USB2_SIDDQ, 0);  in hi3670_phy_init()
491 				 CFG50_USB3_PHY_TEST_POWERDOWN, 0);  in hi3670_phy_init()
547 	return 0;  in hi3670_phy_init()
561 	ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFGA0, mask, 0);  in hi3670_phy_exit()
576 	return 0;  in hi3670_phy_exit()