17 #define PHY_REG_00		0x00
18 #define PHY_REG_01		0x04
19 #define PHY_REG_02		0x08
20 #define PHY_REG_08		0x20
21 #define PHY_REG_09		0x24
22 #define PHY_REG_10		0x28
23 #define PHY_REG_11		0x2c
25 #define PHY_REG_12		0x30
28 #define PHY_REG_13		0x34
29 #define  REG13_TG_CODE_LOW_MASK	GENMASK(7, 0)
31 #define PHY_REG_14		0x38
34 #define  REG14_TG_CODE_HIGH_MASK	GENMASK(0, 0)
36 #define PHY_REG_15		0x3c
37 #define PHY_REG_16		0x40
38 #define PHY_REG_17		0x44
39 #define PHY_REG_18		0x48
40 #define PHY_REG_19		0x4c
41 #define PHY_REG_20		0x50
43 #define PHY_REG_21		0x54
45 #define  REG21_PMS_S_MASK	GENMASK(3, 0)
47 #define PHY_REG_22		0x58
48 #define PHY_REG_23		0x5c
49 #define PHY_REG_24		0x60
50 #define PHY_REG_25		0x64
51 #define PHY_REG_26		0x68
52 #define PHY_REG_27		0x6c
53 #define PHY_REG_28		0x70
54 #define PHY_REG_29		0x74
55 #define PHY_REG_30		0x78
56 #define PHY_REG_31		0x7c
57 #define PHY_REG_32		0x80
65 #define PHY_REG_33		0x84
69 #define PHY_REG_34		0x88
74 #define PHY_REG_35		0x8c
75 #define PHY_REG_36		0x90
76 #define PHY_REG_37		0x94
77 #define PHY_REG_38		0x98
78 #define PHY_REG_39		0x9c
79 #define PHY_REG_40		0xa0
80 #define PHY_REG_41		0xa4
81 #define PHY_REG_42		0xa8
82 #define PHY_REG_43		0xac
83 #define PHY_REG_44		0xb0
84 #define PHY_REG_45		0xb4
85 #define PHY_REG_46		0xb8
86 #define PHY_REG_47		0xbc
98 		.pll_div_regs = { 0x4b, 0xf1, 0x89, 0x88, 0x80, 0x40 },
101 		.pll_div_regs = { 0x50, 0xf1, 0x86, 0x85, 0x80, 0x40 },
104 		.pll_div_regs = { 0x50, 0xf0, 0x00, 0x00, 0x80, 0x00 },
107 		.pll_div_regs = { 0x50, 0xf1, 0x99, 0x02, 0x80, 0x40 },
110 		.pll_div_regs = { 0x54, 0xfc, 0xcc, 0x91, 0x80, 0x40 },
113 		.pll_div_regs = { 0x54, 0xf0, 0x00, 0x00, 0x80, 0x00 },
116 		.pll_div_regs = { 0x5a, 0xf2, 0x89, 0x88, 0x80, 0x40 },
119 		.pll_div_regs = { 0x5a, 0xf0, 0x00, 0x00, 0x80, 0x00 },
122 		.pll_div_regs = { 0x5a, 0xf2, 0xfd, 0x0c, 0x80, 0x40 },
125 		.pll_div_regs = { 0x62, 0xf4, 0x95, 0x08, 0x80, 0x40 },
128 		.pll_div_regs = { 0x66, 0xf4, 0x82, 0x01, 0x88, 0x45 },
131 		.pll_div_regs = { 0x66, 0xf4, 0x99, 0x18, 0x88, 0x45 },
134 		.pll_div_regs = { 0x70, 0xf4, 0x82, 0x01, 0x80, 0x40 },
137 		.pll_div_regs = { 0x58, 0xb8, 0x8b, 0x88, 0x80, 0x40 },
140 		.pll_div_regs = { 0x5a, 0xb0, 0x00, 0x00, 0x80, 0x00 },
143 		.pll_div_regs = { 0x5a, 0xb2, 0xfd, 0x0c, 0x80, 0x40 },
146 		.pll_div_regs = { 0x64, 0xb0, 0x00, 0x00, 0x80, 0x00 },
149 		.pll_div_regs = { 0x5a, 0x90, 0x00, 0x00, 0x80, 0x00 },
152 		.pll_div_regs = { 0x5a, 0x92, 0xfd, 0x0c, 0x80, 0x40 },
155 		.pll_div_regs = { 0x5c, 0x92, 0x98, 0x11, 0x84, 0x41 },
158 		.pll_div_regs = { 0x62, 0x94, 0x95, 0x82, 0x80, 0x40 },
161 		.pll_div_regs = { 0x63, 0x96, 0xa1, 0x82, 0x80, 0x40 },
164 		.pll_div_regs = { 0x54, 0x7c, 0xc3, 0x8f, 0x80, 0x40 },
167 		.pll_div_regs = { 0x54, 0x70, 0x00, 0x00, 0x80, 0x00 },
170 		.pll_div_regs = { 0x58, 0x72, 0x84, 0x03, 0x82, 0x41 },
173 		.pll_div_regs = { 0x5a, 0x72, 0x89, 0x88, 0x80, 0x40 },
176 		.pll_div_regs = { 0x5a, 0x70, 0x00, 0x00, 0x80, 0x00 },
179 		.pll_div_regs = { 0x5a, 0x72, 0xfd, 0x0c, 0x80, 0x40 },
182 		.pll_div_regs = { 0x62, 0x74, 0x95, 0x08, 0x80, 0x40 },
185 		.pll_div_regs = { 0x62, 0x74, 0xdb, 0x52, 0x88, 0x47 },
188 		.pll_div_regs = { 0x63, 0x70, 0x00, 0x00, 0x80, 0x00 },
191 		.pll_div_regs = { 0x66, 0x74, 0x82, 0x01, 0x88, 0x45 },
194 		.pll_div_regs = { 0x69, 0x74, 0x89, 0x08, 0x80, 0x40 },
197 		.pll_div_regs = { 0x54, 0x52, 0x87, 0x03, 0x80, 0x40 },
200 		.pll_div_regs = { 0x58, 0x58, 0x8b, 0x88, 0x80, 0x40 },
203 		.pll_div_regs = { 0x5a, 0x50, 0x00, 0x00, 0x80, 0x00 },
206 		.pll_div_regs = { 0x5a, 0x52, 0xfd, 0x0c, 0x80, 0x40 },
209 		.pll_div_regs = { 0x5d, 0x58, 0xdb, 0xA2, 0x88, 0x41 },
212 		.pll_div_regs = { 0x5c, 0x52, 0x90, 0x0d, 0x84, 0x41 },
215 		.pll_div_regs = { 0x62, 0x54, 0x87, 0x01, 0x80, 0x40 },
218 		.pll_div_regs = { 0x64, 0x50, 0x00, 0x00, 0x80, 0x00 },
221 		.pll_div_regs = { 0x66, 0x54, 0x82, 0x01, 0x88, 0x45 },
224 		.pll_div_regs = { 0x67, 0x54, 0x88, 0x01, 0x90, 0x49 },
227 		.pll_div_regs = { 0x70, 0x54, 0x84, 0x83, 0x80, 0x40 },
230 		.pll_div_regs = { 0x70, 0x54, 0x82, 0x01, 0x80, 0x40 },
233 		.pll_div_regs = { 0x4e, 0x32, 0xa7, 0x10, 0x80, 0x40 },
236 		.pll_div_regs = { 0x50, 0x31, 0x86, 0x85, 0x80, 0x40 },
239 		.pll_div_regs = { 0x52, 0x3a, 0xdb, 0x4c, 0x88, 0x47 },
242 		.pll_div_regs = { 0x52, 0x32, 0x82, 0x01, 0x88, 0x47 },
245 		.pll_div_regs = { 0x54, 0x3c, 0xc3, 0x8f, 0x80, 0x40 },
248 		.pll_div_regs = { 0x54, 0x30, 0x00, 0x00, 0x80, 0x00 },
251 		.pll_div_regs = { 0x55, 0x32, 0x8c, 0x05, 0x90, 0x4b },
254 		.pll_div_regs = { 0x57, 0x32, 0x98, 0x07, 0x90, 0x49 },
257 		.pll_div_regs = { 0x58, 0x32, 0x84, 0x03, 0x82, 0x41 },
260 		.pll_div_regs = { 0x5a, 0x32, 0x89, 0x88, 0x80, 0x40 },
263 		.pll_div_regs = { 0x5a, 0x30, 0x00, 0x00, 0x80, 0x00 },
266 		.pll_div_regs = { 0x5a, 0x32, 0xfd, 0x0c, 0x80, 0x40 },
269 		.pll_div_regs = { 0x62, 0x34, 0x95, 0x08, 0x80, 0x40 },
272 		.pll_div_regs = { 0x63, 0x30, 0x00, 0x00, 0x80, 0x00 },
275 		.pll_div_regs = { 0x66, 0x34, 0x82, 0x01, 0x88, 0x45 },
278 		.pll_div_regs = { 0x69, 0x34, 0x89, 0x08, 0x80, 0x40 },
281 		.pll_div_regs = { 0x70, 0x34, 0x82, 0x01, 0x80, 0x40 },
284 		.pll_div_regs = { 0x71, 0x39, 0xe9, 0x82, 0x9c, 0x5b },
287 		.pll_div_regs = { 0x72, 0x38, 0x99, 0x10, 0x85, 0x41 },
290 		.pll_div_regs = { 0x73, 0x35, 0x88, 0x05, 0x90, 0x4d },
293 		.pll_div_regs = { 0x75, 0x36, 0xa7, 0x90, 0x80, 0x40 },
296 		.pll_div_regs = { 0x78, 0x30, 0x00, 0x00, 0x80, 0x00 },
299 		.pll_div_regs = { 0x7b, 0x35, 0xdb, 0x39, 0x90, 0x45 },
302 		.pll_div_regs = { 0x7b, 0x35, 0x84, 0x03, 0x90, 0x45 },
305 		.pll_div_regs = { 0x40, 0x18, 0x83, 0x01, 0x00, 0x40 },
308 		.pll_div_regs = { 0x41, 0x11, 0xa7, 0x14, 0x80, 0x40 },
311 		.pll_div_regs = { 0x42, 0x12, 0xa1, 0x20, 0x80, 0x40 },
314 		.pll_div_regs = { 0x43, 0x18, 0x8b, 0x08, 0x96, 0x55 },
317 		.pll_div_regs = { 0x45, 0x11, 0x83, 0x82, 0x90, 0x4b },
320 		.pll_div_regs = { 0x45, 0x11, 0x84, 0x81, 0x90, 0x4b },
323 		.pll_div_regs = { 0x4b, 0x10, 0x00, 0x00, 0x80, 0x00 },
326 		.pll_div_regs = { 0x4e, 0x12, 0x9a, 0x95, 0x80, 0x40 },
329 		.pll_div_regs = { 0x4e, 0x12, 0xa7, 0x10, 0x80, 0x40 },
332 		.pll_div_regs = { 0x52, 0x12, 0x82, 0x01, 0x88, 0x47 },
335 		.pll_div_regs = { 0x55, 0x12, 0x8c, 0x05, 0x90, 0x4b },
338 		.pll_div_regs = { 0x57, 0x12, 0x98, 0x07, 0x90, 0x49 },
341 		.pll_div_regs = { 0x58, 0x12, 0x84, 0x03, 0x82, 0x41 },
344 		.pll_div_regs = { 0x5a, 0x10, 0x00, 0x00, 0x80, 0x00 },
347 		.pll_div_regs = { 0x5a, 0x12, 0xfd, 0x0c, 0x80, 0x40 },
350 		.pll_div_regs = { 0x63, 0x10, 0x00, 0x00, 0x80, 0x00 },
353 		.pll_div_regs = { 0x69, 0x14, 0x89, 0x08, 0x80, 0x40 },
356 		.pll_div_regs = { 0x73, 0x15, 0x88, 0x05, 0x90, 0x4d },
359 		.pll_div_regs = { 0x78, 0x10, 0x00, 0x00, 0x80, 0x00 },
362 		.pll_div_regs = { 0x7b, 0x15, 0x84, 0x03, 0x90, 0x45 },
372 	{ PHY_REG_00, 0x00 }, { PHY_REG_01, 0xd1 },
373 	{ PHY_REG_08, 0x4f }, { PHY_REG_09, 0x30 },
374 	{ PHY_REG_10, 0x33 }, { PHY_REG_11, 0x65 },
378 	{ PHY_REG_15, 0x80 }, { PHY_REG_16, 0x6c },
379 	{ PHY_REG_17, 0xf2 }, { PHY_REG_18, 0x67 },
380 	{ PHY_REG_19, 0x00 }, { PHY_REG_20, 0x10 },
382 	{ PHY_REG_22, 0x30 }, { PHY_REG_23, 0x32 },
383 	{ PHY_REG_24, 0x60 }, { PHY_REG_25, 0x8f },
384 	{ PHY_REG_26, 0x00 }, { PHY_REG_27, 0x00 },
385 	{ PHY_REG_28, 0x08 }, { PHY_REG_29, 0x00 },
386 	{ PHY_REG_30, 0x00 }, { PHY_REG_31, 0x00 },
387 	{ PHY_REG_32, 0x00 }, { PHY_REG_33, 0x80 },
388 	{ PHY_REG_34, 0x00 }, { PHY_REG_35, 0x00 },
389 	{ PHY_REG_36, 0x00 }, { PHY_REG_37, 0x00 },
390 	{ PHY_REG_38, 0x00 }, { PHY_REG_39, 0x00 },
391 	{ PHY_REG_40, 0x00 }, { PHY_REG_41, 0xe0 },
392 	{ PHY_REG_42, 0x83 }, { PHY_REG_43, 0x0f },
393 	{ PHY_REG_44, 0x3E }, { PHY_REG_45, 0xf8 },
394 	{ PHY_REG_46, 0x00 }, { PHY_REG_47, 0x00 }
418 	u8 div = 0x1;  in fsl_samsung_hdmi_phy_configure_pixclk()
422 		div = 0xf;  in fsl_samsung_hdmi_phy_configure_pixclk()
425 		div = 0xb;  in fsl_samsung_hdmi_phy_configure_pixclk()
428 		div = 0x9;  in fsl_samsung_hdmi_phy_configure_pixclk()
431 		div = 0x7;  in fsl_samsung_hdmi_phy_configure_pixclk()
434 		div = 0x5;  in fsl_samsung_hdmi_phy_configure_pixclk()
437 		div = 0x3;  in fsl_samsung_hdmi_phy_configure_pixclk()
440 		div = 0x1;  in fsl_samsung_hdmi_phy_configure_pixclk()
509 	for (i = 0; i < ARRAY_SIZE(common_phy_cfg); i++)  in fsl_samsung_hdmi_phy_configure()
513 	for (i = 0; i < PHY_PLL_DIV_REGS_NUM; i++)  in fsl_samsung_hdmi_phy_configure()
545 	for (i = ARRAY_SIZE(phy_pll_cfg) - 1; i >= 0; i--)  in phy_clk_round_rate()
558 	for (i = ARRAY_SIZE(phy_pll_cfg) - 1; i >= 0; i--)  in phy_clk_set_rate()
562 	if (i < 0)  in phy_clk_set_rate()
589 	init.flags = 0;  in phy_clk_register()
605 	return 0;  in phy_clk_register()
620 	phy->regs = devm_platform_ioremap_resource(pdev, 0);  in fsl_samsung_hdmi_phy_probe()
652 	return 0;  in fsl_samsung_hdmi_phy_probe()
671 	return 0;  in fsl_samsung_hdmi_phy_suspend()
677 	int ret = 0;  in fsl_samsung_hdmi_phy_resume()