Lines Matching +full:0 +full:x0f00
36 #define DP_PLL0 BIT(0)
39 #define TORRENT_COMMON_CDB_OFFSET 0x0
42 ((0x4000 << (block_offset)) + \
46 ((0x8000 << (block_offset)) + \
50 (0xC000 << (block_offset))
53 ((0xD000 << (block_offset)) + \
57 (0xE000 << (block_offset))
59 #define TORRENT_DPTX_PHY_OFFSET 0x0
63 * register base + 0x30a00)
65 #define PHY_AUX_CTRL 0x04
66 #define PHY_RESET 0x20
68 #define PHY_PMA_XCVR_PLLCLK_EN 0x24
69 #define PHY_PMA_XCVR_PLLCLK_EN_ACK 0x28
70 #define PHY_PMA_XCVR_POWER_STATE_REQ 0x2c
72 #define PMA_XCVR_POWER_STATE_REQ_LN_MASK 0x3FU
73 #define PHY_PMA_XCVR_POWER_STATE_ACK 0x30
74 #define PHY_PMA_CMN_READY 0x34
78 * register base + 0x500000)
80 #define CMN_SSM_BANDGAP_TMR 0x0021U
81 #define CMN_SSM_BIAS_TMR 0x0022U
82 #define CMN_PLLSM0_PLLPRE_TMR 0x002AU
83 #define CMN_PLLSM0_PLLLOCK_TMR 0x002CU
84 #define CMN_PLLSM1_PLLPRE_TMR 0x0032U
85 #define CMN_PLLSM1_PLLLOCK_TMR 0x0034U
86 #define CMN_CDIAG_CDB_PWRI_OVRD 0x0041U
87 #define CMN_CDIAG_XCVRC_PWRI_OVRD 0x0047U
88 #define CMN_CDIAG_REFCLK_OVRD 0x004CU
89 #define CMN_CDIAG_REFCLK_DRV0_CTRL 0x0050U
90 #define CMN_BGCAL_INIT_TMR 0x0064U
91 #define CMN_BGCAL_ITER_TMR 0x0065U
92 #define CMN_IBCAL_INIT_TMR 0x0074U
93 #define CMN_PLL0_VCOCAL_TCTRL 0x0082U
94 #define CMN_PLL0_VCOCAL_INIT_TMR 0x0084U
95 #define CMN_PLL0_VCOCAL_ITER_TMR 0x0085U
96 #define CMN_PLL0_VCOCAL_REFTIM_START 0x0086U
97 #define CMN_PLL0_VCOCAL_PLLCNT_START 0x0088U
98 #define CMN_PLL0_INTDIV_M0 0x0090U
99 #define CMN_PLL0_FRACDIVL_M0 0x0091U
100 #define CMN_PLL0_FRACDIVH_M0 0x0092U
101 #define CMN_PLL0_HIGH_THR_M0 0x0093U
102 #define CMN_PLL0_DSM_DIAG_M0 0x0094U
103 #define CMN_PLL0_DSM_FBH_OVRD_M0 0x0095U
104 #define CMN_PLL0_DSM_FBL_OVRD_M0 0x0096U
105 #define CMN_PLL0_SS_CTRL1_M0 0x0098U
106 #define CMN_PLL0_SS_CTRL2_M0 0x0099U
107 #define CMN_PLL0_SS_CTRL3_M0 0x009AU
108 #define CMN_PLL0_SS_CTRL4_M0 0x009BU
109 #define CMN_PLL0_LOCK_REFCNT_START 0x009CU
110 #define CMN_PLL0_LOCK_PLLCNT_START 0x009EU
111 #define CMN_PLL0_LOCK_PLLCNT_THR 0x009FU
112 #define CMN_PLL0_INTDIV_M1 0x00A0U
113 #define CMN_PLL0_FRACDIVH_M1 0x00A2U
114 #define CMN_PLL0_HIGH_THR_M1 0x00A3U
115 #define CMN_PLL0_DSM_DIAG_M1 0x00A4U
116 #define CMN_PLL0_SS_CTRL1_M1 0x00A8U
117 #define CMN_PLL0_SS_CTRL2_M1 0x00A9U
118 #define CMN_PLL0_SS_CTRL3_M1 0x00AAU
119 #define CMN_PLL0_SS_CTRL4_M1 0x00ABU
120 #define CMN_PLL1_VCOCAL_TCTRL 0x00C2U
121 #define CMN_PLL1_VCOCAL_INIT_TMR 0x00C4U
122 #define CMN_PLL1_VCOCAL_ITER_TMR 0x00C5U
123 #define CMN_PLL1_VCOCAL_REFTIM_START 0x00C6U
124 #define CMN_PLL1_VCOCAL_PLLCNT_START 0x00C8U
125 #define CMN_PLL1_INTDIV_M0 0x00D0U
126 #define CMN_PLL1_FRACDIVL_M0 0x00D1U
127 #define CMN_PLL1_FRACDIVH_M0 0x00D2U
128 #define CMN_PLL1_HIGH_THR_M0 0x00D3U
129 #define CMN_PLL1_DSM_DIAG_M0 0x00D4U
130 #define CMN_PLL1_DSM_FBH_OVRD_M0 0x00D5U
131 #define CMN_PLL1_DSM_FBL_OVRD_M0 0x00D6U
132 #define CMN_PLL1_SS_CTRL1_M0 0x00D8U
133 #define CMN_PLL1_SS_CTRL2_M0 0x00D9U
134 #define CMN_PLL1_SS_CTRL3_M0 0x00DAU
135 #define CMN_PLL1_SS_CTRL4_M0 0x00DBU
136 #define CMN_PLL1_LOCK_REFCNT_START 0x00DCU
137 #define CMN_PLL1_LOCK_PLLCNT_START 0x00DEU
138 #define CMN_PLL1_LOCK_PLLCNT_THR 0x00DFU
139 #define CMN_TXPUCAL_TUNE 0x0103U
140 #define CMN_TXPUCAL_INIT_TMR 0x0104U
141 #define CMN_TXPUCAL_ITER_TMR 0x0105U
142 #define CMN_TXPDCAL_TUNE 0x010BU
143 #define CMN_TXPDCAL_INIT_TMR 0x010CU
144 #define CMN_TXPDCAL_ITER_TMR 0x010DU
145 #define CMN_RXCAL_INIT_TMR 0x0114U
146 #define CMN_RXCAL_ITER_TMR 0x0115U
147 #define CMN_SD_CAL_INIT_TMR 0x0124U
148 #define CMN_SD_CAL_ITER_TMR 0x0125U
149 #define CMN_SD_CAL_REFTIM_START 0x0126U
150 #define CMN_SD_CAL_PLLCNT_START 0x0128U
151 #define CMN_PDIAG_PLL0_CTRL_M0 0x01A0U
152 #define CMN_PDIAG_PLL0_CLK_SEL_M0 0x01A1U
153 #define CMN_PDIAG_PLL0_CP_PADJ_M0 0x01A4U
154 #define CMN_PDIAG_PLL0_CP_IADJ_M0 0x01A5U
155 #define CMN_PDIAG_PLL0_FILT_PADJ_M0 0x01A6U
156 #define CMN_PDIAG_PLL0_CTRL_M1 0x01B0U
157 #define CMN_PDIAG_PLL0_CLK_SEL_M1 0x01B1U
158 #define CMN_PDIAG_PLL0_CP_PADJ_M1 0x01B4U
159 #define CMN_PDIAG_PLL0_CP_IADJ_M1 0x01B5U
160 #define CMN_PDIAG_PLL0_FILT_PADJ_M1 0x01B6U
161 #define CMN_PDIAG_PLL1_CTRL_M0 0x01C0U
162 #define CMN_PDIAG_PLL1_CLK_SEL_M0 0x01C1U
163 #define CMN_PDIAG_PLL1_CP_PADJ_M0 0x01C4U
164 #define CMN_PDIAG_PLL1_CP_IADJ_M0 0x01C5U
165 #define CMN_PDIAG_PLL1_FILT_PADJ_M0 0x01C6U
166 #define CMN_DIAG_BIAS_OVRD1 0x01E1U
169 #define TX_TXCC_CTRL 0x0040U
170 #define TX_TXCC_CPOST_MULT_00 0x004CU
171 #define TX_TXCC_CPOST_MULT_01 0x004DU
172 #define TX_TXCC_MGNFS_MULT_000 0x0050U
173 #define TX_TXCC_MGNFS_MULT_100 0x0054U
174 #define DRV_DIAG_TX_DRV 0x00C6U
175 #define XCVR_DIAG_PLLDRC_CTRL 0x00E5U
176 #define XCVR_DIAG_HSCLK_SEL 0x00E6U
177 #define XCVR_DIAG_HSCLK_DIV 0x00E7U
178 #define XCVR_DIAG_RXCLK_CTRL 0x00E9U
179 #define XCVR_DIAG_BIDI_CTRL 0x00EAU
180 #define XCVR_DIAG_PSC_OVRD 0x00EBU
181 #define TX_PSC_A0 0x0100U
182 #define TX_PSC_A1 0x0101U
183 #define TX_PSC_A2 0x0102U
184 #define TX_PSC_A3 0x0103U
185 #define TX_RCVDET_ST_TMR 0x0123U
186 #define TX_DIAG_ACYA 0x01E7U
187 #define TX_DIAG_ACYA_HBDC_MASK 0x0001U
190 #define RX_PSC_A0 0x0000U
191 #define RX_PSC_A1 0x0001U
192 #define RX_PSC_A2 0x0002U
193 #define RX_PSC_A3 0x0003U
194 #define RX_PSC_CAL 0x0006U
195 #define RX_SDCAL0_INIT_TMR 0x0044U
196 #define RX_SDCAL0_ITER_TMR 0x0045U
197 #define RX_SDCAL1_INIT_TMR 0x004CU
198 #define RX_SDCAL1_ITER_TMR 0x004DU
199 #define RX_CDRLF_CNFG 0x0080U
200 #define RX_CDRLF_CNFG3 0x0082U
201 #define RX_SIGDET_HL_FILT_TMR 0x0090U
202 #define RX_REE_GCSM1_CTRL 0x0108U
203 #define RX_REE_GCSM1_EQENM_PH1 0x0109U
204 #define RX_REE_GCSM1_EQENM_PH2 0x010AU
205 #define RX_REE_GCSM2_CTRL 0x0110U
206 #define RX_REE_PERGCSM_CTRL 0x0118U
207 #define RX_REE_ATTEN_THR 0x0149U
208 #define RX_REE_TAP1_CLIP 0x0171U
209 #define RX_REE_TAP2TON_CLIP 0x0172U
210 #define RX_REE_SMGM_CTRL1 0x0177U
211 #define RX_REE_SMGM_CTRL2 0x0178U
212 #define RX_DIAG_DFE_CTRL 0x01E0U
213 #define RX_DIAG_DFE_AMP_TUNE_2 0x01E2U
214 #define RX_DIAG_DFE_AMP_TUNE_3 0x01E3U
215 #define RX_DIAG_NQST_CTRL 0x01E5U
216 #define RX_DIAG_SIGDET_TUNE 0x01E8U
217 #define RX_DIAG_PI_RATE 0x01F4U
218 #define RX_DIAG_PI_CAP 0x01F5U
219 #define RX_DIAG_ACYA 0x01FFU
222 #define PHY_PIPE_CMN_CTRL1 0x0000U
223 #define PHY_PLL_CFG 0x000EU
224 #define PHY_PIPE_USB3_GEN2_PRE_CFG0 0x0020U
225 #define PHY_PIPE_USB3_GEN2_POST_CFG0 0x0022U
226 #define PHY_PIPE_USB3_GEN2_POST_CFG1 0x0023U
229 #define PHY_PCS_ISO_LINK_CTRL 0x000BU
232 #define PHY_PMA_CMN_CTRL1 0x0000U
233 #define PHY_PMA_CMN_CTRL2 0x0001U
234 #define PHY_PMA_PLL_RAW_CTRL 0x0003U
245 REG_FIELD(PHY_PLL_CFG, 0, 1);
248 REG_FIELD(PHY_PMA_CMN_CTRL1, 0, 0);
251 REG_FIELD(PHY_PMA_CMN_CTRL2, 0, 7);
254 REG_FIELD(PHY_PMA_PLL_RAW_CTRL, 0, 1);
262 static const struct reg_field phy_pipe_cmn_ctrl1_0 = REG_FIELD(PHY_PIPE_CMN_CTRL1, 0, 0);
288 static const u32 cdns_torrent_refclk_driver_mux_table[] = { 1, 0 };
326 #define SSC_SHIFT 0
327 #define SSC_MASK GENMASK(2, 0)
385 POWERSTATE_A0 = 0,
468 for (i = 0; i < tbl->num_entries; i++) { in cdns_torrent_get_tbl_vals()
483 return 0; in cdns_regmap_write()
492 return 0; in cdns_regmap_read()
503 return 0; in cdns_regmap_dptx_write()
513 return 0; in cdns_regmap_dptx_read()
535 TORRENT_TX_LANE_CDB_REGMAP_CONF("0"),
542 TORRENT_RX_LANE_CDB_REGMAP_CONF("0"),
566 TORRENT_PHY_PCS_LANE_CDB_REGMAP_CONF("0"),
642 * of 0xFFFF is a placeholder for invalid combination, and will never be used.
645 /* voltage swing 0, pre-emphasis 0->3 */
646 { {.diag_tx_drv = 0x0003, .mgnfs_mult = 0x002A,
647 .cpost_mult = 0x0000},
648 {.diag_tx_drv = 0x0003, .mgnfs_mult = 0x001F,
649 .cpost_mult = 0x0014},
650 {.diag_tx_drv = 0x0003, .mgnfs_mult = 0x0012,
651 .cpost_mult = 0x0020},
652 {.diag_tx_drv = 0x0003, .mgnfs_mult = 0x0000,
653 .cpost_mult = 0x002A}
656 /* voltage swing 1, pre-emphasis 0->3 */
657 { {.diag_tx_drv = 0x0003, .mgnfs_mult = 0x001F,
658 .cpost_mult = 0x0000},
659 {.diag_tx_drv = 0x0003, .mgnfs_mult = 0x0013,
660 .cpost_mult = 0x0012},
661 {.diag_tx_drv = 0x0003, .mgnfs_mult = 0x0000,
662 .cpost_mult = 0x001F},
663 {.diag_tx_drv = 0xFFFF, .mgnfs_mult = 0xFFFF,
664 .cpost_mult = 0xFFFF}
667 /* voltage swing 2, pre-emphasis 0->3 */
668 { {.diag_tx_drv = 0x0003, .mgnfs_mult = 0x0013,
669 .cpost_mult = 0x0000},
670 {.diag_tx_drv = 0x0003, .mgnfs_mult = 0x0000,
671 .cpost_mult = 0x0013},
672 {.diag_tx_drv = 0xFFFF, .mgnfs_mult = 0xFFFF,
673 .cpost_mult = 0xFFFF},
674 {.diag_tx_drv = 0xFFFF, .mgnfs_mult = 0xFFFF,
675 .cpost_mult = 0xFFFF}
678 /* voltage swing 3, pre-emphasis 0->3 */
679 { {.diag_tx_drv = 0x0003, .mgnfs_mult = 0x0000,
680 .cpost_mult = 0x0000},
681 {.diag_tx_drv = 0xFFFF, .mgnfs_mult = 0xFFFF,
682 .cpost_mult = 0xFFFF},
683 {.diag_tx_drv = 0xFFFF, .mgnfs_mult = 0xFFFF,
684 .cpost_mult = 0xFFFF},
685 {.diag_tx_drv = 0xFFFF, .mgnfs_mult = 0xFFFF,
686 .cpost_mult = 0xFFFF}
720 cdns_torrent_phy_write(regmap, CMN_PLL0_SS_CTRL1_M0, 0x0001); in cdns_torrent_dp_enable_ssc_19_2mhz()
723 cdns_torrent_phy_write(regmap, CMN_PLL0_SS_CTRL4_M0, 0x0003); in cdns_torrent_dp_enable_ssc_19_2mhz()
724 cdns_torrent_phy_write(regmap, CMN_PLL1_SS_CTRL1_M0, 0x0001); in cdns_torrent_dp_enable_ssc_19_2mhz()
727 cdns_torrent_phy_write(regmap, CMN_PLL1_SS_CTRL4_M0, 0x0003); in cdns_torrent_dp_enable_ssc_19_2mhz()
741 cdns_torrent_phy_write(regmap, CMN_PLL0_INTDIV_M0, 0x0119); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
742 cdns_torrent_phy_write(regmap, CMN_PLL0_FRACDIVL_M0, 0x4000); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
743 cdns_torrent_phy_write(regmap, CMN_PLL0_FRACDIVH_M0, 0x0002); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
744 cdns_torrent_phy_write(regmap, CMN_PLL0_HIGH_THR_M0, 0x00BC); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
745 cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL0_CTRL_M0, 0x0012); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
746 cdns_torrent_phy_write(regmap, CMN_PLL1_INTDIV_M0, 0x0119); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
747 cdns_torrent_phy_write(regmap, CMN_PLL1_FRACDIVL_M0, 0x4000); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
748 cdns_torrent_phy_write(regmap, CMN_PLL1_FRACDIVH_M0, 0x0002); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
749 cdns_torrent_phy_write(regmap, CMN_PLL1_HIGH_THR_M0, 0x00BC); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
750 cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL1_CTRL_M0, 0x0012); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
752 cdns_torrent_dp_enable_ssc_19_2mhz(cdns_phy, 0x033A, 0x006A); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
758 cdns_torrent_phy_write(regmap, CMN_PLL0_INTDIV_M0, 0x01FA); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
759 cdns_torrent_phy_write(regmap, CMN_PLL0_FRACDIVL_M0, 0x4000); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
760 cdns_torrent_phy_write(regmap, CMN_PLL0_FRACDIVH_M0, 0x0002); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
761 cdns_torrent_phy_write(regmap, CMN_PLL0_HIGH_THR_M0, 0x0152); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
762 cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL0_CTRL_M0, 0x0002); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
763 cdns_torrent_phy_write(regmap, CMN_PLL1_INTDIV_M0, 0x01FA); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
764 cdns_torrent_phy_write(regmap, CMN_PLL1_FRACDIVL_M0, 0x4000); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
765 cdns_torrent_phy_write(regmap, CMN_PLL1_FRACDIVH_M0, 0x0002); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
766 cdns_torrent_phy_write(regmap, CMN_PLL1_HIGH_THR_M0, 0x0152); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
767 cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL1_CTRL_M0, 0x0002); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
769 cdns_torrent_dp_enable_ssc_19_2mhz(cdns_phy, 0x05DD, 0x0069); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
774 cdns_torrent_phy_write(regmap, CMN_PLL0_INTDIV_M0, 0x01C2); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
775 cdns_torrent_phy_write(regmap, CMN_PLL0_FRACDIVL_M0, 0x0000); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
776 cdns_torrent_phy_write(regmap, CMN_PLL0_FRACDIVH_M0, 0x0002); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
777 cdns_torrent_phy_write(regmap, CMN_PLL0_HIGH_THR_M0, 0x012C); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
778 cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL0_CTRL_M0, 0x0002); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
779 cdns_torrent_phy_write(regmap, CMN_PLL1_INTDIV_M0, 0x01C2); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
780 cdns_torrent_phy_write(regmap, CMN_PLL1_FRACDIVL_M0, 0x0000); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
781 cdns_torrent_phy_write(regmap, CMN_PLL1_FRACDIVH_M0, 0x0002); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
782 cdns_torrent_phy_write(regmap, CMN_PLL1_HIGH_THR_M0, 0x012C); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
783 cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL1_CTRL_M0, 0x0002); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
785 cdns_torrent_dp_enable_ssc_19_2mhz(cdns_phy, 0x0536, 0x0069); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
789 cdns_torrent_phy_write(regmap, CMN_PLL0_INTDIV_M0, 0x01A5); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
790 cdns_torrent_phy_write(regmap, CMN_PLL0_FRACDIVL_M0, 0xE000); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
791 cdns_torrent_phy_write(regmap, CMN_PLL0_FRACDIVH_M0, 0x0002); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
792 cdns_torrent_phy_write(regmap, CMN_PLL0_HIGH_THR_M0, 0x011A); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
793 cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL0_CTRL_M0, 0x0002); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
794 cdns_torrent_phy_write(regmap, CMN_PLL1_INTDIV_M0, 0x01A5); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
795 cdns_torrent_phy_write(regmap, CMN_PLL1_FRACDIVL_M0, 0xE000); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
796 cdns_torrent_phy_write(regmap, CMN_PLL1_FRACDIVH_M0, 0x0002); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
797 cdns_torrent_phy_write(regmap, CMN_PLL1_HIGH_THR_M0, 0x011A); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
798 cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL1_CTRL_M0, 0x0002); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
800 cdns_torrent_dp_enable_ssc_19_2mhz(cdns_phy, 0x04D7, 0x006A); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
805 cdns_torrent_phy_write(regmap, CMN_PLL0_VCOCAL_PLLCNT_START, 0x025E); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
806 cdns_torrent_phy_write(regmap, CMN_PLL0_LOCK_PLLCNT_THR, 0x0005); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
807 cdns_torrent_phy_write(regmap, CMN_PLL1_VCOCAL_PLLCNT_START, 0x025E); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
808 cdns_torrent_phy_write(regmap, CMN_PLL1_LOCK_PLLCNT_THR, 0x0005); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
810 cdns_torrent_phy_write(regmap, CMN_PLL0_VCOCAL_PLLCNT_START, 0x0260); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
811 cdns_torrent_phy_write(regmap, CMN_PLL1_VCOCAL_PLLCNT_START, 0x0260); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
813 cdns_torrent_phy_write(regmap, CMN_PLL0_SS_CTRL1_M0, 0x0002); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
814 cdns_torrent_phy_write(regmap, CMN_PLL0_SS_CTRL2_M0, 0x0000); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
815 cdns_torrent_phy_write(regmap, CMN_PLL0_SS_CTRL3_M0, 0x0000); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
816 cdns_torrent_phy_write(regmap, CMN_PLL0_SS_CTRL4_M0, 0x0000); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
817 cdns_torrent_phy_write(regmap, CMN_PLL0_LOCK_PLLCNT_THR, 0x0003); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
818 cdns_torrent_phy_write(regmap, CMN_PLL1_SS_CTRL1_M0, 0x0002); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
819 cdns_torrent_phy_write(regmap, CMN_PLL1_SS_CTRL2_M0, 0x0000); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
820 cdns_torrent_phy_write(regmap, CMN_PLL1_SS_CTRL3_M0, 0x0000); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
821 cdns_torrent_phy_write(regmap, CMN_PLL1_SS_CTRL4_M0, 0x0000); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
822 cdns_torrent_phy_write(regmap, CMN_PLL1_LOCK_PLLCNT_THR, 0x0003); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
825 cdns_torrent_phy_write(regmap, CMN_PLL0_LOCK_REFCNT_START, 0x0099); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
826 cdns_torrent_phy_write(regmap, CMN_PLL0_LOCK_PLLCNT_START, 0x0099); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
827 cdns_torrent_phy_write(regmap, CMN_PLL1_LOCK_REFCNT_START, 0x0099); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
828 cdns_torrent_phy_write(regmap, CMN_PLL1_LOCK_PLLCNT_START, 0x0099); in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
840 cdns_torrent_phy_write(regmap, CMN_PLL0_SS_CTRL1_M0, 0x0001); in cdns_torrent_dp_enable_ssc_25mhz()
842 cdns_torrent_phy_write(regmap, CMN_PLL0_SS_CTRL1_M0, 0x007F); in cdns_torrent_dp_enable_ssc_25mhz()
843 cdns_torrent_phy_write(regmap, CMN_PLL0_SS_CTRL4_M0, 0x0003); in cdns_torrent_dp_enable_ssc_25mhz()
844 cdns_torrent_phy_write(regmap, CMN_PLL1_SS_CTRL1_M0, 0x0001); in cdns_torrent_dp_enable_ssc_25mhz()
846 cdns_torrent_phy_write(regmap, CMN_PLL1_SS_CTRL1_M0, 0x007F); in cdns_torrent_dp_enable_ssc_25mhz()
847 cdns_torrent_phy_write(regmap, CMN_PLL1_SS_CTRL4_M0, 0x0003); in cdns_torrent_dp_enable_ssc_25mhz()
861 cdns_torrent_phy_write(regmap, CMN_PLL0_INTDIV_M0, 0x01B0); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
862 cdns_torrent_phy_write(regmap, CMN_PLL0_FRACDIVL_M0, 0x0000); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
863 cdns_torrent_phy_write(regmap, CMN_PLL0_FRACDIVH_M0, 0x0002); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
864 cdns_torrent_phy_write(regmap, CMN_PLL0_HIGH_THR_M0, 0x0120); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
865 cdns_torrent_phy_write(regmap, CMN_PLL1_INTDIV_M0, 0x01B0); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
866 cdns_torrent_phy_write(regmap, CMN_PLL1_FRACDIVL_M0, 0x0000); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
867 cdns_torrent_phy_write(regmap, CMN_PLL1_FRACDIVH_M0, 0x0002); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
868 cdns_torrent_phy_write(regmap, CMN_PLL1_HIGH_THR_M0, 0x0120); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
870 cdns_torrent_dp_enable_ssc_25mhz(cdns_phy, 0x0423); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
876 cdns_torrent_phy_write(regmap, CMN_PLL0_INTDIV_M0, 0x0184); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
877 cdns_torrent_phy_write(regmap, CMN_PLL0_FRACDIVL_M0, 0xCCCD); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
878 cdns_torrent_phy_write(regmap, CMN_PLL0_FRACDIVH_M0, 0x0002); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
879 cdns_torrent_phy_write(regmap, CMN_PLL0_HIGH_THR_M0, 0x0104); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
880 cdns_torrent_phy_write(regmap, CMN_PLL1_INTDIV_M0, 0x0184); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
881 cdns_torrent_phy_write(regmap, CMN_PLL1_FRACDIVL_M0, 0xCCCD); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
882 cdns_torrent_phy_write(regmap, CMN_PLL1_FRACDIVH_M0, 0x0002); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
883 cdns_torrent_phy_write(regmap, CMN_PLL1_HIGH_THR_M0, 0x0104); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
885 cdns_torrent_dp_enable_ssc_25mhz(cdns_phy, 0x03B9); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
890 cdns_torrent_phy_write(regmap, CMN_PLL0_INTDIV_M0, 0x0159); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
891 cdns_torrent_phy_write(regmap, CMN_PLL0_FRACDIVL_M0, 0x999A); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
892 cdns_torrent_phy_write(regmap, CMN_PLL0_FRACDIVH_M0, 0x0002); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
893 cdns_torrent_phy_write(regmap, CMN_PLL0_HIGH_THR_M0, 0x00E7); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
894 cdns_torrent_phy_write(regmap, CMN_PLL1_INTDIV_M0, 0x0159); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
895 cdns_torrent_phy_write(regmap, CMN_PLL1_FRACDIVL_M0, 0x999A); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
896 cdns_torrent_phy_write(regmap, CMN_PLL1_FRACDIVH_M0, 0x0002); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
897 cdns_torrent_phy_write(regmap, CMN_PLL1_HIGH_THR_M0, 0x00E7); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
899 cdns_torrent_dp_enable_ssc_25mhz(cdns_phy, 0x034F); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
903 cdns_torrent_phy_write(regmap, CMN_PLL0_INTDIV_M0, 0x0144); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
904 cdns_torrent_phy_write(regmap, CMN_PLL0_FRACDIVL_M0, 0x0000); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
905 cdns_torrent_phy_write(regmap, CMN_PLL0_FRACDIVH_M0, 0x0002); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
906 cdns_torrent_phy_write(regmap, CMN_PLL0_HIGH_THR_M0, 0x00D8); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
907 cdns_torrent_phy_write(regmap, CMN_PLL1_INTDIV_M0, 0x0144); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
908 cdns_torrent_phy_write(regmap, CMN_PLL1_FRACDIVL_M0, 0x0000); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
909 cdns_torrent_phy_write(regmap, CMN_PLL1_FRACDIVH_M0, 0x0002); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
910 cdns_torrent_phy_write(regmap, CMN_PLL1_HIGH_THR_M0, 0x00D8); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
912 cdns_torrent_dp_enable_ssc_25mhz(cdns_phy, 0x031A); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
916 cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL0_CTRL_M0, 0x0002); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
917 cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL1_CTRL_M0, 0x0002); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
921 CMN_PLL0_VCOCAL_PLLCNT_START, 0x0315); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
923 CMN_PLL0_LOCK_PLLCNT_THR, 0x0005); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
925 CMN_PLL1_VCOCAL_PLLCNT_START, 0x0315); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
927 CMN_PLL1_LOCK_PLLCNT_THR, 0x0005); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
930 CMN_PLL0_VCOCAL_PLLCNT_START, 0x0317); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
932 CMN_PLL1_VCOCAL_PLLCNT_START, 0x0317); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
934 cdns_torrent_phy_write(regmap, CMN_PLL0_SS_CTRL1_M0, 0x0002); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
935 cdns_torrent_phy_write(regmap, CMN_PLL0_SS_CTRL2_M0, 0x0000); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
936 cdns_torrent_phy_write(regmap, CMN_PLL0_SS_CTRL3_M0, 0x0000); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
937 cdns_torrent_phy_write(regmap, CMN_PLL0_SS_CTRL4_M0, 0x0000); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
939 CMN_PLL0_LOCK_PLLCNT_THR, 0x0003); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
940 cdns_torrent_phy_write(regmap, CMN_PLL1_SS_CTRL1_M0, 0x0002); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
941 cdns_torrent_phy_write(regmap, CMN_PLL1_SS_CTRL2_M0, 0x0000); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
942 cdns_torrent_phy_write(regmap, CMN_PLL1_SS_CTRL3_M0, 0x0000); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
943 cdns_torrent_phy_write(regmap, CMN_PLL1_SS_CTRL4_M0, 0x0000); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
945 CMN_PLL1_LOCK_PLLCNT_THR, 0x0003); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
948 cdns_torrent_phy_write(regmap, CMN_PLL0_LOCK_REFCNT_START, 0x00C7); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
949 cdns_torrent_phy_write(regmap, CMN_PLL0_LOCK_PLLCNT_START, 0x00C7); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
950 cdns_torrent_phy_write(regmap, CMN_PLL1_LOCK_REFCNT_START, 0x00C7); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
951 cdns_torrent_phy_write(regmap, CMN_PLL1_LOCK_PLLCNT_START, 0x00C7); in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
966 cdns_torrent_phy_write(regmap, CMN_PLL0_DSM_FBH_OVRD_M0, 0x0022); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
969 cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL1_CP_PADJ_M0, 0x0028); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
970 cdns_torrent_phy_write(regmap, CMN_PLL1_DSM_FBH_OVRD_M0, 0x0022); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
971 cdns_torrent_phy_write(regmap, CMN_PLL1_DSM_FBL_OVRD_M0, 0x000C); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
979 cdns_torrent_phy_write(regmap, CMN_PLL0_DSM_DIAG_M0, 0x0004); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
980 cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL0_CP_PADJ_M0, 0x0509); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
981 cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL0_CP_IADJ_M0, 0x0F00); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
982 cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL0_FILT_PADJ_M0, 0x0F08); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
983 cdns_torrent_phy_write(regmap, CMN_PLL0_INTDIV_M0, 0x0061); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
984 cdns_torrent_phy_write(regmap, CMN_PLL0_FRACDIVL_M0, 0x3333); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
985 cdns_torrent_phy_write(regmap, CMN_PLL0_FRACDIVH_M0, 0x0002); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
986 cdns_torrent_phy_write(regmap, CMN_PLL0_HIGH_THR_M0, 0x0042); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
987 cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL0_CTRL_M0, 0x0002); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
990 cdns_torrent_phy_write(regmap, CMN_PLL1_DSM_DIAG_M0, 0x0004); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
991 cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL1_CP_PADJ_M0, 0x0509); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
992 cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL1_CP_IADJ_M0, 0x0F00); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
993 cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL1_FILT_PADJ_M0, 0x0F08); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
994 cdns_torrent_phy_write(regmap, CMN_PLL1_INTDIV_M0, 0x0061); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
995 cdns_torrent_phy_write(regmap, CMN_PLL1_FRACDIVL_M0, 0x3333); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
996 cdns_torrent_phy_write(regmap, CMN_PLL1_FRACDIVH_M0, 0x0002); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
997 cdns_torrent_phy_write(regmap, CMN_PLL1_HIGH_THR_M0, 0x0042); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
998 cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL1_CTRL_M0, 0x0002); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
1005 cdns_torrent_phy_write(regmap, CMN_PLL0_DSM_DIAG_M0, 0x0004); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
1006 cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL0_CP_PADJ_M0, 0x0509); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
1007 cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL0_CP_IADJ_M0, 0x0F00); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
1008 cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL0_FILT_PADJ_M0, 0x0F08); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
1009 cdns_torrent_phy_write(regmap, CMN_PLL0_INTDIV_M0, 0x0056); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
1010 cdns_torrent_phy_write(regmap, CMN_PLL0_FRACDIVL_M0, 0x6666); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
1011 cdns_torrent_phy_write(regmap, CMN_PLL0_FRACDIVH_M0, 0x0002); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
1012 cdns_torrent_phy_write(regmap, CMN_PLL0_HIGH_THR_M0, 0x003A); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
1013 cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL0_CTRL_M0, 0x0002); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
1016 cdns_torrent_phy_write(regmap, CMN_PLL1_DSM_DIAG_M0, 0x0004); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
1017 cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL1_CP_PADJ_M0, 0x0509); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
1018 cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL1_CP_IADJ_M0, 0x0F00); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
1019 cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL1_FILT_PADJ_M0, 0x0F08); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
1020 cdns_torrent_phy_write(regmap, CMN_PLL1_INTDIV_M0, 0x0056); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
1021 cdns_torrent_phy_write(regmap, CMN_PLL1_FRACDIVL_M0, 0x6666); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
1022 cdns_torrent_phy_write(regmap, CMN_PLL1_FRACDIVH_M0, 0x0002); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
1023 cdns_torrent_phy_write(regmap, CMN_PLL1_HIGH_THR_M0, 0x003A); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
1024 cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL1_CTRL_M0, 0x0002); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
1030 cdns_torrent_phy_write(regmap, CMN_PLL0_DSM_DIAG_M0, 0x0004); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
1031 cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL0_CP_PADJ_M0, 0x0509); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
1032 cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL0_CP_IADJ_M0, 0x0F00); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
1033 cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL0_FILT_PADJ_M0, 0x0F08); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
1034 cdns_torrent_phy_write(regmap, CMN_PLL0_INTDIV_M0, 0x0051); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
1035 cdns_torrent_phy_write(regmap, CMN_PLL0_FRACDIVH_M0, 0x0002); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
1036 cdns_torrent_phy_write(regmap, CMN_PLL0_HIGH_THR_M0, 0x0036); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
1037 cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL0_CTRL_M0, 0x0002); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
1040 cdns_torrent_phy_write(regmap, CMN_PLL1_DSM_DIAG_M0, 0x0004); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
1041 cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL1_CP_PADJ_M0, 0x0509); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
1042 cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL1_CP_IADJ_M0, 0x0F00); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
1043 cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL1_FILT_PADJ_M0, 0x0F08); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
1044 cdns_torrent_phy_write(regmap, CMN_PLL1_INTDIV_M0, 0x0051); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
1045 cdns_torrent_phy_write(regmap, CMN_PLL1_FRACDIVH_M0, 0x0002); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
1046 cdns_torrent_phy_write(regmap, CMN_PLL1_HIGH_THR_M0, 0x0036); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
1047 cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL1_CTRL_M0, 0x0002); in cdns_torrent_dp_pma_cmn_vco_cfg_100mhz()
1074 return 0; in cdns_torrent_dp_get_pll()
1107 pll_ack_val = 0; in cdns_torrent_dp_set_pll_en()
1117 0, POLL_TIMEOUT_US); in cdns_torrent_dp_set_pll_en()
1129 u32 value = 0; in cdns_torrent_dp_set_power_state()
1130 u32 mask = 0; in cdns_torrent_dp_set_power_state()
1137 value_part = 0x01U; in cdns_torrent_dp_set_power_state()
1140 value_part = 0x04U; in cdns_torrent_dp_set_power_state()
1144 value_part = 0x08U; in cdns_torrent_dp_set_power_state()
1150 for (i = 0; i < num_lanes; i++) { in cdns_torrent_dp_set_power_state()
1159 read_val, (read_val & mask) == value, 0, in cdns_torrent_dp_set_power_state()
1164 cdns_torrent_dp_write(regmap, PHY_PMA_XCVR_POWER_STATE_REQ, 0x00000000); in cdns_torrent_dp_set_power_state()
1183 0, POLL_TIMEOUT_US); in cdns_torrent_dp_run()
1210 reg & 1, 0, POLL_TIMEOUT_US); in cdns_torrent_dp_wait_pma_cmn_ready()
1217 return 0; in cdns_torrent_dp_wait_pma_cmn_ready()
1224 unsigned int clk_sel_val = 0; in cdns_torrent_dp_pma_cmn_rate()
1225 unsigned int hsclk_div_val = 0; in cdns_torrent_dp_pma_cmn_rate()
1230 clk_sel_val = 0x0f01; in cdns_torrent_dp_pma_cmn_rate()
1236 clk_sel_val = 0x0701; in cdns_torrent_dp_pma_cmn_rate()
1240 clk_sel_val = 0x0b00; in cdns_torrent_dp_pma_cmn_rate()
1245 clk_sel_val = 0x0301; in cdns_torrent_dp_pma_cmn_rate()
1246 hsclk_div_val = 0; in cdns_torrent_dp_pma_cmn_rate()
1249 clk_sel_val = 0x0200; in cdns_torrent_dp_pma_cmn_rate()
1250 hsclk_div_val = 0; in cdns_torrent_dp_pma_cmn_rate()
1263 for (i = 0; i < num_lanes; i++) in cdns_torrent_dp_pma_cmn_rate()
1297 ((read_val >> 2) & 0x01) != 0, in cdns_torrent_dp_configure_rate()
1298 0, POLL_TIMEOUT_US); in cdns_torrent_dp_configure_rate()
1306 ((read_val >> 3) & 0x01) != 0, in cdns_torrent_dp_configure_rate()
1307 0, POLL_TIMEOUT_US); in cdns_torrent_dp_configure_rate()
1335 * For PLL0 - PHY_PMA_CMN_CTRL2[0] == 1 in cdns_torrent_dp_configure_rate()
1341 (read_val & 0x01) != 0, in cdns_torrent_dp_configure_rate()
1342 0, POLL_TIMEOUT_US); in cdns_torrent_dp_configure_rate()
1350 ((read_val >> 1) & 0x01) != 0, in cdns_torrent_dp_configure_rate()
1351 0, POLL_TIMEOUT_US); in cdns_torrent_dp_configure_rate()
1403 for (i = 0; i < dp->lanes; i++) { in cdns_torrent_dp_verify_config()
1415 return 0; in cdns_torrent_dp_verify_config()
1418 /* Set power state A0 and PLL clock enable to 0 on enabled lanes. */
1430 for (i = 0; i < num_lanes; i++) { in cdns_torrent_dp_set_a0_pll()
1434 pll_clk_en &= ~(0x01U << (inst->mlane + i)); in cdns_torrent_dp_set_a0_pll()
1450 u8 pma_tx_elec_idle_mask = 0; in cdns_torrent_dp_set_lanes()
1477 for (i = 0; i < inst->num_lanes; i++) in cdns_torrent_dp_set_lanes()
1488 for (i = 0; i < inst->num_lanes; i++) in cdns_torrent_dp_set_lanes()
1491 for (i = 0; i < inst->num_lanes; i++) in cdns_torrent_dp_set_lanes()
1558 for (lane = 0; lane < dp->lanes; lane++) { in cdns_torrent_dp_set_voltages()
1562 * Write 1 to register bit TX_DIAG_ACYA[0] to freeze the in cdns_torrent_dp_set_voltages()
1570 TX_TXCC_CTRL, 0x08A4); in cdns_torrent_dp_set_voltages()
1586 * Write 0 to register bit TX_DIAG_ACYA[0] to allow the state of in cdns_torrent_dp_set_voltages()
1603 return 0; in cdns_torrent_dp_configure()
1643 return 0; in cdns_torrent_phy_on()
1658 * PHY_PMA_CMN_CTRL1[0] == 1 in cdns_torrent_phy_on()
1678 return 0; in cdns_torrent_phy_on()
1688 return 0; in cdns_torrent_phy_off()
1704 cdns_torrent_dp_write(regmap, PHY_AUX_CTRL, 0x0003); /* enable AUX */ in cdns_torrent_dp_common_init()
1708 * Set lines pll clk enable to 0 in cdns_torrent_dp_common_init()
1719 val |= (0xF & lane_bits); in cdns_torrent_dp_common_init()
1749 regmap_field_write(cdns_phy->phy_reset_ctrl, 0x1); in cdns_torrent_dp_common_init()
1818 return 0; in cdns_torrent_derived_refclk_enable()
1825 regmap_field_write(derived_refclk->phy_pipe_cmn_ctrl1_0, 0); in cdns_torrent_derived_refclk_disable()
1826 regmap_field_write(derived_refclk->cmn_cdiag_refclk_ovrd_4, 0); in cdns_torrent_derived_refclk_disable()
1877 init->flags = 0; in cdns_torrent_derived_refclk_register()
1892 return 0; in cdns_torrent_derived_refclk_register()
1901 return 0; in cdns_torrent_received_refclk_enable()
1908 regmap_field_write(received_refclk->phy_pipe_cmn_ctrl1_0, 0); in cdns_torrent_received_refclk_disable()
1960 init->flags = 0; in cdns_torrent_received_refclk_register()
1975 return 0; in cdns_torrent_received_refclk_register()
1982 regmap_field_write(refclk_driver->cmn_fields[CMN_CDIAG_REFCLK_DRV0_CTRL_6], 0); in cdns_torrent_refclk_driver_enable()
1984 regmap_field_write(refclk_driver->cmn_fields[CMN_CDIAG_REFCLK_DRV0_CTRL_1], 0); in cdns_torrent_refclk_driver_enable()
1986 return 0; in cdns_torrent_refclk_driver_enable()
2012 return clk_mux_val_to_index(hw, cdns_torrent_refclk_driver_mux_table, 0, val); in cdns_torrent_refclk_driver_get_parent()
2055 for (i = 0; i < num_parents; i++) { in cdns_torrent_refclk_driver_register()
2077 for (i = 0; i < REFCLK_OUT_NUM_CMN_CONFIG; i++) { in cdns_torrent_refclk_driver_register()
2098 return 0; in cdns_torrent_refclk_driver_register()
2133 return 0; in cdns_torrent_dp_regfield_init()
2191 for (i = 0; i < MAX_NUM_LANES; i++) { in cdns_torrent_regfield_init()
2201 return 0; in cdns_torrent_regfield_init()
2224 return 0; in cdns_torrent_dp_regmap_init()
2239 for (i = 0; i < MAX_NUM_LANES; i++) { in cdns_torrent_regmap_init()
2304 return 0; in cdns_torrent_regmap_init()
2325 return 0; in cdns_torrent_phy_init()
2330 return 0; in cdns_torrent_phy_init()
2354 regmap_field_write(cdns_phy->phy_pll_cfg, reg_pairs[0].val); in cdns_torrent_phy_init()
2368 for (i = 0; i < inst->num_lanes; i++) { in cdns_torrent_phy_init()
2370 for (j = 0; j < num_regs; j++) in cdns_torrent_phy_init()
2385 for (i = 0; i < num_regs; i++) in cdns_torrent_phy_init()
2399 for (i = 0; i < num_regs; i++) in cdns_torrent_phy_init()
2413 for (i = 0; i < num_regs; i++) in cdns_torrent_phy_init()
2426 for (i = 0; i < inst->num_lanes; i++) { in cdns_torrent_phy_init()
2428 for (j = 0; j < num_regs; j++) in cdns_torrent_phy_init()
2442 for (i = 0; i < inst->num_lanes; i++) { in cdns_torrent_phy_init()
2444 for (j = 0; j < num_regs; j++) in cdns_torrent_phy_init()
2453 return 0; in cdns_torrent_phy_init()
2496 phy_t1 = cdns_phy->phys[0].phy_type; in cdns_torrent_phy_configure_multilink()
2511 phy_t1 = fns(cdns_phy->protocol_bitmask, 0); in cdns_torrent_phy_configure_multilink()
2529 for (protocol = 0; protocol < num_protocols; protocol++) { in cdns_torrent_phy_configure_multilink()
2547 for (node = 0; node < cdns_phy->nsubnodes; node++) { in cdns_torrent_phy_configure_multilink()
2578 reg_pairs[0].val); in cdns_torrent_phy_configure_multilink()
2591 for (i = 0; i < num_lanes; i++) { in cdns_torrent_phy_configure_multilink()
2593 for (j = 0; j < num_regs; j++) in cdns_torrent_phy_configure_multilink()
2607 for (i = 0; i < num_regs; i++) in cdns_torrent_phy_configure_multilink()
2621 for (i = 0; i < num_regs; i++) in cdns_torrent_phy_configure_multilink()
2634 for (i = 0; i < num_regs; i++) in cdns_torrent_phy_configure_multilink()
2646 for (i = 0; i < num_lanes; i++) { in cdns_torrent_phy_configure_multilink()
2648 for (j = 0; j < num_regs; j++) in cdns_torrent_phy_configure_multilink()
2661 for (i = 0; i < num_lanes; i++) { in cdns_torrent_phy_configure_multilink()
2663 for (j = 0; j < num_regs; j++) in cdns_torrent_phy_configure_multilink()
2684 return 0; in cdns_torrent_phy_configure_multilink()
2732 return 0; in cdns_torrent_clk_register()
2739 cdns_phy->phy_rst = devm_reset_control_get_exclusive_by_index(dev, 0); in cdns_torrent_of_get_reset()
2753 return 0; in cdns_torrent_of_get_reset()
2770 return 0; in cdns_torrent_of_get_clk()
2847 return 0; in cdns_torrent_clk()
2863 int ret, subnodes, node = 0, i; in cdns_torrent_phy_probe()
2864 u32 total_num_lanes = 0; in cdns_torrent_phy_probe()
2865 u8 init_dp_regmap = 0; in cdns_torrent_phy_probe()
2880 cdns_phy->protocol_bitmask = 0; in cdns_torrent_phy_probe()
2882 cdns_phy->sd_base = devm_platform_ioremap_resource(pdev, 0); in cdns_torrent_phy_probe()
2887 if (subnodes == 0) { in cdns_torrent_phy_probe()
3092 cdns_torrent_get_phy_type(cdns_phy->phys[0].phy_type), in cdns_torrent_phy_probe()
3093 cdns_phy->phys[0].num_lanes, in cdns_torrent_phy_probe()
3098 cdns_torrent_get_phy_type(cdns_phy->phys[0].phy_type), in cdns_torrent_phy_probe()
3099 cdns_phy->phys[0].num_lanes); in cdns_torrent_phy_probe()
3101 return 0; in cdns_torrent_phy_probe()
3106 for (i = 0; i < node; i++) in cdns_torrent_phy_probe()
3124 for (i = 0; i < cdns_phy->nsubnodes; i++) { in cdns_torrent_phy_remove()
3136 {0x0002, PHY_PLL_CFG}
3140 {0x0003, XCVR_DIAG_HSCLK_DIV},
3141 {0x0113, XCVR_DIAG_PLLDRC_CTRL}
3161 for (i = 0; i < cdns_phy->nsubnodes; i++) in cdns_torrent_phy_suspend_noirq()
3165 cdns_phy->already_configured = 0; in cdns_torrent_phy_suspend_noirq()
3171 return 0; in cdns_torrent_phy_suspend_noirq()
3193 return 0; in cdns_torrent_phy_resume_noirq()
3196 for (i = 0; i < node; i++) in cdns_torrent_phy_resume_noirq()
3212 {0x0002, PHY_PLL_CFG},
3213 {0x8600, CMN_PDIAG_PLL0_CLK_SEL_M0}
3217 {0x0000, XCVR_DIAG_HSCLK_SEL},
3218 {0x0001, XCVR_DIAG_HSCLK_DIV},
3219 {0x0041, XCVR_DIAG_PLLDRC_CTRL}
3223 {0x0001, XCVR_DIAG_HSCLK_SEL},
3224 {0x0009, XCVR_DIAG_PLLDRC_CTRL}
3244 {0x0002, PHY_PLL_CFG},
3245 {0x0400, CMN_PDIAG_PLL0_CLK_SEL_M0},
3246 {0x0601, CMN_PDIAG_PLL1_CLK_SEL_M0}
3250 {0x0000, XCVR_DIAG_HSCLK_SEL},
3251 {0x0001, XCVR_DIAG_HSCLK_DIV},
3252 {0x0001, XCVR_DIAG_PLLDRC_CTRL}
3256 {0x0111, XCVR_DIAG_HSCLK_SEL},
3257 {0x0103, XCVR_DIAG_HSCLK_DIV},
3258 {0x0A9B, XCVR_DIAG_PLLDRC_CTRL}
3278 {0x0014, CMN_PLL0_DSM_FBH_OVRD_M0},
3279 {0x0005, CMN_PLL0_DSM_FBL_OVRD_M0},
3280 {0x061B, CMN_PLL0_VCOCAL_INIT_TMR},
3281 {0x0019, CMN_PLL0_VCOCAL_ITER_TMR},
3282 {0x1354, CMN_PLL0_VCOCAL_REFTIM_START},
3283 {0x1354, CMN_PLL0_VCOCAL_PLLCNT_START},
3284 {0x0003, CMN_PLL0_VCOCAL_TCTRL},
3285 {0x0138, CMN_PLL0_LOCK_REFCNT_START},
3286 {0x0138, CMN_PLL0_LOCK_PLLCNT_START}
3296 {0x0028, CMN_PDIAG_PLL1_CP_PADJ_M0},
3297 {0x001E, CMN_PLL1_DSM_FBH_OVRD_M0},
3298 {0x000C, CMN_PLL1_DSM_FBL_OVRD_M0},
3299 {0x0003, CMN_PLL1_VCOCAL_TCTRL},
3300 {0x007F, CMN_TXPUCAL_TUNE},
3301 {0x007F, CMN_TXPDCAL_TUNE}
3311 {0x0014, CMN_SSM_BIAS_TMR},
3312 {0x0028, CMN_PLLSM0_PLLPRE_TMR},
3313 {0x00A4, CMN_PLLSM0_PLLLOCK_TMR},
3314 {0x0062, CMN_BGCAL_INIT_TMR},
3315 {0x0062, CMN_BGCAL_ITER_TMR},
3316 {0x0014, CMN_IBCAL_INIT_TMR},
3317 {0x0018, CMN_TXPUCAL_INIT_TMR},
3318 {0x0005, CMN_TXPUCAL_ITER_TMR},
3319 {0x0018, CMN_TXPDCAL_INIT_TMR},
3320 {0x0005, CMN_TXPDCAL_ITER_TMR},
3321 {0x024A, CMN_RXCAL_INIT_TMR},
3322 {0x0005, CMN_RXCAL_ITER_TMR},
3323 {0x000B, CMN_SD_CAL_REFTIM_START},
3324 {0x0132, CMN_SD_CAL_PLLCNT_START},
3325 {0x0014, CMN_PLL0_DSM_FBH_OVRD_M0},
3326 {0x0005, CMN_PLL0_DSM_FBL_OVRD_M0},
3327 {0x061B, CMN_PLL0_VCOCAL_INIT_TMR},
3328 {0x0019, CMN_PLL0_VCOCAL_ITER_TMR},
3329 {0x1354, CMN_PLL0_VCOCAL_REFTIM_START},
3330 {0x1354, CMN_PLL0_VCOCAL_PLLCNT_START},
3331 {0x0003, CMN_PLL0_VCOCAL_TCTRL},
3332 {0x0138, CMN_PLL0_LOCK_REFCNT_START},
3333 {0x0138, CMN_PLL0_LOCK_PLLCNT_START}
3343 {0x0028, CMN_PLLSM1_PLLPRE_TMR},
3344 {0x00A4, CMN_PLLSM1_PLLLOCK_TMR},
3345 {0x0028, CMN_PDIAG_PLL1_CP_PADJ_M0},
3346 {0x001E, CMN_PLL1_DSM_FBH_OVRD_M0},
3347 {0x000C, CMN_PLL1_DSM_FBL_OVRD_M0},
3348 {0x0003, CMN_PLL1_VCOCAL_TCTRL},
3349 {0x007F, CMN_TXPUCAL_TUNE},
3350 {0x007F, CMN_TXPDCAL_TUNE}
3360 {0x0003, PHY_PLL_CFG},
3361 {0x0601, CMN_PDIAG_PLL0_CLK_SEL_M0},
3362 {0x0400, CMN_PDIAG_PLL0_CLK_SEL_M1},
3363 {0x0400, CMN_PDIAG_PLL1_CLK_SEL_M0}
3367 {0x0000, XCVR_DIAG_HSCLK_SEL},
3368 {0x0001, XCVR_DIAG_HSCLK_DIV},
3369 {0x0012, XCVR_DIAG_PLLDRC_CTRL}
3373 {0x0011, XCVR_DIAG_HSCLK_SEL},
3374 {0x0001, XCVR_DIAG_HSCLK_DIV},
3375 {0x0089, XCVR_DIAG_PLLDRC_CTRL}
3397 {0x0028, CMN_PDIAG_PLL1_CP_PADJ_M0},
3398 {0x0014, CMN_PLL1_DSM_FBH_OVRD_M0},
3399 {0x0005, CMN_PLL1_DSM_FBL_OVRD_M0},
3400 {0x061B, CMN_PLL1_VCOCAL_INIT_TMR},
3401 {0x0019, CMN_PLL1_VCOCAL_ITER_TMR},
3402 {0x1354, CMN_PLL1_VCOCAL_REFTIM_START},
3403 {0x1354, CMN_PLL1_VCOCAL_PLLCNT_START},
3404 {0x0003, CMN_PLL1_VCOCAL_TCTRL},
3405 {0x0138, CMN_PLL1_LOCK_REFCNT_START},
3406 {0x0138, CMN_PLL1_LOCK_PLLCNT_START},
3407 {0x007F, CMN_TXPUCAL_TUNE},
3408 {0x007F, CMN_TXPDCAL_TUNE}
3412 {0x00F3, TX_PSC_A0},
3413 {0x04A2, TX_PSC_A2},
3414 {0x04A2, TX_PSC_A3 },
3415 {0x0000, TX_TXCC_CPOST_MULT_00},
3416 {0x0000, XCVR_DIAG_PSC_OVRD}
3420 {0x091D, RX_PSC_A0},
3421 {0x0900, RX_PSC_A2},
3422 {0x0100, RX_PSC_A3},
3423 {0x0030, RX_REE_SMGM_CTRL1},
3424 {0x03C7, RX_REE_GCSM1_EQENM_PH1},
3425 {0x01C7, RX_REE_GCSM1_EQENM_PH2},
3426 {0x0000, RX_DIAG_DFE_CTRL},
3427 {0x0019, RX_REE_TAP1_CLIP},
3428 {0x0019, RX_REE_TAP2TON_CLIP},
3429 {0x00B9, RX_DIAG_NQST_CTRL},
3430 {0x0C21, RX_DIAG_DFE_AMP_TUNE_2},
3431 {0x0002, RX_DIAG_DFE_AMP_TUNE_3},
3432 {0x0033, RX_DIAG_PI_RATE},
3433 {0x0001, RX_DIAG_ACYA},
3434 {0x018C, RX_CDRLF_CNFG}
3454 {0x0040, PHY_PMA_CMN_CTRL1},
3464 {0x0000, PHY_PLL_CFG},
3465 {0x0400, CMN_PDIAG_PLL0_CLK_SEL_M0}
3469 {0x0000, XCVR_DIAG_HSCLK_SEL},
3470 {0x0001, XCVR_DIAG_HSCLK_DIV},
3471 {0x0001, XCVR_DIAG_PLLDRC_CTRL}
3486 {0x0014, CMN_SSM_BIAS_TMR},
3487 {0x0028, CMN_PLLSM0_PLLPRE_TMR},
3488 {0x00A4, CMN_PLLSM0_PLLLOCK_TMR},
3489 {0x0028, CMN_PLLSM1_PLLPRE_TMR},
3490 {0x00A4, CMN_PLLSM1_PLLLOCK_TMR},
3491 {0x0062, CMN_BGCAL_INIT_TMR},
3492 {0x0062, CMN_BGCAL_ITER_TMR},
3493 {0x0014, CMN_IBCAL_INIT_TMR},
3494 {0x0018, CMN_TXPUCAL_INIT_TMR},
3495 {0x0005, CMN_TXPUCAL_ITER_TMR},
3496 {0x0018, CMN_TXPDCAL_INIT_TMR},
3497 {0x0005, CMN_TXPDCAL_ITER_TMR},
3498 {0x024A, CMN_RXCAL_INIT_TMR},
3499 {0x0005, CMN_RXCAL_ITER_TMR},
3500 {0x000B, CMN_SD_CAL_REFTIM_START},
3501 {0x0132, CMN_SD_CAL_PLLCNT_START},
3502 {0x0028, CMN_PDIAG_PLL1_CP_PADJ_M0},
3503 {0x0014, CMN_PLL0_DSM_FBH_OVRD_M0},
3504 {0x0014, CMN_PLL1_DSM_FBH_OVRD_M0},
3505 {0x0005, CMN_PLL0_DSM_FBL_OVRD_M0},
3506 {0x0005, CMN_PLL1_DSM_FBL_OVRD_M0},
3507 {0x061B, CMN_PLL0_VCOCAL_INIT_TMR},
3508 {0x061B, CMN_PLL1_VCOCAL_INIT_TMR},
3509 {0x0019, CMN_PLL0_VCOCAL_ITER_TMR},
3510 {0x0019, CMN_PLL1_VCOCAL_ITER_TMR},
3511 {0x1354, CMN_PLL0_VCOCAL_REFTIM_START},
3512 {0x1354, CMN_PLL1_VCOCAL_REFTIM_START},
3513 {0x1354, CMN_PLL0_VCOCAL_PLLCNT_START},
3514 {0x1354, CMN_PLL1_VCOCAL_PLLCNT_START},
3515 {0x0003, CMN_PLL0_VCOCAL_TCTRL},
3516 {0x0003, CMN_PLL1_VCOCAL_TCTRL},
3517 {0x0138, CMN_PLL0_LOCK_REFCNT_START},
3518 {0x0138, CMN_PLL1_LOCK_REFCNT_START},
3519 {0x0138, CMN_PLL0_LOCK_PLLCNT_START},
3520 {0x0138, CMN_PLL1_LOCK_PLLCNT_START}
3524 {0x07A2, TX_RCVDET_ST_TMR},
3525 {0x00F3, TX_PSC_A0},
3526 {0x04A2, TX_PSC_A2},
3527 {0x04A2, TX_PSC_A3},
3528 {0x0000, TX_TXCC_CPOST_MULT_00},
3529 {0x0000, XCVR_DIAG_PSC_OVRD}
3533 {0x0014, RX_SDCAL0_INIT_TMR},
3534 {0x0062, RX_SDCAL0_ITER_TMR},
3535 {0x0014, RX_SDCAL1_INIT_TMR},
3536 {0x0062, RX_SDCAL1_ITER_TMR},
3537 {0x091D, RX_PSC_A0},
3538 {0x0900, RX_PSC_A2},
3539 {0x0100, RX_PSC_A3},
3540 {0x0030, RX_REE_SMGM_CTRL1},
3541 {0x03C7, RX_REE_GCSM1_EQENM_PH1},
3542 {0x01C7, RX_REE_GCSM1_EQENM_PH2},
3543 {0x0000, RX_DIAG_DFE_CTRL},
3544 {0x0019, RX_REE_TAP1_CLIP},
3545 {0x0019, RX_REE_TAP2TON_CLIP},
3546 {0x00B9, RX_DIAG_NQST_CTRL},
3547 {0x0C21, RX_DIAG_DFE_AMP_TUNE_2},
3548 {0x0002, RX_DIAG_DFE_AMP_TUNE_3},
3549 {0x0033, RX_DIAG_PI_RATE},
3550 {0x0001, RX_DIAG_ACYA},
3551 {0x018C, RX_CDRLF_CNFG}
3571 {0x0003, PHY_PLL_CFG},
3572 {0x0601, CMN_PDIAG_PLL0_CLK_SEL_M0},
3573 {0x0400, CMN_PDIAG_PLL0_CLK_SEL_M1}
3577 {0x0000, XCVR_DIAG_HSCLK_SEL},
3578 {0x0001, XCVR_DIAG_HSCLK_DIV},
3579 {0x0012, XCVR_DIAG_PLLDRC_CTRL}
3583 {0x0001, XCVR_DIAG_HSCLK_SEL},
3584 {0x0009, XCVR_DIAG_PLLDRC_CTRL}
3604 {0x007F, CMN_TXPUCAL_TUNE},
3605 {0x007F, CMN_TXPDCAL_TUNE}
3609 {0x00FB, TX_PSC_A0},
3610 {0x04AA, TX_PSC_A2},
3611 {0x04AA, TX_PSC_A3},
3612 {0x000F, XCVR_DIAG_BIDI_CTRL}
3616 {0x0000, RX_PSC_A0},
3617 {0x0000, RX_PSC_A2},
3618 {0x0000, RX_PSC_A3},
3619 {0x0000, RX_PSC_CAL},
3620 {0x0000, RX_REE_GCSM1_CTRL},
3621 {0x0000, RX_REE_GCSM2_CTRL},
3622 {0x0000, RX_REE_PERGCSM_CTRL}
3642 {0x0000, PHY_PLL_CFG},
3646 {0x0000, XCVR_DIAG_HSCLK_SEL},
3647 {0x0001, XCVR_DIAG_PLLDRC_CTRL}
3662 {0x0014, CMN_SSM_BIAS_TMR},
3663 {0x0027, CMN_PLLSM0_PLLPRE_TMR},
3664 {0x00A1, CMN_PLLSM0_PLLLOCK_TMR},
3665 {0x0027, CMN_PLLSM1_PLLPRE_TMR},
3666 {0x00A1, CMN_PLLSM1_PLLLOCK_TMR},
3667 {0x0060, CMN_BGCAL_INIT_TMR},
3668 {0x0060, CMN_BGCAL_ITER_TMR},
3669 {0x0014, CMN_IBCAL_INIT_TMR},
3670 {0x0018, CMN_TXPUCAL_INIT_TMR},
3671 {0x0005, CMN_TXPUCAL_ITER_TMR},
3672 {0x0018, CMN_TXPDCAL_INIT_TMR},
3673 {0x0005, CMN_TXPDCAL_ITER_TMR},
3674 {0x0240, CMN_RXCAL_INIT_TMR},
3675 {0x0005, CMN_RXCAL_ITER_TMR},
3676 {0x0002, CMN_SD_CAL_INIT_TMR},
3677 {0x0002, CMN_SD_CAL_ITER_TMR},
3678 {0x000B, CMN_SD_CAL_REFTIM_START},
3679 {0x0137, CMN_SD_CAL_PLLCNT_START},
3680 {0x0509, CMN_PDIAG_PLL0_CP_PADJ_M0},
3681 {0x0F00, CMN_PDIAG_PLL0_CP_IADJ_M0},
3682 {0x0F08, CMN_PDIAG_PLL0_FILT_PADJ_M0},
3683 {0x0004, CMN_PLL0_DSM_DIAG_M0},
3684 {0x0509, CMN_PDIAG_PLL1_CP_PADJ_M0},
3685 {0x0F00, CMN_PDIAG_PLL1_CP_IADJ_M0},
3686 {0x0F08, CMN_PDIAG_PLL1_FILT_PADJ_M0},
3687 {0x0004, CMN_PLL1_DSM_DIAG_M0},
3688 {0x00C0, CMN_PLL0_VCOCAL_INIT_TMR},
3689 {0x0004, CMN_PLL0_VCOCAL_ITER_TMR},
3690 {0x00C0, CMN_PLL1_VCOCAL_INIT_TMR},
3691 {0x0004, CMN_PLL1_VCOCAL_ITER_TMR},
3692 {0x0260, CMN_PLL0_VCOCAL_REFTIM_START},
3693 {0x0003, CMN_PLL0_VCOCAL_TCTRL},
3694 {0x0260, CMN_PLL1_VCOCAL_REFTIM_START},
3695 {0x0003, CMN_PLL1_VCOCAL_TCTRL}
3699 {0x0780, TX_RCVDET_ST_TMR},
3700 {0x00FB, TX_PSC_A0},
3701 {0x04AA, TX_PSC_A2},
3702 {0x04AA, TX_PSC_A3},
3703 {0x000F, XCVR_DIAG_BIDI_CTRL}
3707 {0x0000, RX_PSC_A0},
3708 {0x0000, RX_PSC_A2},
3709 {0x0000, RX_PSC_A3},
3710 {0x0000, RX_PSC_CAL},
3711 {0x0000, RX_REE_GCSM1_CTRL},
3712 {0x0000, RX_REE_GCSM2_CTRL},
3713 {0x0000, RX_REE_PERGCSM_CTRL}
3733 {0x0019, CMN_SSM_BIAS_TMR},
3734 {0x0032, CMN_PLLSM0_PLLPRE_TMR},
3735 {0x00D1, CMN_PLLSM0_PLLLOCK_TMR},
3736 {0x0032, CMN_PLLSM1_PLLPRE_TMR},
3737 {0x00D1, CMN_PLLSM1_PLLLOCK_TMR},
3738 {0x007D, CMN_BGCAL_INIT_TMR},
3739 {0x007D, CMN_BGCAL_ITER_TMR},
3740 {0x0019, CMN_IBCAL_INIT_TMR},
3741 {0x001E, CMN_TXPUCAL_INIT_TMR},
3742 {0x0006, CMN_TXPUCAL_ITER_TMR},
3743 {0x001E, CMN_TXPDCAL_INIT_TMR},
3744 {0x0006, CMN_TXPDCAL_ITER_TMR},
3745 {0x02EE, CMN_RXCAL_INIT_TMR},
3746 {0x0006, CMN_RXCAL_ITER_TMR},
3747 {0x0002, CMN_SD_CAL_INIT_TMR},
3748 {0x0002, CMN_SD_CAL_ITER_TMR},
3749 {0x000E, CMN_SD_CAL_REFTIM_START},
3750 {0x012B, CMN_SD_CAL_PLLCNT_START},
3751 {0x0509, CMN_PDIAG_PLL0_CP_PADJ_M0},
3752 {0x0F00, CMN_PDIAG_PLL0_CP_IADJ_M0},
3753 {0x0F08, CMN_PDIAG_PLL0_FILT_PADJ_M0},
3754 {0x0004, CMN_PLL0_DSM_DIAG_M0},
3755 {0x0509, CMN_PDIAG_PLL1_CP_PADJ_M0},
3756 {0x0F00, CMN_PDIAG_PLL1_CP_IADJ_M0},
3757 {0x0F08, CMN_PDIAG_PLL1_FILT_PADJ_M0},
3758 {0x0004, CMN_PLL1_DSM_DIAG_M0},
3759 {0x00FA, CMN_PLL0_VCOCAL_INIT_TMR},
3760 {0x0004, CMN_PLL0_VCOCAL_ITER_TMR},
3761 {0x00FA, CMN_PLL1_VCOCAL_INIT_TMR},
3762 {0x0004, CMN_PLL1_VCOCAL_ITER_TMR},
3763 {0x0317, CMN_PLL0_VCOCAL_REFTIM_START},
3764 {0x0003, CMN_PLL0_VCOCAL_TCTRL},
3765 {0x0317, CMN_PLL1_VCOCAL_REFTIM_START},
3766 {0x0003, CMN_PLL1_VCOCAL_TCTRL}
3770 {0x09C4, TX_RCVDET_ST_TMR},
3771 {0x00FB, TX_PSC_A0},
3772 {0x04AA, TX_PSC_A2},
3773 {0x04AA, TX_PSC_A3},
3774 {0x000F, XCVR_DIAG_BIDI_CTRL}
3778 {0x0000, RX_PSC_A0},
3779 {0x0000, RX_PSC_A2},
3780 {0x0000, RX_PSC_A3},
3781 {0x0000, RX_PSC_CAL},
3782 {0x0000, RX_REE_GCSM1_CTRL},
3783 {0x0000, RX_REE_GCSM2_CTRL},
3784 {0x0000, RX_REE_PERGCSM_CTRL}
3804 {0x0003, CMN_PLL0_VCOCAL_TCTRL},
3805 {0x0003, CMN_PLL1_VCOCAL_TCTRL}
3809 {0x00FB, TX_PSC_A0},
3810 {0x04AA, TX_PSC_A2},
3811 {0x04AA, TX_PSC_A3},
3812 {0x000F, XCVR_DIAG_BIDI_CTRL}
3816 {0x0000, RX_PSC_A0},
3817 {0x0000, RX_PSC_A2},
3818 {0x0000, RX_PSC_A3},
3819 {0x0000, RX_PSC_CAL},
3820 {0x0000, RX_REE_GCSM1_CTRL},
3821 {0x0000, RX_REE_GCSM2_CTRL},
3822 {0x0000, RX_REE_PERGCSM_CTRL}
3842 {0x0002, PHY_PLL_CFG},
3843 {0x8600, CMN_PDIAG_PLL0_CLK_SEL_M0},
3844 {0x0601, CMN_PDIAG_PLL1_CLK_SEL_M0}
3848 {0x0000, XCVR_DIAG_HSCLK_SEL},
3849 {0x0001, XCVR_DIAG_HSCLK_DIV},
3850 {0x0041, XCVR_DIAG_PLLDRC_CTRL}
3854 {0x0011, XCVR_DIAG_HSCLK_SEL},
3855 {0x0003, XCVR_DIAG_HSCLK_DIV},
3856 {0x009B, XCVR_DIAG_PLLDRC_CTRL}
3876 {0x0003, PHY_PLL_CFG},
3877 {0x0601, CMN_PDIAG_PLL0_CLK_SEL_M0},
3878 {0x0400, CMN_PDIAG_PLL0_CLK_SEL_M1},
3879 {0x8600, CMN_PDIAG_PLL1_CLK_SEL_M0}
3883 {0x0000, XCVR_DIAG_HSCLK_SEL},
3884 {0x0001, XCVR_DIAG_HSCLK_DIV},
3885 {0x0012, XCVR_DIAG_PLLDRC_CTRL}
3889 {0x0011, XCVR_DIAG_HSCLK_SEL},
3890 {0x0001, XCVR_DIAG_HSCLK_DIV},
3891 {0x00C9, XCVR_DIAG_PLLDRC_CTRL}
3911 {0x0004, CMN_PLL0_DSM_DIAG_M0},
3912 {0x0004, CMN_PLL0_DSM_DIAG_M1},
3913 {0x0004, CMN_PLL1_DSM_DIAG_M0},
3914 {0x0509, CMN_PDIAG_PLL0_CP_PADJ_M0},
3915 {0x0509, CMN_PDIAG_PLL0_CP_PADJ_M1},
3916 {0x0509, CMN_PDIAG_PLL1_CP_PADJ_M0},
3917 {0x0F00, CMN_PDIAG_PLL0_CP_IADJ_M0},
3918 {0x0F00, CMN_PDIAG_PLL0_CP_IADJ_M1},
3919 {0x0F00, CMN_PDIAG_PLL1_CP_IADJ_M0},
3920 {0x0F08, CMN_PDIAG_PLL0_FILT_PADJ_M0},
3921 {0x0F08, CMN_PDIAG_PLL0_FILT_PADJ_M1},
3922 {0x0F08, CMN_PDIAG_PLL1_FILT_PADJ_M0},
3923 {0x0064, CMN_PLL0_INTDIV_M0},
3924 {0x0050, CMN_PLL0_INTDIV_M1},
3925 {0x0064, CMN_PLL1_INTDIV_M0},
3926 {0x0002, CMN_PLL0_FRACDIVH_M0},
3927 {0x0002, CMN_PLL0_FRACDIVH_M1},
3928 {0x0002, CMN_PLL1_FRACDIVH_M0},
3929 {0x0044, CMN_PLL0_HIGH_THR_M0},
3930 {0x0036, CMN_PLL0_HIGH_THR_M1},
3931 {0x0044, CMN_PLL1_HIGH_THR_M0},
3932 {0x0002, CMN_PDIAG_PLL0_CTRL_M0},
3933 {0x0002, CMN_PDIAG_PLL0_CTRL_M1},
3934 {0x0002, CMN_PDIAG_PLL1_CTRL_M0},
3935 {0x0001, CMN_PLL0_SS_CTRL1_M0},
3936 {0x0001, CMN_PLL0_SS_CTRL1_M1},
3937 {0x0001, CMN_PLL1_SS_CTRL1_M0},
3938 {0x011B, CMN_PLL0_SS_CTRL2_M0},
3939 {0x011B, CMN_PLL0_SS_CTRL2_M1},
3940 {0x011B, CMN_PLL1_SS_CTRL2_M0},
3941 {0x006E, CMN_PLL0_SS_CTRL3_M0},
3942 {0x0058, CMN_PLL0_SS_CTRL3_M1},
3943 {0x006E, CMN_PLL1_SS_CTRL3_M0},
3944 {0x000E, CMN_PLL0_SS_CTRL4_M0},
3945 {0x0012, CMN_PLL0_SS_CTRL4_M1},
3946 {0x000E, CMN_PLL1_SS_CTRL4_M0},
3947 {0x0C5E, CMN_PLL0_VCOCAL_REFTIM_START},
3948 {0x0C5E, CMN_PLL1_VCOCAL_REFTIM_START},
3949 {0x0C56, CMN_PLL0_VCOCAL_PLLCNT_START},
3950 {0x0C56, CMN_PLL1_VCOCAL_PLLCNT_START},
3951 {0x00C7, CMN_PLL0_LOCK_REFCNT_START},
3952 {0x00C7, CMN_PLL1_LOCK_REFCNT_START},
3953 {0x00C7, CMN_PLL0_LOCK_PLLCNT_START},
3954 {0x00C7, CMN_PLL1_LOCK_PLLCNT_START},
3955 {0x0005, CMN_PLL0_LOCK_PLLCNT_THR},
3956 {0x0005, CMN_PLL1_LOCK_PLLCNT_THR},
3957 {0x8200, CMN_CDIAG_CDB_PWRI_OVRD},
3958 {0x8200, CMN_CDIAG_XCVRC_PWRI_OVRD},
3959 {0x007F, CMN_TXPUCAL_TUNE},
3960 {0x007F, CMN_TXPDCAL_TUNE}
3970 {0x0000, PHY_PLL_CFG},
3971 {0x8600, CMN_PDIAG_PLL0_CLK_SEL_M0}
3975 {0x0000, XCVR_DIAG_HSCLK_SEL},
3976 {0x0001, XCVR_DIAG_HSCLK_DIV},
3977 {0x0041, XCVR_DIAG_PLLDRC_CTRL}
3992 {0x0A0A, PHY_PIPE_USB3_GEN2_PRE_CFG0},
3993 {0x1000, PHY_PIPE_USB3_GEN2_POST_CFG0},
3994 {0x0010, PHY_PIPE_USB3_GEN2_POST_CFG1}
4004 {0x0028, CMN_PDIAG_PLL1_CP_PADJ_M0},
4005 {0x001E, CMN_PLL1_DSM_FBH_OVRD_M0},
4006 {0x000C, CMN_PLL1_DSM_FBL_OVRD_M0},
4007 {0x0003, CMN_PLL0_VCOCAL_TCTRL},
4008 {0x0003, CMN_PLL1_VCOCAL_TCTRL},
4009 {0x8200, CMN_CDIAG_CDB_PWRI_OVRD},
4010 {0x8200, CMN_CDIAG_XCVRC_PWRI_OVRD}
4019 {0x8200, CMN_CDIAG_CDB_PWRI_OVRD},
4020 {0x8200, CMN_CDIAG_XCVRC_PWRI_OVRD},
4021 {0x007F, CMN_TXPUCAL_TUNE},
4022 {0x007F, CMN_TXPDCAL_TUNE}
4026 {0x02FF, TX_PSC_A0},
4027 {0x06AF, TX_PSC_A1},
4028 {0x06AE, TX_PSC_A2},
4029 {0x06AE, TX_PSC_A3},
4030 {0x2A82, TX_TXCC_CTRL},
4031 {0x0014, TX_TXCC_CPOST_MULT_01},
4032 {0x0003, XCVR_DIAG_PSC_OVRD}
4036 {0x0D1D, RX_PSC_A0},
4037 {0x0D1D, RX_PSC_A1},
4038 {0x0D00, RX_PSC_A2},
4039 {0x0500, RX_PSC_A3},
4040 {0x0013, RX_SIGDET_HL_FILT_TMR},
4041 {0x0000, RX_REE_GCSM1_CTRL},
4042 {0x0C02, RX_REE_ATTEN_THR},
4043 {0x0330, RX_REE_SMGM_CTRL1},
4044 {0x0300, RX_REE_SMGM_CTRL2},
4045 {0x0019, RX_REE_TAP1_CLIP},
4046 {0x0019, RX_REE_TAP2TON_CLIP},
4047 {0x1004, RX_DIAG_SIGDET_TUNE},
4048 {0x00F9, RX_DIAG_NQST_CTRL},
4049 {0x0C01, RX_DIAG_DFE_AMP_TUNE_2},
4050 {0x0002, RX_DIAG_DFE_AMP_TUNE_3},
4051 {0x0000, RX_DIAG_PI_CAP},
4052 {0x0031, RX_DIAG_PI_RATE},
4053 {0x0001, RX_DIAG_ACYA},
4054 {0x018C, RX_CDRLF_CNFG},
4055 {0x0003, RX_CDRLF_CNFG3}
4075 {0x0004, CMN_PLL0_DSM_DIAG_M0},
4076 {0x0004, CMN_PLL1_DSM_DIAG_M0},
4077 {0x0509, CMN_PDIAG_PLL0_CP_PADJ_M0},
4078 {0x0509, CMN_PDIAG_PLL1_CP_PADJ_M0},
4079 {0x0F00, CMN_PDIAG_PLL0_CP_IADJ_M0},
4080 {0x0F00, CMN_PDIAG_PLL1_CP_IADJ_M0},
4081 {0x0F08, CMN_PDIAG_PLL0_FILT_PADJ_M0},
4082 {0x0F08, CMN_PDIAG_PLL1_FILT_PADJ_M0},
4083 {0x0064, CMN_PLL0_INTDIV_M0},
4084 {0x0064, CMN_PLL1_INTDIV_M0},
4085 {0x0002, CMN_PLL0_FRACDIVH_M0},
4086 {0x0002, CMN_PLL1_FRACDIVH_M0},
4087 {0x0044, CMN_PLL0_HIGH_THR_M0},
4088 {0x0044, CMN_PLL1_HIGH_THR_M0},
4089 {0x0002, CMN_PDIAG_PLL0_CTRL_M0},
4090 {0x0002, CMN_PDIAG_PLL1_CTRL_M0},
4091 {0x0001, CMN_PLL0_SS_CTRL1_M0},
4092 {0x0001, CMN_PLL1_SS_CTRL1_M0},
4093 {0x011B, CMN_PLL0_SS_CTRL2_M0},
4094 {0x011B, CMN_PLL1_SS_CTRL2_M0},
4095 {0x006E, CMN_PLL0_SS_CTRL3_M0},
4096 {0x006E, CMN_PLL1_SS_CTRL3_M0},
4097 {0x000E, CMN_PLL0_SS_CTRL4_M0},
4098 {0x000E, CMN_PLL1_SS_CTRL4_M0},
4099 {0x0C5E, CMN_PLL0_VCOCAL_REFTIM_START},
4100 {0x0C5E, CMN_PLL1_VCOCAL_REFTIM_START},
4101 {0x0C56, CMN_PLL0_VCOCAL_PLLCNT_START},
4102 {0x0C56, CMN_PLL1_VCOCAL_PLLCNT_START},
4103 {0x0003, CMN_PLL0_VCOCAL_TCTRL},
4104 {0x0003, CMN_PLL1_VCOCAL_TCTRL},
4105 {0x00C7, CMN_PLL0_LOCK_REFCNT_START},
4106 {0x00C7, CMN_PLL1_LOCK_REFCNT_START},
4107 {0x00C7, CMN_PLL0_LOCK_PLLCNT_START},
4108 {0x00C7, CMN_PLL1_LOCK_PLLCNT_START},
4109 {0x0005, CMN_PLL0_LOCK_PLLCNT_THR},
4110 {0x0005, CMN_PLL1_LOCK_PLLCNT_THR},
4111 {0x8200, CMN_CDIAG_CDB_PWRI_OVRD},
4112 {0x8200, CMN_CDIAG_XCVRC_PWRI_OVRD}
4122 {0x0003, PHY_PLL_CFG},
4123 {0x0601, CMN_PDIAG_PLL0_CLK_SEL_M0},
4124 {0x0400, CMN_PDIAG_PLL0_CLK_SEL_M1},
4125 {0x0601, CMN_PDIAG_PLL1_CLK_SEL_M0}
4129 {0x0000, XCVR_DIAG_HSCLK_SEL},
4130 {0x0001, XCVR_DIAG_HSCLK_DIV},
4131 {0x0012, XCVR_DIAG_PLLDRC_CTRL}
4135 {0x0011, XCVR_DIAG_HSCLK_SEL},
4136 {0x0003, XCVR_DIAG_HSCLK_DIV},
4137 {0x009B, XCVR_DIAG_PLLDRC_CTRL}
4157 {0x0028, CMN_PDIAG_PLL1_CP_PADJ_M0},
4158 {0x001E, CMN_PLL1_DSM_FBH_OVRD_M0},
4159 {0x000C, CMN_PLL1_DSM_FBL_OVRD_M0},
4160 {0x0003, CMN_PLL0_VCOCAL_TCTRL},
4161 {0x0003, CMN_PLL1_VCOCAL_TCTRL}
4170 {0x007F, CMN_TXPUCAL_TUNE},
4171 {0x007F, CMN_TXPDCAL_TUNE}
4175 {0x00F3, TX_PSC_A0},
4176 {0x04A2, TX_PSC_A2},
4177 {0x04A2, TX_PSC_A3},
4178 {0x0000, TX_TXCC_CPOST_MULT_00},
4179 {0x00B3, DRV_DIAG_TX_DRV},
4180 {0x0002, XCVR_DIAG_PSC_OVRD}
4184 {0x00F3, TX_PSC_A0},
4185 {0x04A2, TX_PSC_A2},
4186 {0x04A2, TX_PSC_A3},
4187 {0x0000, TX_TXCC_CPOST_MULT_00},
4188 {0x00B3, DRV_DIAG_TX_DRV},
4189 {0x0002, XCVR_DIAG_PSC_OVRD},
4190 {0x4000, XCVR_DIAG_RXCLK_CTRL}
4194 {0x091D, RX_PSC_A0},
4195 {0x0900, RX_PSC_A2},
4196 {0x0100, RX_PSC_A3},
4197 {0x03C7, RX_REE_GCSM1_EQENM_PH1},
4198 {0x01C7, RX_REE_GCSM1_EQENM_PH2},
4199 {0x0000, RX_DIAG_DFE_CTRL},
4200 {0x0019, RX_REE_TAP1_CLIP},
4201 {0x0019, RX_REE_TAP2TON_CLIP},
4202 {0x0098, RX_DIAG_NQST_CTRL},
4203 {0x0C01, RX_DIAG_DFE_AMP_TUNE_2},
4204 {0x0000, RX_DIAG_DFE_AMP_TUNE_3},
4205 {0x0000, RX_DIAG_PI_CAP},
4206 {0x0010, RX_DIAG_PI_RATE},
4207 {0x0001, RX_DIAG_ACYA},
4208 {0x018C, RX_CDRLF_CNFG},
4233 {0x07A2, TX_RCVDET_ST_TMR},
4234 {0x00F3, TX_PSC_A0},
4235 {0x04A2, TX_PSC_A2},
4236 {0x04A2, TX_PSC_A3 },
4237 {0x0000, TX_TXCC_CPOST_MULT_00},
4238 {0x00B3, DRV_DIAG_TX_DRV},
4239 {0x0002, XCVR_DIAG_PSC_OVRD},
4240 {0x4000, XCVR_DIAG_RXCLK_CTRL}
4249 {0x0014, RX_SDCAL0_INIT_TMR},
4250 {0x0062, RX_SDCAL0_ITER_TMR},
4251 {0x0014, RX_SDCAL1_INIT_TMR},
4252 {0x0062, RX_SDCAL1_ITER_TMR},
4253 {0x091D, RX_PSC_A0},
4254 {0x0900, RX_PSC_A2},
4255 {0x0100, RX_PSC_A3},
4256 {0x03C7, RX_REE_GCSM1_EQENM_PH1},
4257 {0x01C7, RX_REE_GCSM1_EQENM_PH2},
4258 {0x0000, RX_DIAG_DFE_CTRL},
4259 {0x0019, RX_REE_TAP1_CLIP},
4260 {0x0019, RX_REE_TAP2TON_CLIP},
4261 {0x0098, RX_DIAG_NQST_CTRL},
4262 {0x0C01, RX_DIAG_DFE_AMP_TUNE_2},
4263 {0x0000, RX_DIAG_DFE_AMP_TUNE_3},
4264 {0x0000, RX_DIAG_PI_CAP},
4265 {0x0010, RX_DIAG_PI_RATE},
4266 {0x0001, RX_DIAG_ACYA},
4267 {0x018C, RX_CDRLF_CNFG}
4277 {0x0004, CMN_PLL0_DSM_DIAG_M0},
4278 {0x0004, CMN_PLL0_DSM_DIAG_M1},
4279 {0x0004, CMN_PLL1_DSM_DIAG_M0},
4280 {0x0509, CMN_PDIAG_PLL0_CP_PADJ_M0},
4281 {0x0509, CMN_PDIAG_PLL0_CP_PADJ_M1},
4282 {0x0509, CMN_PDIAG_PLL1_CP_PADJ_M0},
4283 {0x0F00, CMN_PDIAG_PLL0_CP_IADJ_M0},
4284 {0x0F00, CMN_PDIAG_PLL0_CP_IADJ_M1},
4285 {0x0F00, CMN_PDIAG_PLL1_CP_IADJ_M0},
4286 {0x0F08, CMN_PDIAG_PLL0_FILT_PADJ_M0},
4287 {0x0F08, CMN_PDIAG_PLL0_FILT_PADJ_M1},
4288 {0x0F08, CMN_PDIAG_PLL1_FILT_PADJ_M0},
4289 {0x0064, CMN_PLL0_INTDIV_M0},
4290 {0x0050, CMN_PLL0_INTDIV_M1},
4291 {0x0064, CMN_PLL1_INTDIV_M0},
4292 {0x0002, CMN_PLL0_FRACDIVH_M0},
4293 {0x0002, CMN_PLL0_FRACDIVH_M1},
4294 {0x0002, CMN_PLL1_FRACDIVH_M0},
4295 {0x0044, CMN_PLL0_HIGH_THR_M0},
4296 {0x0036, CMN_PLL0_HIGH_THR_M1},
4297 {0x0044, CMN_PLL1_HIGH_THR_M0},
4298 {0x0002, CMN_PDIAG_PLL0_CTRL_M0},
4299 {0x0002, CMN_PDIAG_PLL0_CTRL_M1},
4300 {0x0002, CMN_PDIAG_PLL1_CTRL_M0},
4301 {0x0001, CMN_PLL0_SS_CTRL1_M0},
4302 {0x0001, CMN_PLL0_SS_CTRL1_M1},
4303 {0x0001, CMN_PLL1_SS_CTRL1_M0},
4304 {0x011B, CMN_PLL0_SS_CTRL2_M0},
4305 {0x011B, CMN_PLL0_SS_CTRL2_M1},
4306 {0x011B, CMN_PLL1_SS_CTRL2_M0},
4307 {0x006E, CMN_PLL0_SS_CTRL3_M0},
4308 {0x0058, CMN_PLL0_SS_CTRL3_M1},
4309 {0x006E, CMN_PLL1_SS_CTRL3_M0},
4310 {0x000E, CMN_PLL0_SS_CTRL4_M0},
4311 {0x0012, CMN_PLL0_SS_CTRL4_M1},
4312 {0x000E, CMN_PLL1_SS_CTRL4_M0},
4313 {0x0C5E, CMN_PLL0_VCOCAL_REFTIM_START},
4314 {0x0C5E, CMN_PLL1_VCOCAL_REFTIM_START},
4315 {0x0C56, CMN_PLL0_VCOCAL_PLLCNT_START},
4316 {0x0C56, CMN_PLL1_VCOCAL_PLLCNT_START},
4317 {0x00C7, CMN_PLL0_LOCK_REFCNT_START},
4318 {0x00C7, CMN_PLL1_LOCK_REFCNT_START},
4319 {0x00C7, CMN_PLL0_LOCK_PLLCNT_START},
4320 {0x00C7, CMN_PLL1_LOCK_PLLCNT_START},
4321 {0x0005, CMN_PLL0_LOCK_PLLCNT_THR},
4322 {0x0005, CMN_PLL1_LOCK_PLLCNT_THR},
4323 {0x007F, CMN_TXPUCAL_TUNE},
4324 {0x007F, CMN_TXPDCAL_TUNE}
4334 {0x0028, CMN_PDIAG_PLL1_CP_PADJ_M0},
4335 {0x001E, CMN_PLL1_DSM_FBH_OVRD_M0},
4336 {0x000C, CMN_PLL1_DSM_FBL_OVRD_M0},
4337 {0x0003, CMN_PLL0_VCOCAL_TCTRL},
4338 {0x0003, CMN_PLL1_VCOCAL_TCTRL}
4347 {0x007F, CMN_TXPUCAL_TUNE},
4348 {0x007F, CMN_TXPDCAL_TUNE}
4352 {0x00F3, TX_PSC_A0},
4353 {0x04A2, TX_PSC_A2},
4354 {0x04A2, TX_PSC_A3},
4355 {0x0000, TX_TXCC_CPOST_MULT_00},
4356 {0x0011, TX_TXCC_MGNFS_MULT_100},
4357 {0x0003, DRV_DIAG_TX_DRV},
4358 {0x0002, XCVR_DIAG_PSC_OVRD}
4362 {0x00F3, TX_PSC_A0},
4363 {0x04A2, TX_PSC_A2},
4364 {0x04A2, TX_PSC_A3},
4365 {0x0000, TX_TXCC_CPOST_MULT_00},
4366 {0x0011, TX_TXCC_MGNFS_MULT_100},
4367 {0x0003, DRV_DIAG_TX_DRV},
4368 {0x0002, XCVR_DIAG_PSC_OVRD},
4369 {0x4000, XCVR_DIAG_RXCLK_CTRL}
4373 {0x091D, RX_PSC_A0},
4374 {0x0900, RX_PSC_A2},
4375 {0x0100, RX_PSC_A3},
4376 {0x03C7, RX_REE_GCSM1_EQENM_PH1},
4377 {0x01C7, RX_REE_GCSM1_EQENM_PH2},
4378 {0x0000, RX_DIAG_DFE_CTRL},
4379 {0x0019, RX_REE_TAP1_CLIP},
4380 {0x0019, RX_REE_TAP2TON_CLIP},
4381 {0x0098, RX_DIAG_NQST_CTRL},
4382 {0x0C01, RX_DIAG_DFE_AMP_TUNE_2},
4383 {0x0000, RX_DIAG_DFE_AMP_TUNE_3},
4384 {0x0000, RX_DIAG_PI_CAP},
4385 {0x0010, RX_DIAG_PI_RATE},
4386 {0x0001, RX_DIAG_ACYA},
4387 {0x018C, RX_CDRLF_CNFG},
4412 {0x07A2, TX_RCVDET_ST_TMR},
4413 {0x00F3, TX_PSC_A0},
4414 {0x04A2, TX_PSC_A2},
4415 {0x04A2, TX_PSC_A3 },
4416 {0x0000, TX_TXCC_CPOST_MULT_00},
4417 {0x0011, TX_TXCC_MGNFS_MULT_100},
4418 {0x0003, DRV_DIAG_TX_DRV},
4419 {0x0002, XCVR_DIAG_PSC_OVRD},
4420 {0x4000, XCVR_DIAG_RXCLK_CTRL}
4429 {0x0014, RX_SDCAL0_INIT_TMR},
4430 {0x0062, RX_SDCAL0_ITER_TMR},
4431 {0x0014, RX_SDCAL1_INIT_TMR},
4432 {0x0062, RX_SDCAL1_ITER_TMR},
4433 {0x091D, RX_PSC_A0},
4434 {0x0900, RX_PSC_A2},
4435 {0x0100, RX_PSC_A3},
4436 {0x03C7, RX_REE_GCSM1_EQENM_PH1},
4437 {0x01C7, RX_REE_GCSM1_EQENM_PH2},
4438 {0x0000, RX_DIAG_DFE_CTRL},
4439 {0x0019, RX_REE_TAP1_CLIP},
4440 {0x0019, RX_REE_TAP2TON_CLIP},
4441 {0x0098, RX_DIAG_NQST_CTRL},
4442 {0x0C01, RX_DIAG_DFE_AMP_TUNE_2},
4443 {0x0000, RX_DIAG_DFE_AMP_TUNE_3},
4444 {0x0000, RX_DIAG_PI_CAP},
4445 {0x0010, RX_DIAG_PI_RATE},
4446 {0x0001, RX_DIAG_ACYA},
4447 {0x018C, RX_CDRLF_CNFG}
4457 {0x0004, CMN_PLL0_DSM_DIAG_M0},
4458 {0x0004, CMN_PLL0_DSM_DIAG_M1},
4459 {0x0004, CMN_PLL1_DSM_DIAG_M0},
4460 {0x0509, CMN_PDIAG_PLL0_CP_PADJ_M0},
4461 {0x0509, CMN_PDIAG_PLL0_CP_PADJ_M1},
4462 {0x0509, CMN_PDIAG_PLL1_CP_PADJ_M0},
4463 {0x0F00, CMN_PDIAG_PLL0_CP_IADJ_M0},
4464 {0x0F00, CMN_PDIAG_PLL0_CP_IADJ_M1},
4465 {0x0F00, CMN_PDIAG_PLL1_CP_IADJ_M0},
4466 {0x0F08, CMN_PDIAG_PLL0_FILT_PADJ_M0},
4467 {0x0F08, CMN_PDIAG_PLL0_FILT_PADJ_M1},
4468 {0x0F08, CMN_PDIAG_PLL1_FILT_PADJ_M0},
4469 {0x0064, CMN_PLL0_INTDIV_M0},
4470 {0x0050, CMN_PLL0_INTDIV_M1},
4471 {0x0064, CMN_PLL1_INTDIV_M0},
4472 {0x0002, CMN_PLL0_FRACDIVH_M0},
4473 {0x0002, CMN_PLL0_FRACDIVH_M1},
4474 {0x0002, CMN_PLL1_FRACDIVH_M0},
4475 {0x0044, CMN_PLL0_HIGH_THR_M0},
4476 {0x0036, CMN_PLL0_HIGH_THR_M1},
4477 {0x0044, CMN_PLL1_HIGH_THR_M0},
4478 {0x0002, CMN_PDIAG_PLL0_CTRL_M0},
4479 {0x0002, CMN_PDIAG_PLL0_CTRL_M1},
4480 {0x0002, CMN_PDIAG_PLL1_CTRL_M0},
4481 {0x0001, CMN_PLL0_SS_CTRL1_M0},
4482 {0x0001, CMN_PLL0_SS_CTRL1_M1},
4483 {0x0001, CMN_PLL1_SS_CTRL1_M0},
4484 {0x011B, CMN_PLL0_SS_CTRL2_M0},
4485 {0x011B, CMN_PLL0_SS_CTRL2_M1},
4486 {0x011B, CMN_PLL1_SS_CTRL2_M0},
4487 {0x006E, CMN_PLL0_SS_CTRL3_M0},
4488 {0x0058, CMN_PLL0_SS_CTRL3_M1},
4489 {0x006E, CMN_PLL1_SS_CTRL3_M0},
4490 {0x000E, CMN_PLL0_SS_CTRL4_M0},
4491 {0x0012, CMN_PLL0_SS_CTRL4_M1},
4492 {0x000E, CMN_PLL1_SS_CTRL4_M0},
4493 {0x0C5E, CMN_PLL0_VCOCAL_REFTIM_START},
4494 {0x0C5E, CMN_PLL1_VCOCAL_REFTIM_START},
4495 {0x0C56, CMN_PLL0_VCOCAL_PLLCNT_START},
4496 {0x0C56, CMN_PLL1_VCOCAL_PLLCNT_START},
4497 {0x00C7, CMN_PLL0_LOCK_REFCNT_START},
4498 {0x00C7, CMN_PLL1_LOCK_REFCNT_START},
4499 {0x00C7, CMN_PLL0_LOCK_PLLCNT_START},
4500 {0x00C7, CMN_PLL1_LOCK_PLLCNT_START},
4501 {0x0005, CMN_PLL0_LOCK_PLLCNT_THR},
4502 {0x0005, CMN_PLL1_LOCK_PLLCNT_THR},
4503 {0x007F, CMN_TXPUCAL_TUNE},
4504 {0x007F, CMN_TXPDCAL_TUNE}
4514 {0x0000, PHY_PLL_CFG},
4515 {0x0601, CMN_PDIAG_PLL0_CLK_SEL_M0}
4519 {0x0000, XCVR_DIAG_HSCLK_SEL},
4520 {0x0003, XCVR_DIAG_HSCLK_DIV},
4521 {0x0013, XCVR_DIAG_PLLDRC_CTRL}
4536 {0x0004, CMN_PLL0_DSM_DIAG_M0},
4537 {0x0004, CMN_PLL0_DSM_DIAG_M1},
4538 {0x0004, CMN_PLL1_DSM_DIAG_M0},
4539 {0x0509, CMN_PDIAG_PLL0_CP_PADJ_M0},
4540 {0x0509, CMN_PDIAG_PLL0_CP_PADJ_M1},
4541 {0x0509, CMN_PDIAG_PLL1_CP_PADJ_M0},
4542 {0x0F00, CMN_PDIAG_PLL0_CP_IADJ_M0},
4543 {0x0F00, CMN_PDIAG_PLL0_CP_IADJ_M1},
4544 {0x0F00, CMN_PDIAG_PLL1_CP_IADJ_M0},
4545 {0x0F08, CMN_PDIAG_PLL0_FILT_PADJ_M0},
4546 {0x0F08, CMN_PDIAG_PLL0_FILT_PADJ_M1},
4547 {0x0F08, CMN_PDIAG_PLL1_FILT_PADJ_M0},
4548 {0x0064, CMN_PLL0_INTDIV_M0},
4549 {0x0050, CMN_PLL0_INTDIV_M1},
4550 {0x0064, CMN_PLL1_INTDIV_M0},
4551 {0x0002, CMN_PLL0_FRACDIVH_M0},
4552 {0x0002, CMN_PLL0_FRACDIVH_M1},
4553 {0x0002, CMN_PLL1_FRACDIVH_M0},
4554 {0x0044, CMN_PLL0_HIGH_THR_M0},
4555 {0x0036, CMN_PLL0_HIGH_THR_M1},
4556 {0x0044, CMN_PLL1_HIGH_THR_M0},
4557 {0x0002, CMN_PDIAG_PLL0_CTRL_M0},
4558 {0x0002, CMN_PDIAG_PLL0_CTRL_M1},
4559 {0x0002, CMN_PDIAG_PLL1_CTRL_M0},
4560 {0x0001, CMN_PLL0_SS_CTRL1_M0},
4561 {0x0001, CMN_PLL0_SS_CTRL1_M1},
4562 {0x0001, CMN_PLL1_SS_CTRL1_M0},
4563 {0x011B, CMN_PLL0_SS_CTRL2_M0},
4564 {0x011B, CMN_PLL0_SS_CTRL2_M1},
4565 {0x011B, CMN_PLL1_SS_CTRL2_M0},
4566 {0x006E, CMN_PLL0_SS_CTRL3_M0},
4567 {0x0058, CMN_PLL0_SS_CTRL3_M1},
4568 {0x006E, CMN_PLL1_SS_CTRL3_M0},
4569 {0x000E, CMN_PLL0_SS_CTRL4_M0},
4570 {0x0012, CMN_PLL0_SS_CTRL4_M1},
4571 {0x000E, CMN_PLL1_SS_CTRL4_M0},
4572 {0x0C5E, CMN_PLL0_VCOCAL_REFTIM_START},
4573 {0x0C5E, CMN_PLL1_VCOCAL_REFTIM_START},
4574 {0x0C56, CMN_PLL0_VCOCAL_PLLCNT_START},
4575 {0x0C56, CMN_PLL1_VCOCAL_PLLCNT_START},
4576 {0x00C7, CMN_PLL0_LOCK_REFCNT_START},
4577 {0x00C7, CMN_PLL1_LOCK_REFCNT_START},
4578 {0x00C7, CMN_PLL0_LOCK_PLLCNT_START},
4579 {0x00C7, CMN_PLL1_LOCK_PLLCNT_START},
4580 {0x0005, CMN_PLL0_LOCK_PLLCNT_THR},
4581 {0x0005, CMN_PLL1_LOCK_PLLCNT_THR}
4591 {0x0004, CMN_PLL0_DSM_DIAG_M0},
4592 {0x0004, CMN_PLL0_DSM_DIAG_M1},
4593 {0x0004, CMN_PLL1_DSM_DIAG_M0},
4594 {0x0509, CMN_PDIAG_PLL0_CP_PADJ_M0},
4595 {0x0509, CMN_PDIAG_PLL0_CP_PADJ_M1},
4596 {0x0509, CMN_PDIAG_PLL1_CP_PADJ_M0},
4597 {0x0F00, CMN_PDIAG_PLL0_CP_IADJ_M0},
4598 {0x0F00, CMN_PDIAG_PLL0_CP_IADJ_M1},
4599 {0x0F00, CMN_PDIAG_PLL1_CP_IADJ_M0},
4600 {0x0F08, CMN_PDIAG_PLL0_FILT_PADJ_M0},
4601 {0x0F08, CMN_PDIAG_PLL0_FILT_PADJ_M1},
4602 {0x0F08, CMN_PDIAG_PLL1_FILT_PADJ_M0},
4603 {0x0064, CMN_PLL0_INTDIV_M0},
4604 {0x0050, CMN_PLL0_INTDIV_M1},
4605 {0x0050, CMN_PLL1_INTDIV_M0},
4606 {0x0002, CMN_PLL0_FRACDIVH_M0},
4607 {0x0002, CMN_PLL0_FRACDIVH_M1},
4608 {0x0002, CMN_PLL1_FRACDIVH_M0},
4609 {0x0044, CMN_PLL0_HIGH_THR_M0},
4610 {0x0036, CMN_PLL0_HIGH_THR_M1},
4611 {0x0036, CMN_PLL1_HIGH_THR_M0},
4612 {0x0002, CMN_PDIAG_PLL0_CTRL_M0},
4613 {0x0002, CMN_PDIAG_PLL0_CTRL_M1},
4614 {0x0002, CMN_PDIAG_PLL1_CTRL_M0},
4615 {0x0001, CMN_PLL0_SS_CTRL1_M0},
4616 {0x0001, CMN_PLL0_SS_CTRL1_M1},
4617 {0x0001, CMN_PLL1_SS_CTRL1_M0},
4618 {0x011B, CMN_PLL0_SS_CTRL2_M0},
4619 {0x011B, CMN_PLL0_SS_CTRL2_M1},
4620 {0x011B, CMN_PLL1_SS_CTRL2_M0},
4621 {0x006E, CMN_PLL0_SS_CTRL3_M0},
4622 {0x0058, CMN_PLL0_SS_CTRL3_M1},
4623 {0x0058, CMN_PLL1_SS_CTRL3_M0},
4624 {0x000E, CMN_PLL0_SS_CTRL4_M0},
4625 {0x0012, CMN_PLL0_SS_CTRL4_M1},
4626 {0x0012, CMN_PLL1_SS_CTRL4_M0},
4627 {0x0C5E, CMN_PLL0_VCOCAL_REFTIM_START},
4628 {0x0C5E, CMN_PLL1_VCOCAL_REFTIM_START},
4629 {0x0C56, CMN_PLL0_VCOCAL_PLLCNT_START},
4630 {0x0C56, CMN_PLL1_VCOCAL_PLLCNT_START},
4631 {0x00C7, CMN_PLL0_LOCK_REFCNT_START},
4632 {0x00C7, CMN_PLL1_LOCK_REFCNT_START},
4633 {0x00C7, CMN_PLL0_LOCK_PLLCNT_START},
4634 {0x00C7, CMN_PLL1_LOCK_PLLCNT_START},
4635 {0x0005, CMN_PLL0_LOCK_PLLCNT_THR},
4636 {0x0005, CMN_PLL1_LOCK_PLLCNT_THR}
4646 {0x0028, CMN_PDIAG_PLL1_CP_PADJ_M0},
4647 {0x001E, CMN_PLL1_DSM_FBH_OVRD_M0},
4648 {0x000C, CMN_PLL1_DSM_FBL_OVRD_M0}
4652 {0x0019, RX_REE_TAP1_CLIP},
4653 {0x0019, RX_REE_TAP2TON_CLIP},
4654 {0x0001, RX_DIAG_ACYA}
4994 .block_offset_shift = 0x2,
4995 .reg_offset_shift = 0x2,
5112 .block_offset_shift = 0x0,
5113 .reg_offset_shift = 0x1,
5392 .block_offset_shift = 0x0,
5393 .reg_offset_shift = 0x1,