114 	 * on the downstream component before the upstream. So, don't attempt to  in pci_restore_aspm_l1ss_state()
115 	 * restore either until we are at the downstream component.  in pci_restore_aspm_l1ss_state()
147 	 * Disable L1.2 on this downstream endpoint device first, followed  in pci_restore_aspm_l1ss_state()
196 #define PCIE_LINK_STATE_L0S_DW	BIT(1)	/* Downstream direction L0s state */
209 	struct pci_dev *downstream;	/* Downstream component, function 0 */  member
400 	/* Check downstream component if bit Slot Clock Configuration is 1 */  in pcie_aspm_configure_common_clock()
430 	/* Configure downstream component, all functions */  in pcie_aspm_configure_common_clock()
587 		/* Check downstream direction L0s latency */  in pcie_aspm_check_latency()
618 	struct pci_dev *child = link->downstream, *parent = link->pdev;  in aspm_calc_l12_info()
650 	 * downstream devices report (via LTR) that they can tolerate at  in aspm_calc_l12_info()
716 	struct pci_dev *child = link->downstream, *parent = link->pdev;  in aspm_l1ss_init()
773 	struct pci_dev *child = link->downstream, *parent = link->pdev;  in pcie_aspm_cap_init()
798 	 * Re-read upstream/downstream components' register state after  in pcie_aspm_cap_init()
852 	struct pci_dev *child = link->downstream, *parent = link->pdev;  in pcie_config_aspm_l1ss()
911 	struct pci_dev *child = link->downstream, *parent = link->pdev;  in pcie_config_aspm_link()
930 	/* Convert ASPM state to upstream/downstream ASPM register state */  in pcie_config_aspm_link()
946 	 * upstream component first and then downstream, and vice  in pcie_config_aspm_link()
959 	pci_save_aspm_l1ss_state(link->downstream);  in pcie_config_aspm_link()
960 	pci_update_aspm_saved_state(link->downstream);  in pcie_config_aspm_link()
1024 	link->downstream = pci_function_0(pdev->subordinate);  in alloc_pcie_link_state()
1029 	 * the root ports entirely, in which case a downstream port on  in alloc_pcie_link_state()
1066  * @pdev: the root port or switch downstream port
1082 	 * downstream port.  in pcie_aspm_init_link_state()
1245 	 * link->downstream is a pointer to the pci_dev of function 0.  If  in pcie_aspm_exit_link_state()
1247 	 * so we can't use link->downstream again.  Free the link state to  in pcie_aspm_exit_link_state()
1270  * @pdev: the root port or switch downstream port