Lines Matching full:ctrl
49 static inline struct pci_dev *ctrl_dev(struct controller *ctrl) in ctrl_dev() argument
51 return ctrl->pcie->port; in ctrl_dev()
58 static inline int pciehp_request_irq(struct controller *ctrl) in pciehp_request_irq() argument
60 int retval, irq = ctrl->pcie->irq; in pciehp_request_irq()
63 ctrl->poll_thread = kthread_run(&pciehp_poll, ctrl, in pciehp_request_irq()
65 slot_name(ctrl)); in pciehp_request_irq()
66 return PTR_ERR_OR_ZERO(ctrl->poll_thread); in pciehp_request_irq()
71 IRQF_SHARED, "pciehp", ctrl); in pciehp_request_irq()
73 ctrl_err(ctrl, "Cannot get irq %d for the hotplug controller\n", in pciehp_request_irq()
78 static inline void pciehp_free_irq(struct controller *ctrl) in pciehp_free_irq() argument
81 kthread_stop(ctrl->poll_thread); in pciehp_free_irq()
83 free_irq(ctrl->pcie->irq, ctrl); in pciehp_free_irq()
86 static int pcie_poll_cmd(struct controller *ctrl, int timeout) in pcie_poll_cmd() argument
88 struct pci_dev *pdev = ctrl_dev(ctrl); in pcie_poll_cmd()
94 ctrl_info(ctrl, "%s: no response from device\n", in pcie_poll_cmd()
102 ctrl->cmd_busy = 0; in pcie_poll_cmd()
112 static void pcie_wait_cmd(struct controller *ctrl) in pcie_wait_cmd() argument
116 unsigned long cmd_timeout = ctrl->cmd_started + duration; in pcie_wait_cmd()
124 if (NO_CMD_CMPL(ctrl)) in pcie_wait_cmd()
127 if (!ctrl->cmd_busy) in pcie_wait_cmd()
140 if (ctrl->slot_ctrl & PCI_EXP_SLTCTL_HPIE && in pcie_wait_cmd()
141 ctrl->slot_ctrl & PCI_EXP_SLTCTL_CCIE) in pcie_wait_cmd()
142 rc = wait_event_timeout(ctrl->queue, !ctrl->cmd_busy, timeout); in pcie_wait_cmd()
144 rc = pcie_poll_cmd(ctrl, jiffies_to_msecs(timeout)); in pcie_wait_cmd()
147 ctrl_info(ctrl, "Timeout on hotplug command %#06x (issued %u msec ago)\n", in pcie_wait_cmd()
148 ctrl->slot_ctrl, in pcie_wait_cmd()
149 jiffies_to_msecs(jiffies - ctrl->cmd_started)); in pcie_wait_cmd()
157 static void pcie_do_write_cmd(struct controller *ctrl, u16 cmd, in pcie_do_write_cmd() argument
160 struct pci_dev *pdev = ctrl_dev(ctrl); in pcie_do_write_cmd()
163 mutex_lock(&ctrl->ctrl_lock); in pcie_do_write_cmd()
168 pcie_wait_cmd(ctrl); in pcie_do_write_cmd()
172 ctrl_info(ctrl, "%s: no response from device\n", __func__); in pcie_do_write_cmd()
179 ctrl->cmd_busy = 1; in pcie_do_write_cmd()
181 ctrl->slot_ctrl = slot_ctrl; in pcie_do_write_cmd()
183 ctrl->cmd_started = jiffies; in pcie_do_write_cmd()
194 ctrl->cmd_busy = 0; in pcie_do_write_cmd()
201 pcie_wait_cmd(ctrl); in pcie_do_write_cmd()
204 mutex_unlock(&ctrl->ctrl_lock); in pcie_do_write_cmd()
209 * @ctrl: controller to which the command is issued
213 static void pcie_write_cmd(struct controller *ctrl, u16 cmd, u16 mask) in pcie_write_cmd() argument
215 pcie_do_write_cmd(ctrl, cmd, mask, true); in pcie_write_cmd()
219 static void pcie_write_cmd_nowait(struct controller *ctrl, u16 cmd, u16 mask) in pcie_write_cmd_nowait() argument
221 pcie_do_write_cmd(ctrl, cmd, mask, false); in pcie_write_cmd_nowait()
226 * @ctrl: PCIe hotplug controller
235 int pciehp_check_link_active(struct controller *ctrl) in pciehp_check_link_active() argument
237 struct pci_dev *pdev = ctrl_dev(ctrl); in pciehp_check_link_active()
246 ctrl_dbg(ctrl, "%s: lnk_status = %x\n", __func__, lnk_status); in pciehp_check_link_active()
291 int pciehp_check_link_status(struct controller *ctrl) in pciehp_check_link_status() argument
293 struct pci_dev *pdev = ctrl_dev(ctrl); in pciehp_check_link_status()
298 ctrl_info(ctrl, "Slot(%s): No link\n", slot_name(ctrl)); in pciehp_check_link_status()
302 if (ctrl->inband_presence_disabled) in pciehp_check_link_status()
305 found = pci_bus_check_dev(ctrl->pcie->port->subordinate, in pciehp_check_link_status()
311 &ctrl->pending_events); in pciehp_check_link_status()
314 ctrl_dbg(ctrl, "%s: lnk_status = %x\n", __func__, lnk_status); in pciehp_check_link_status()
317 ctrl_info(ctrl, "Slot(%s): Cannot train link: status %#06x\n", in pciehp_check_link_status()
318 slot_name(ctrl), lnk_status); in pciehp_check_link_status()
322 pcie_update_link_speed(ctrl->pcie->port->subordinate, lnk_status); in pciehp_check_link_status()
325 ctrl_info(ctrl, "Slot(%s): No device found\n", in pciehp_check_link_status()
326 slot_name(ctrl)); in pciehp_check_link_status()
333 static int __pciehp_link_set(struct controller *ctrl, bool enable) in __pciehp_link_set() argument
335 struct pci_dev *pdev = ctrl_dev(ctrl); in __pciehp_link_set()
344 static int pciehp_link_enable(struct controller *ctrl) in pciehp_link_enable() argument
346 return __pciehp_link_set(ctrl, true); in pciehp_link_enable()
352 struct controller *ctrl = to_ctrl(hotplug_slot); in pciehp_get_raw_indicator_status() local
353 struct pci_dev *pdev = ctrl_dev(ctrl); in pciehp_get_raw_indicator_status()
365 struct controller *ctrl = to_ctrl(hotplug_slot); in pciehp_get_attention_status() local
366 struct pci_dev *pdev = ctrl_dev(ctrl); in pciehp_get_attention_status()
372 ctrl_dbg(ctrl, "%s: SLOTCTRL %x, value read %x\n", __func__, in pciehp_get_attention_status()
373 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_ctrl); in pciehp_get_attention_status()
393 void pciehp_get_power_status(struct controller *ctrl, u8 *status) in pciehp_get_power_status() argument
395 struct pci_dev *pdev = ctrl_dev(ctrl); in pciehp_get_power_status()
399 ctrl_dbg(ctrl, "%s: SLOTCTRL %x value read %x\n", __func__, in pciehp_get_power_status()
400 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_ctrl); in pciehp_get_power_status()
415 void pciehp_get_latch_status(struct controller *ctrl, u8 *status) in pciehp_get_latch_status() argument
417 struct pci_dev *pdev = ctrl_dev(ctrl); in pciehp_get_latch_status()
426 * @ctrl: PCIe hotplug controller
436 int pciehp_card_present(struct controller *ctrl) in pciehp_card_present() argument
438 struct pci_dev *pdev = ctrl_dev(ctrl); in pciehp_card_present()
451 * @ctrl: PCIe hotplug controller
461 int pciehp_card_present_or_link_active(struct controller *ctrl) in pciehp_card_present_or_link_active() argument
465 ret = pciehp_card_present(ctrl); in pciehp_card_present_or_link_active()
469 return pciehp_check_link_active(ctrl); in pciehp_card_present_or_link_active()
472 int pciehp_query_power_fault(struct controller *ctrl) in pciehp_query_power_fault() argument
474 struct pci_dev *pdev = ctrl_dev(ctrl); in pciehp_query_power_fault()
484 struct controller *ctrl = to_ctrl(hotplug_slot); in pciehp_set_raw_indicator_status() local
485 struct pci_dev *pdev = ctrl_dev(ctrl); in pciehp_set_raw_indicator_status()
490 pcie_write_cmd_nowait(ctrl, FIELD_PREP(PCI_EXP_SLTCTL_AIC | PCI_EXP_SLTCTL_PIC, status), in pciehp_set_raw_indicator_status()
498 * @ctrl: PCIe hotplug controller
511 void pciehp_set_indicators(struct controller *ctrl, int pwr, int attn) in pciehp_set_indicators() argument
515 if (PWR_LED(ctrl) && pwr != INDICATOR_NOOP) { in pciehp_set_indicators()
520 if (ATTN_LED(ctrl) && attn != INDICATOR_NOOP) { in pciehp_set_indicators()
526 pcie_write_cmd_nowait(ctrl, cmd, mask); in pciehp_set_indicators()
527 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, in pciehp_set_indicators()
528 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, cmd); in pciehp_set_indicators()
532 int pciehp_power_on_slot(struct controller *ctrl) in pciehp_power_on_slot() argument
534 struct pci_dev *pdev = ctrl_dev(ctrl); in pciehp_power_on_slot()
543 ctrl->power_fault_detected = 0; in pciehp_power_on_slot()
545 pcie_write_cmd(ctrl, PCI_EXP_SLTCTL_PWR_ON, PCI_EXP_SLTCTL_PCC); in pciehp_power_on_slot()
546 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, in pciehp_power_on_slot()
547 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, in pciehp_power_on_slot()
550 retval = pciehp_link_enable(ctrl); in pciehp_power_on_slot()
552 ctrl_err(ctrl, "%s: Can not enable the link!\n", __func__); in pciehp_power_on_slot()
557 void pciehp_power_off_slot(struct controller *ctrl) in pciehp_power_off_slot() argument
559 pcie_write_cmd(ctrl, PCI_EXP_SLTCTL_PWR_OFF, PCI_EXP_SLTCTL_PCC); in pciehp_power_off_slot()
560 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, in pciehp_power_off_slot()
561 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, in pciehp_power_off_slot()
565 static void pciehp_ignore_dpc_link_change(struct controller *ctrl, in pciehp_ignore_dpc_link_change() argument
573 atomic_and(~PCI_EXP_SLTSTA_DLLSC, &ctrl->pending_events); in pciehp_ignore_dpc_link_change()
577 ctrl_info(ctrl, "Slot(%s): Link Down/Up ignored (recovered by DPC)\n", in pciehp_ignore_dpc_link_change()
578 slot_name(ctrl)); in pciehp_ignore_dpc_link_change()
585 down_read_nested(&ctrl->reset_lock, ctrl->depth); in pciehp_ignore_dpc_link_change()
586 if (!pciehp_check_link_active(ctrl)) in pciehp_ignore_dpc_link_change()
587 pciehp_request(ctrl, PCI_EXP_SLTSTA_DLLSC); in pciehp_ignore_dpc_link_change()
588 up_read(&ctrl->reset_lock); in pciehp_ignore_dpc_link_change()
593 struct controller *ctrl = (struct controller *)dev_id; in pciehp_isr() local
594 struct pci_dev *pdev = ctrl_dev(ctrl); in pciehp_isr()
603 (!(ctrl->slot_ctrl & PCI_EXP_SLTCTL_HPIE) && !pciehp_poll_mode)) in pciehp_isr()
616 atomic_or(RERUN_ISR, &ctrl->pending_events); in pciehp_isr()
624 ctrl_info(ctrl, "%s: no response from device\n", __func__); in pciehp_isr()
642 if (ctrl->power_fault_detected) in pciehp_isr()
645 ctrl->power_fault_detected = true; in pciehp_isr()
667 ctrl_dbg(ctrl, "pending interrupts %#06x from Slot Status\n", events); in pciehp_isr()
676 ctrl->cmd_busy = 0; in pciehp_isr()
678 wake_up(&ctrl->queue); in pciehp_isr()
687 ctrl_dbg(ctrl, "ignoring hotplug event %#06x\n", events); in pciehp_isr()
692 atomic_or(events, &ctrl->pending_events); in pciehp_isr()
698 struct controller *ctrl = (struct controller *)dev_id; in pciehp_ist() local
699 struct pci_dev *pdev = ctrl_dev(ctrl); in pciehp_ist()
703 ctrl->ist_running = true; in pciehp_ist()
707 if (atomic_fetch_and(~RERUN_ISR, &ctrl->pending_events) & RERUN_ISR) { in pciehp_ist()
715 events = atomic_xchg(&ctrl->pending_events, 0); in pciehp_ist()
723 pciehp_handle_button_press(ctrl); in pciehp_ist()
727 ctrl_err(ctrl, "Slot(%s): Power fault\n", slot_name(ctrl)); in pciehp_ist()
728 pciehp_set_indicators(ctrl, PCI_EXP_SLTCTL_PWR_IND_OFF, in pciehp_ist()
737 ctrl->state == ON_STATE) { in pciehp_ist()
739 pciehp_ignore_dpc_link_change(ctrl, pdev, irq); in pciehp_ist()
746 down_read_nested(&ctrl->reset_lock, ctrl->depth); in pciehp_ist()
748 pciehp_handle_disable_request(ctrl); in pciehp_ist()
750 pciehp_handle_presence_or_link_change(ctrl, events); in pciehp_ist()
751 up_read(&ctrl->reset_lock); in pciehp_ist()
756 ctrl->ist_running = false; in pciehp_ist()
757 wake_up(&ctrl->requester); in pciehp_ist()
763 struct controller *ctrl = data; in pciehp_poll() local
769 while (pciehp_isr(IRQ_NOTCONNECTED, ctrl) == IRQ_WAKE_THREAD || in pciehp_poll()
770 atomic_read(&ctrl->pending_events)) in pciehp_poll()
771 pciehp_ist(IRQ_NOTCONNECTED, ctrl); in pciehp_poll()
782 static void pcie_enable_notification(struct controller *ctrl) in pcie_enable_notification() argument
803 if (ATTN_BUTTN(ctrl)) in pcie_enable_notification()
809 if (!pciehp_poll_mode && !NO_CMD_CMPL(ctrl)) in pcie_enable_notification()
817 pcie_write_cmd_nowait(ctrl, cmd, mask); in pcie_enable_notification()
818 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, in pcie_enable_notification()
819 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, cmd); in pcie_enable_notification()
822 static void pcie_disable_notification(struct controller *ctrl) in pcie_disable_notification() argument
830 pcie_write_cmd(ctrl, 0, mask); in pcie_disable_notification()
831 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, in pcie_disable_notification()
832 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, 0); in pcie_disable_notification()
835 void pcie_clear_hotplug_events(struct controller *ctrl) in pcie_clear_hotplug_events() argument
837 pcie_capability_write_word(ctrl_dev(ctrl), PCI_EXP_SLTSTA, in pcie_clear_hotplug_events()
841 void pcie_enable_interrupt(struct controller *ctrl) in pcie_enable_interrupt() argument
846 pcie_write_cmd(ctrl, mask, mask); in pcie_enable_interrupt()
849 void pcie_disable_interrupt(struct controller *ctrl) in pcie_disable_interrupt() argument
861 pcie_write_cmd(ctrl, 0, mask); in pcie_disable_interrupt()
876 struct controller *ctrl = get_service_data(dev); in pciehp_slot_reset() local
878 if (ctrl->state != ON_STATE) in pciehp_slot_reset()
884 if (!pciehp_check_link_active(ctrl)) in pciehp_slot_reset()
885 pciehp_request(ctrl, PCI_EXP_SLTSTA_DLLSC); in pciehp_slot_reset()
900 struct controller *ctrl = to_ctrl(hotplug_slot); in pciehp_reset_slot() local
901 struct pci_dev *pdev = ctrl_dev(ctrl); in pciehp_reset_slot()
908 down_write_nested(&ctrl->reset_lock, ctrl->depth); in pciehp_reset_slot()
910 if (!ATTN_BUTTN(ctrl)) { in pciehp_reset_slot()
917 pcie_write_cmd(ctrl, 0, ctrl_mask); in pciehp_reset_slot()
918 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, in pciehp_reset_slot()
919 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, 0); in pciehp_reset_slot()
921 rc = pci_bridge_secondary_bus_reset(ctrl->pcie->port); in pciehp_reset_slot()
924 pcie_write_cmd_nowait(ctrl, ctrl_mask, ctrl_mask); in pciehp_reset_slot()
925 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, in pciehp_reset_slot()
926 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, ctrl_mask); in pciehp_reset_slot()
928 up_write(&ctrl->reset_lock); in pciehp_reset_slot()
932 int pcie_init_notification(struct controller *ctrl) in pcie_init_notification() argument
934 if (pciehp_request_irq(ctrl)) in pcie_init_notification()
936 pcie_enable_notification(ctrl); in pcie_init_notification()
937 ctrl->notification_enabled = 1; in pcie_init_notification()
941 void pcie_shutdown_notification(struct controller *ctrl) in pcie_shutdown_notification() argument
943 if (ctrl->notification_enabled) { in pcie_shutdown_notification()
944 pcie_disable_notification(ctrl); in pcie_shutdown_notification()
945 pciehp_free_irq(ctrl); in pcie_shutdown_notification()
946 ctrl->notification_enabled = 0; in pcie_shutdown_notification()
950 static inline void dbg_ctrl(struct controller *ctrl) in dbg_ctrl() argument
952 struct pci_dev *pdev = ctrl->pcie->port; in dbg_ctrl()
955 ctrl_dbg(ctrl, "Slot Capabilities : 0x%08x\n", ctrl->slot_cap); in dbg_ctrl()
957 ctrl_dbg(ctrl, "Slot Status : 0x%04x\n", reg16); in dbg_ctrl()
959 ctrl_dbg(ctrl, "Slot Control : 0x%04x\n", reg16); in dbg_ctrl()
980 struct controller *ctrl; in pcie_init() local
986 ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL); in pcie_init()
987 if (!ctrl) in pcie_init()
990 ctrl->pcie = dev; in pcie_init()
991 ctrl->depth = pcie_hotplug_depth(dev->port); in pcie_init()
1004 ctrl->slot_cap = slot_cap; in pcie_init()
1005 mutex_init(&ctrl->ctrl_lock); in pcie_init()
1006 mutex_init(&ctrl->state_lock); in pcie_init()
1007 init_rwsem(&ctrl->reset_lock); in pcie_init()
1008 init_waitqueue_head(&ctrl->requester); in pcie_init()
1009 init_waitqueue_head(&ctrl->queue); in pcie_init()
1010 INIT_DELAYED_WORK(&ctrl->button_work, pciehp_queue_pushbutton_work); in pcie_init()
1011 dbg_ctrl(ctrl); in pcie_init()
1014 ctrl->state = list_empty(&subordinate->devices) ? OFF_STATE : ON_STATE; in pcie_init()
1019 pcie_write_cmd_nowait(ctrl, PCI_EXP_SLTCTL_IBPD_DISABLE, in pcie_init()
1021 ctrl->inband_presence_disabled = 1; in pcie_init()
1025 ctrl->inband_presence_disabled = 1; in pcie_init()
1033 …ctrl_info(ctrl, "Slot #%d AttnBtn%c PwrCtrl%c MRL%c AttnInd%c PwrInd%c HotPlug%c Surprise%c Interl… in pcie_init()
1052 if (POWER_CTRL(ctrl)) { in pcie_init()
1053 pciehp_get_power_status(ctrl, &poweron); in pcie_init()
1054 if (!pciehp_card_present_or_link_active(ctrl) && poweron) { in pcie_init()
1055 pcie_disable_notification(ctrl); in pcie_init()
1056 pciehp_power_off_slot(ctrl); in pcie_init()
1062 ctrl->dsn = pci_get_dsn(pdev); in pcie_init()
1065 return ctrl; in pcie_init()
1068 void pciehp_release_ctrl(struct controller *ctrl) in pciehp_release_ctrl() argument
1070 cancel_delayed_work_sync(&ctrl->button_work); in pciehp_release_ctrl()
1071 kfree(ctrl); in pciehp_release_ctrl()