Lines Matching +full:mgmt +full:- +full:sticky
1 // SPDX-License-Identifier: GPL-2.0+
7 * Author: Shawn Lin <shawn.lin@rock-chips.com>
8 * Wenrui Li <wenrui.li@rock-chips.com>
25 #include "pcie-rockchip.h"
29 struct device *dev = rockchip->dev; in rockchip_pcie_parse_dt()
31 struct device_node *node = dev->of_node; in rockchip_pcie_parse_dt()
35 if (rockchip->is_rc) { in rockchip_pcie_parse_dt()
38 "axi-base"); in rockchip_pcie_parse_dt()
39 rockchip->reg_base = devm_pci_remap_cfg_resource(dev, regs); in rockchip_pcie_parse_dt()
40 if (IS_ERR(rockchip->reg_base)) in rockchip_pcie_parse_dt()
41 return PTR_ERR(rockchip->reg_base); in rockchip_pcie_parse_dt()
43 rockchip->mem_res = in rockchip_pcie_parse_dt()
45 "mem-base"); in rockchip_pcie_parse_dt()
46 if (!rockchip->mem_res) in rockchip_pcie_parse_dt()
47 return -EINVAL; in rockchip_pcie_parse_dt()
50 rockchip->apb_base = in rockchip_pcie_parse_dt()
51 devm_platform_ioremap_resource_byname(pdev, "apb-base"); in rockchip_pcie_parse_dt()
52 if (IS_ERR(rockchip->apb_base)) in rockchip_pcie_parse_dt()
53 return PTR_ERR(rockchip->apb_base); in rockchip_pcie_parse_dt()
59 rockchip->lanes = 1; in rockchip_pcie_parse_dt()
60 err = of_property_read_u32(node, "num-lanes", &rockchip->lanes); in rockchip_pcie_parse_dt()
61 if (!err && (rockchip->lanes == 0 || in rockchip_pcie_parse_dt()
62 rockchip->lanes == 3 || in rockchip_pcie_parse_dt()
63 rockchip->lanes > 4)) { in rockchip_pcie_parse_dt()
64 dev_warn(dev, "invalid num-lanes, default to use one lane\n"); in rockchip_pcie_parse_dt()
65 rockchip->lanes = 1; in rockchip_pcie_parse_dt()
68 rockchip->link_gen = of_pci_get_max_link_speed(node); in rockchip_pcie_parse_dt()
69 if (rockchip->link_gen < 0 || rockchip->link_gen > 2) in rockchip_pcie_parse_dt()
70 rockchip->link_gen = 2; in rockchip_pcie_parse_dt()
72 rockchip->core_rst = devm_reset_control_get_exclusive(dev, "core"); in rockchip_pcie_parse_dt()
73 if (IS_ERR(rockchip->core_rst)) { in rockchip_pcie_parse_dt()
74 if (PTR_ERR(rockchip->core_rst) != -EPROBE_DEFER) in rockchip_pcie_parse_dt()
76 return PTR_ERR(rockchip->core_rst); in rockchip_pcie_parse_dt()
79 rockchip->mgmt_rst = devm_reset_control_get_exclusive(dev, "mgmt"); in rockchip_pcie_parse_dt()
80 if (IS_ERR(rockchip->mgmt_rst)) { in rockchip_pcie_parse_dt()
81 if (PTR_ERR(rockchip->mgmt_rst) != -EPROBE_DEFER) in rockchip_pcie_parse_dt()
82 dev_err(dev, "missing mgmt reset property in node\n"); in rockchip_pcie_parse_dt()
83 return PTR_ERR(rockchip->mgmt_rst); in rockchip_pcie_parse_dt()
86 rockchip->mgmt_sticky_rst = devm_reset_control_get_exclusive(dev, in rockchip_pcie_parse_dt()
87 "mgmt-sticky"); in rockchip_pcie_parse_dt()
88 if (IS_ERR(rockchip->mgmt_sticky_rst)) { in rockchip_pcie_parse_dt()
89 if (PTR_ERR(rockchip->mgmt_sticky_rst) != -EPROBE_DEFER) in rockchip_pcie_parse_dt()
90 dev_err(dev, "missing mgmt-sticky reset property in node\n"); in rockchip_pcie_parse_dt()
91 return PTR_ERR(rockchip->mgmt_sticky_rst); in rockchip_pcie_parse_dt()
94 rockchip->pipe_rst = devm_reset_control_get_exclusive(dev, "pipe"); in rockchip_pcie_parse_dt()
95 if (IS_ERR(rockchip->pipe_rst)) { in rockchip_pcie_parse_dt()
96 if (PTR_ERR(rockchip->pipe_rst) != -EPROBE_DEFER) in rockchip_pcie_parse_dt()
98 return PTR_ERR(rockchip->pipe_rst); in rockchip_pcie_parse_dt()
101 rockchip->pm_rst = devm_reset_control_get_exclusive(dev, "pm"); in rockchip_pcie_parse_dt()
102 if (IS_ERR(rockchip->pm_rst)) { in rockchip_pcie_parse_dt()
103 if (PTR_ERR(rockchip->pm_rst) != -EPROBE_DEFER) in rockchip_pcie_parse_dt()
105 return PTR_ERR(rockchip->pm_rst); in rockchip_pcie_parse_dt()
108 rockchip->pclk_rst = devm_reset_control_get_exclusive(dev, "pclk"); in rockchip_pcie_parse_dt()
109 if (IS_ERR(rockchip->pclk_rst)) { in rockchip_pcie_parse_dt()
110 if (PTR_ERR(rockchip->pclk_rst) != -EPROBE_DEFER) in rockchip_pcie_parse_dt()
112 return PTR_ERR(rockchip->pclk_rst); in rockchip_pcie_parse_dt()
115 rockchip->aclk_rst = devm_reset_control_get_exclusive(dev, "aclk"); in rockchip_pcie_parse_dt()
116 if (IS_ERR(rockchip->aclk_rst)) { in rockchip_pcie_parse_dt()
117 if (PTR_ERR(rockchip->aclk_rst) != -EPROBE_DEFER) in rockchip_pcie_parse_dt()
119 return PTR_ERR(rockchip->aclk_rst); in rockchip_pcie_parse_dt()
122 if (rockchip->is_rc) { in rockchip_pcie_parse_dt()
123 rockchip->ep_gpio = devm_gpiod_get_optional(dev, "ep", in rockchip_pcie_parse_dt()
125 if (IS_ERR(rockchip->ep_gpio)) in rockchip_pcie_parse_dt()
126 return dev_err_probe(dev, PTR_ERR(rockchip->ep_gpio), in rockchip_pcie_parse_dt()
130 rockchip->aclk_pcie = devm_clk_get(dev, "aclk"); in rockchip_pcie_parse_dt()
131 if (IS_ERR(rockchip->aclk_pcie)) { in rockchip_pcie_parse_dt()
133 return PTR_ERR(rockchip->aclk_pcie); in rockchip_pcie_parse_dt()
136 rockchip->aclk_perf_pcie = devm_clk_get(dev, "aclk-perf"); in rockchip_pcie_parse_dt()
137 if (IS_ERR(rockchip->aclk_perf_pcie)) { in rockchip_pcie_parse_dt()
139 return PTR_ERR(rockchip->aclk_perf_pcie); in rockchip_pcie_parse_dt()
142 rockchip->hclk_pcie = devm_clk_get(dev, "hclk"); in rockchip_pcie_parse_dt()
143 if (IS_ERR(rockchip->hclk_pcie)) { in rockchip_pcie_parse_dt()
145 return PTR_ERR(rockchip->hclk_pcie); in rockchip_pcie_parse_dt()
148 rockchip->clk_pcie_pm = devm_clk_get(dev, "pm"); in rockchip_pcie_parse_dt()
149 if (IS_ERR(rockchip->clk_pcie_pm)) { in rockchip_pcie_parse_dt()
151 return PTR_ERR(rockchip->clk_pcie_pm); in rockchip_pcie_parse_dt()
166 struct device *dev = rockchip->dev; in rockchip_pcie_init_port()
170 err = reset_control_assert(rockchip->aclk_rst); in rockchip_pcie_init_port()
176 err = reset_control_assert(rockchip->pclk_rst); in rockchip_pcie_init_port()
182 err = reset_control_assert(rockchip->pm_rst); in rockchip_pcie_init_port()
189 err = phy_init(rockchip->phys[i]); in rockchip_pcie_init_port()
196 err = reset_control_assert(rockchip->core_rst); in rockchip_pcie_init_port()
202 err = reset_control_assert(rockchip->mgmt_rst); in rockchip_pcie_init_port()
208 err = reset_control_assert(rockchip->mgmt_sticky_rst); in rockchip_pcie_init_port()
214 err = reset_control_assert(rockchip->pipe_rst); in rockchip_pcie_init_port()
222 err = reset_control_deassert(rockchip->pm_rst); in rockchip_pcie_init_port()
228 err = reset_control_deassert(rockchip->aclk_rst); in rockchip_pcie_init_port()
234 err = reset_control_deassert(rockchip->pclk_rst); in rockchip_pcie_init_port()
240 if (rockchip->link_gen == 2) in rockchip_pcie_init_port()
248 PCIE_CLIENT_CONF_LANE_NUM(rockchip->lanes); in rockchip_pcie_init_port()
250 if (rockchip->is_rc) in rockchip_pcie_init_port()
258 err = phy_power_on(rockchip->phys[i]); in rockchip_pcie_init_port()
279 err = reset_control_deassert(rockchip->mgmt_sticky_rst); in rockchip_pcie_init_port()
285 err = reset_control_deassert(rockchip->core_rst); in rockchip_pcie_init_port()
291 err = reset_control_deassert(rockchip->mgmt_rst); in rockchip_pcie_init_port()
297 err = reset_control_deassert(rockchip->pipe_rst); in rockchip_pcie_init_port()
305 while (i--) in rockchip_pcie_init_port()
306 phy_power_off(rockchip->phys[i]); in rockchip_pcie_init_port()
309 while (i--) in rockchip_pcie_init_port()
310 phy_exit(rockchip->phys[i]); in rockchip_pcie_init_port()
317 struct device *dev = rockchip->dev; in rockchip_pcie_get_phys()
322 phy = devm_phy_get(dev, "pcie-phy"); in rockchip_pcie_get_phys()
324 rockchip->legacy_phy = true; in rockchip_pcie_get_phys()
325 rockchip->phys[0] = phy; in rockchip_pcie_get_phys()
330 if (PTR_ERR(phy) == -EPROBE_DEFER) in rockchip_pcie_get_phys()
333 dev_dbg(dev, "missing legacy phy; search for per-lane PHY\n"); in rockchip_pcie_get_phys()
336 name = kasprintf(GFP_KERNEL, "pcie-phy-%u", i); in rockchip_pcie_get_phys()
338 return -ENOMEM; in rockchip_pcie_get_phys()
340 phy = devm_of_phy_get(dev, dev->of_node, name); in rockchip_pcie_get_phys()
344 if (PTR_ERR(phy) != -EPROBE_DEFER) in rockchip_pcie_get_phys()
350 rockchip->phys[i] = phy; in rockchip_pcie_get_phys()
363 if (rockchip->lanes_map & BIT(i)) in rockchip_pcie_deinit_phys()
364 phy_power_off(rockchip->phys[i]); in rockchip_pcie_deinit_phys()
365 phy_exit(rockchip->phys[i]); in rockchip_pcie_deinit_phys()
372 struct device *dev = rockchip->dev; in rockchip_pcie_enable_clocks()
375 err = clk_prepare_enable(rockchip->aclk_pcie); in rockchip_pcie_enable_clocks()
381 err = clk_prepare_enable(rockchip->aclk_perf_pcie); in rockchip_pcie_enable_clocks()
387 err = clk_prepare_enable(rockchip->hclk_pcie); in rockchip_pcie_enable_clocks()
393 err = clk_prepare_enable(rockchip->clk_pcie_pm); in rockchip_pcie_enable_clocks()
402 clk_disable_unprepare(rockchip->hclk_pcie); in rockchip_pcie_enable_clocks()
404 clk_disable_unprepare(rockchip->aclk_perf_pcie); in rockchip_pcie_enable_clocks()
406 clk_disable_unprepare(rockchip->aclk_pcie); in rockchip_pcie_enable_clocks()
415 clk_disable_unprepare(rockchip->clk_pcie_pm); in rockchip_pcie_disable_clocks()
416 clk_disable_unprepare(rockchip->hclk_pcie); in rockchip_pcie_disable_clocks()
417 clk_disable_unprepare(rockchip->aclk_perf_pcie); in rockchip_pcie_disable_clocks()
418 clk_disable_unprepare(rockchip->aclk_pcie); in rockchip_pcie_disable_clocks()