292 static inline void advk_writel(struct advk_pcie *pcie, u32 val, u64 reg)  in advk_writel()  function
403 	advk_writel(pcie, reg, PCIE_CORE_CTRL0_REG);  in advk_pcie_train_link()
418 	advk_writel(pcie, reg, PCIE_CORE_PCIEXP_CAP + PCI_EXP_LNKCTL2);  in advk_pcie_train_link()
423 	advk_writel(pcie, reg, PCIE_CORE_CTRL0_REG);  in advk_pcie_train_link()
457 	advk_writel(pcie, OB_WIN_ENABLE |  in advk_pcie_set_ob_win()
459 	advk_writel(pcie, upper_32_bits(match), OB_WIN_MATCH_MS(win_num));  in advk_pcie_set_ob_win()
460 	advk_writel(pcie, lower_32_bits(remap), OB_WIN_REMAP_LS(win_num));  in advk_pcie_set_ob_win()
461 	advk_writel(pcie, upper_32_bits(remap), OB_WIN_REMAP_MS(win_num));  in advk_pcie_set_ob_win()
462 	advk_writel(pcie, lower_32_bits(mask), OB_WIN_MASK_LS(win_num));  in advk_pcie_set_ob_win()
463 	advk_writel(pcie, upper_32_bits(mask), OB_WIN_MASK_MS(win_num));  in advk_pcie_set_ob_win()
464 	advk_writel(pcie, actions, OB_WIN_ACTIONS(win_num));  in advk_pcie_set_ob_win()
469 	advk_writel(pcie, 0, OB_WIN_MATCH_LS(win_num));  in advk_pcie_disable_ob_win()
470 	advk_writel(pcie, 0, OB_WIN_MATCH_MS(win_num));  in advk_pcie_disable_ob_win()
471 	advk_writel(pcie, 0, OB_WIN_REMAP_LS(win_num));  in advk_pcie_disable_ob_win()
472 	advk_writel(pcie, 0, OB_WIN_REMAP_MS(win_num));  in advk_pcie_disable_ob_win()
473 	advk_writel(pcie, 0, OB_WIN_MASK_LS(win_num));  in advk_pcie_disable_ob_win()
474 	advk_writel(pcie, 0, OB_WIN_MASK_MS(win_num));  in advk_pcie_disable_ob_win()
475 	advk_writel(pcie, 0, OB_WIN_ACTIONS(win_num));  in advk_pcie_disable_ob_win()
493 	advk_writel(pcie, reg, PCIE_CORE_REF_CLK_REG);  in advk_pcie_setup_hw()
499 	advk_writel(pcie, reg, CTRL_CONFIG_REG);  in advk_pcie_setup_hw()
504 	advk_writel(pcie, reg, PCIE_CORE_CTRL0_REG);  in advk_pcie_setup_hw()
514 	advk_writel(pcie, reg, VENDOR_ID_REG);  in advk_pcie_setup_hw()
534 	advk_writel(pcie, reg, PCIE_CORE_DEV_REV_REG);  in advk_pcie_setup_hw()
539 	advk_writel(pcie, reg, PCIE_CORE_CMD_STATUS_REG);  in advk_pcie_setup_hw()
546 	advk_writel(pcie, reg, PCIE_CORE_ERR_CAPCTL_REG);  in advk_pcie_setup_hw()
556 	advk_writel(pcie, reg, PCIE_CORE_PCIEXP_CAP + PCI_EXP_DEVCTL);  in advk_pcie_setup_hw()
561 	advk_writel(pcie, reg, PCIE_CORE_CTRL2_REG);  in advk_pcie_setup_hw()
567 	advk_writel(pcie, reg, PCIE_CORE_CTRL0_REG);  in advk_pcie_setup_hw()
571 	advk_writel(pcie, lower_32_bits(msi_addr), PCIE_MSI_ADDR_LOW_REG);  in advk_pcie_setup_hw()
572 	advk_writel(pcie, upper_32_bits(msi_addr), PCIE_MSI_ADDR_HIGH_REG);  in advk_pcie_setup_hw()
577 	advk_writel(pcie, reg, PCIE_CORE_CTRL2_REG);  in advk_pcie_setup_hw()
580 	advk_writel(pcie, PCIE_MSI_ALL_MASK, PCIE_MSI_STATUS_REG);  in advk_pcie_setup_hw()
581 	advk_writel(pcie, PCIE_ISR0_ALL_MASK, PCIE_ISR0_REG);  in advk_pcie_setup_hw()
582 	advk_writel(pcie, PCIE_ISR1_ALL_MASK, PCIE_ISR1_REG);  in advk_pcie_setup_hw()
583 	advk_writel(pcie, PCIE_IRQ_ALL_MASK, HOST_CTRL_INT_STATUS_REG);  in advk_pcie_setup_hw()
586 	advk_writel(pcie, PCIE_ISR0_ALL_MASK, PCIE_ISR0_MASK_REG);  in advk_pcie_setup_hw()
587 	advk_writel(pcie, PCIE_ISR1_ALL_MASK, PCIE_ISR1_MASK_REG);  in advk_pcie_setup_hw()
588 	advk_writel(pcie, PCIE_MSI_ALL_MASK, PCIE_MSI_MASK_REG);  in advk_pcie_setup_hw()
593 	advk_writel(pcie, reg, PCIE_ISR0_MASK_REG);  in advk_pcie_setup_hw()
598 	advk_writel(pcie, reg, PCIE_ISR0_MASK_REG);  in advk_pcie_setup_hw()
602 	advk_writel(pcie, reg, HOST_CTRL_INT_MASK_REG);  in advk_pcie_setup_hw()
616 	advk_writel(pcie, reg, PCIE_CORE_CTRL2_REG);  in advk_pcie_setup_hw()
623 	advk_writel(pcie, OB_WIN_TYPE_MEM, OB_WIN_DEFAULT_ACTIONS);  in advk_pcie_setup_hw()
633 	advk_writel(pcie, reg, PIO_CTRL);  in advk_pcie_setup_hw()
822 		advk_writel(pcie, new, PCIE_CORE_CMD_STATUS_REG);  in advk_pci_bridge_emul_base_conf_write()
837 			advk_writel(pcie, val, PCIE_ISR0_MASK_REG);  in advk_pci_bridge_emul_base_conf_write()
845 			advk_writel(pcie, val, PCIE_CORE_CTRL1_REG);  in advk_pci_bridge_emul_base_conf_write()
916 		advk_writel(pcie, new, PCIE_CORE_PCIEXP_CAP + reg);  in advk_pci_bridge_emul_pcie_conf_write()
938 		advk_writel(pcie, new, PCIE_CORE_PCIEXP_CAP + reg);  in advk_pci_bridge_emul_pcie_conf_write()
1014 		advk_writel(pcie, new, PCIE_CORE_PCIERR_CAP + reg);  in advk_pci_bridge_emul_ext_conf_write()
1174 	advk_writel(pcie, reg, PIO_CTRL);  in advk_pcie_rd_conf()
1178 	advk_writel(pcie, reg, PIO_ADDR_LS);  in advk_pcie_rd_conf()
1179 	advk_writel(pcie, 0, PIO_ADDR_MS);  in advk_pcie_rd_conf()
1182 	advk_writel(pcie, 0xf, PIO_WR_DATA_STRB);  in advk_pcie_rd_conf()
1187 		advk_writel(pcie, 1, PIO_ISR);  in advk_pcie_rd_conf()
1188 		advk_writel(pcie, 1, PIO_START);  in advk_pcie_rd_conf()
1255 	advk_writel(pcie, reg, PIO_CTRL);  in advk_pcie_wr_conf()
1259 	advk_writel(pcie, reg, PIO_ADDR_LS);  in advk_pcie_wr_conf()
1260 	advk_writel(pcie, 0, PIO_ADDR_MS);  in advk_pcie_wr_conf()
1268 	advk_writel(pcie, reg, PIO_WR_DATA);  in advk_pcie_wr_conf()
1271 	advk_writel(pcie, data_strobe, PIO_WR_DATA_STRB);  in advk_pcie_wr_conf()
1276 		advk_writel(pcie, 1, PIO_ISR);  in advk_pcie_wr_conf()
1277 		advk_writel(pcie, 1, PIO_START);  in advk_pcie_wr_conf()
1317 	advk_writel(pcie, mask, PCIE_MSI_MASK_REG);  in advk_msi_irq_mask()
1331 	advk_writel(pcie, mask, PCIE_MSI_MASK_REG);  in advk_msi_irq_unmask()
1403 	advk_writel(pcie, mask, PCIE_ISR1_MASK_REG);  in advk_pcie_irq_mask()
1417 	advk_writel(pcie, mask, PCIE_ISR1_MASK_REG);  in advk_pcie_irq_unmask()
1572 	advk_writel(pcie, PCIE_MSG_PM_PME_MASK, PCIE_ISR0_REG);  in advk_pcie_handle_pme()
1606 		advk_writel(pcie, BIT(msi_idx), PCIE_MSI_STATUS_REG);  in advk_pcie_handle_msi()
1611 	advk_writel(pcie, PCIE_ISR0_MSI_INT_PENDING,  in advk_pcie_handle_msi()
1635 		advk_writel(pcie, PCIE_ISR0_ERR_MASK, PCIE_ISR0_REG);  in advk_pcie_handle_int()
1654 		advk_writel(pcie, PCIE_ISR1_INTX_ASSERT(i),  in advk_pcie_handle_int()
1675 	advk_writel(pcie, PCIE_IRQ_CORE_INT, HOST_CTRL_INT_STATUS_REG);  in advk_pcie_irq_handler()
1939 	advk_writel(pcie, val, PCIE_CORE_CMD_STATUS_REG);  in advk_pcie_remove()
1944 	advk_writel(pcie, val, PCIE_CORE_CTRL2_REG);  in advk_pcie_remove()
1947 	advk_writel(pcie, 0, PCIE_MSI_ADDR_LOW_REG);  in advk_pcie_remove()
1948 	advk_writel(pcie, 0, PCIE_MSI_ADDR_HIGH_REG);  in advk_pcie_remove()
1951 	advk_writel(pcie, PCIE_MSI_ALL_MASK, PCIE_MSI_MASK_REG);  in advk_pcie_remove()
1952 	advk_writel(pcie, PCIE_ISR0_ALL_MASK, PCIE_ISR0_MASK_REG);  in advk_pcie_remove()
1953 	advk_writel(pcie, PCIE_ISR1_ALL_MASK, PCIE_ISR1_MASK_REG);  in advk_pcie_remove()
1954 	advk_writel(pcie, PCIE_IRQ_ALL_MASK, HOST_CTRL_INT_MASK_REG);  in advk_pcie_remove()
1957 	advk_writel(pcie, PCIE_MSI_ALL_MASK, PCIE_MSI_STATUS_REG);  in advk_pcie_remove()
1958 	advk_writel(pcie, PCIE_ISR0_ALL_MASK, PCIE_ISR0_REG);  in advk_pcie_remove()
1959 	advk_writel(pcie, PCIE_ISR1_ALL_MASK, PCIE_ISR1_REG);  in advk_pcie_remove()
1960 	advk_writel(pcie, PCIE_IRQ_ALL_MASK, HOST_CTRL_INT_STATUS_REG);  in advk_pcie_remove()
1977 	advk_writel(pcie, val, PCIE_CORE_CTRL0_REG);  in advk_pcie_remove()